diff options
author | Dave Chapman <dave@dchapman.com> | 2009-07-25 00:49:13 +0000 |
---|---|---|
committer | Dave Chapman <dave@dchapman.com> | 2009-07-25 00:49:13 +0000 |
commit | 5b3f333dd79394d8814a838df367b45523dc207d (patch) | |
tree | 1df0623da05366799ae1fca11c73d566455859fe /firmware/target/arm | |
parent | 658636996bf4988d81b1f105d7025d6fbf697578 (diff) | |
download | rockbox-5b3f333dd79394d8814a838df367b45523dc207d.tar.gz rockbox-5b3f333dd79394d8814a838df367b45523dc207d.zip |
Correct the memory sizes (IRAM and DRAM) for the Nano2G.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@22025 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm')
-rw-r--r-- | firmware/target/arm/s5l8700/boot.lds | 10 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/crt0.S | 14 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/ipodnano2g/button-nano2g.c | 44 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/pcm-s5l8700.c | 47 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/system-s5l8700.c | 7 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/wmcodec-s5l8700.c | 46 |
6 files changed, 152 insertions, 16 deletions
diff --git a/firmware/target/arm/s5l8700/boot.lds b/firmware/target/arm/s5l8700/boot.lds index 28271822e8..12f03ef463 100644 --- a/firmware/target/arm/s5l8700/boot.lds +++ b/firmware/target/arm/s5l8700/boot.lds | |||
@@ -9,12 +9,16 @@ OUTPUT_FORMAT(elf32-bigarm) | |||
9 | OUTPUT_ARCH(arm) | 9 | OUTPUT_ARCH(arm) |
10 | STARTUP(target/arm/s5l8700/crt0.o) | 10 | STARTUP(target/arm/s5l8700/crt0.o) |
11 | 11 | ||
12 | /* DRAMORIG is in fact 0x8000000 but remapped to 0x0 */ | 12 | /* DRAMORIG is in fact 0x08000000 but remapped to 0x0 */ |
13 | #define DRAMORIG 0x8000000 | 13 | #define DRAMORIG 0x08000000 |
14 | #define DRAMSIZE 16M | 14 | #define DRAMSIZE (MEMORYSIZE * 0x100000) |
15 | 15 | ||
16 | #define IRAMORIG 0x22000000 | 16 | #define IRAMORIG 0x22000000 |
17 | #if CONFIG_CPU==S5L8701 | ||
18 | #define IRAMSIZE 176K | ||
19 | #else | ||
17 | #define IRAMSIZE 256K | 20 | #define IRAMSIZE 256K |
21 | #endif | ||
18 | 22 | ||
19 | #ifdef MEIZU_M6SL | 23 | #ifdef MEIZU_M6SL |
20 | #define DFULOADADDR IRAMORIG | 24 | #define DFULOADADDR IRAMORIG |
diff --git a/firmware/target/arm/s5l8700/crt0.S b/firmware/target/arm/s5l8700/crt0.S index c6e201e73f..bb374ae5a4 100644 --- a/firmware/target/arm/s5l8700/crt0.S +++ b/firmware/target/arm/s5l8700/crt0.S | |||
@@ -82,6 +82,9 @@ newstart2: | |||
82 | // orr r0, r0, r2 | 82 | // orr r0, r0, r2 |
83 | // str r0, [r1] // switch backlight on | 83 | // str r0, [r1] // switch backlight on |
84 | 84 | ||
85 | #ifndef IPOD_NANO2G | ||
86 | /* Currently disabled for the Nano2G as it doesn't appear to be | ||
87 | correct - e.g. audio doesn't work with this code enabled. */ | ||
85 | ldr r1, =0x3c500000 // CLKCON | 88 | ldr r1, =0x3c500000 // CLKCON |
86 | ldr r0, =0x00800080 | 89 | ldr r0, =0x00800080 |
87 | str r0, [r1] | 90 | str r0, [r1] |
@@ -90,7 +93,7 @@ newstart2: | |||
90 | str r0, [r1] | 93 | str r0, [r1] |
91 | ldr r1, =0x3c500004 // PLL0PMS | 94 | ldr r1, =0x3c500004 // PLL0PMS |
92 | #ifdef IPOD_NANO2G | 95 | #ifdef IPOD_NANO2G |
93 | ldr r0, =0x21200 | 96 | ldr r0, =0x21200 // pdiv=2, mdiv=?? sdiv=0 |
94 | #else | 97 | #else |
95 | ldr r0, =0x1ad200 | 98 | ldr r0, =0x1ad200 |
96 | #endif | 99 | #endif |
@@ -123,7 +126,8 @@ newstart2: | |||
123 | nop | 126 | nop |
124 | nop | 127 | nop |
125 | nop | 128 | nop |
126 | 129 | #endif | |
130 | |||
127 | // ldr r0, =0x10100000 | 131 | // ldr r0, =0x10100000 |
128 | // ldr r1, =0x38200034 | 132 | // ldr r1, =0x38200034 |
129 | // str r0, [r1] // SRAM0/1 data width 16 bit | 133 | // str r0, [r1] // SRAM0/1 data width 16 bit |
@@ -143,7 +147,7 @@ newstart2: | |||
143 | str r0, [r1, #40] // enable clock for all peripherals | 147 | str r0, [r1, #40] // enable clock for all peripherals |
144 | mov r0, #0 // 0x0 | 148 | mov r0, #0 // 0x0 |
145 | str r0, [r1, #44] // do not enter any power saving mode | 149 | str r0, [r1, #44] // do not enter any power saving mode |
146 | 150 | ||
147 | mov r1, #0x1 | 151 | mov r1, #0x1 |
148 | mrc 15, 0, r0, c1, c0, 0 | 152 | mrc 15, 0, r0, c1, c0, 0 |
149 | bic r0, r0, r1 | 153 | bic r0, r0, r1 |
@@ -186,7 +190,7 @@ newstart2: | |||
186 | mcr 15, 0, r0, c6, c0, 1 | 190 | mcr 15, 0, r0, c6, c0, 1 |
187 | mov r0, #0x2f | 191 | mov r0, #0x2f |
188 | mcr 15, 0, r0, c6, c1, 1 | 192 | mcr 15, 0, r0, c6, c1, 1 |
189 | ldr r0, =0x0800002f | 193 | ldr r0, =0x08000031 |
190 | mcr 15, 0, r0, c6, c2, 1 | 194 | mcr 15, 0, r0, c6, c2, 1 |
191 | ldr r0, =0x22000023 | 195 | ldr r0, =0x22000023 |
192 | mcr 15, 0, r0, c6, c3, 1 | 196 | mcr 15, 0, r0, c6, c3, 1 |
@@ -196,7 +200,7 @@ newstart2: | |||
196 | mcr 15, 0, r0, c6, c0, 0 | 200 | mcr 15, 0, r0, c6, c0, 0 |
197 | mov r0, #0x2f | 201 | mov r0, #0x2f |
198 | mcr 15, 0, r0, c6, c1, 0 | 202 | mcr 15, 0, r0, c6, c1, 0 |
199 | ldr r0, =0x0800002f | 203 | ldr r0, =0x08000031 |
200 | mcr 15, 0, r0, c6, c2, 0 | 204 | mcr 15, 0, r0, c6, c2, 0 |
201 | ldr r0, =0x22000023 | 205 | ldr r0, =0x22000023 |
202 | mcr 15, 0, r0, c6, c3, 0 | 206 | mcr 15, 0, r0, c6, c3, 0 |
diff --git a/firmware/target/arm/s5l8700/ipodnano2g/button-nano2g.c b/firmware/target/arm/s5l8700/ipodnano2g/button-nano2g.c index 8049028a59..739b48b511 100644 --- a/firmware/target/arm/s5l8700/ipodnano2g/button-nano2g.c +++ b/firmware/target/arm/s5l8700/ipodnano2g/button-nano2g.c | |||
@@ -25,16 +25,58 @@ | |||
25 | #include "s5l8700.h" | 25 | #include "s5l8700.h" |
26 | #include "button-target.h" | 26 | #include "button-target.h" |
27 | 27 | ||
28 | #define CLICKWHEEL00 (*(volatile unsigned long*)(0x3c200000)) | ||
29 | #define CLICKWHEEL10 (*(volatile unsigned long*)(0x3c200010)) | ||
30 | #define CLICKWHEELINT (*(volatile unsigned long*)(0x3c200014)) | ||
31 | #define CLICKWHEEL_DATA (*(volatile unsigned long*)(0x3c200018)) | ||
32 | |||
33 | static int buttons = 0; | ||
34 | |||
35 | void INT_SPI(void) | ||
36 | { | ||
37 | int clickwheel_events; | ||
38 | int btn =0; | ||
39 | int status; | ||
40 | |||
41 | clickwheel_events = CLICKWHEELINT; | ||
42 | |||
43 | if (clickwheel_events & 4) CLICKWHEELINT = 4; | ||
44 | if (clickwheel_events & 2) CLICKWHEELINT = 2; | ||
45 | if (clickwheel_events & 1) CLICKWHEELINT = 1; | ||
46 | |||
47 | status = CLICKWHEEL_DATA; | ||
48 | if ((status & 0x800000ff) == 0x8000001a) | ||
49 | { | ||
50 | if (status & 0x00000100) | ||
51 | btn |= BUTTON_SELECT; | ||
52 | if (status & 0x00000200) | ||
53 | btn |= BUTTON_RIGHT; | ||
54 | if (status & 0x00000400) | ||
55 | btn |= BUTTON_LEFT; | ||
56 | if (status & 0x00000800) | ||
57 | btn |= BUTTON_PLAY; | ||
58 | if (status & 0x00001000) | ||
59 | btn |= BUTTON_MENU; | ||
60 | } | ||
61 | |||
62 | buttons = btn; | ||
63 | } | ||
64 | |||
28 | void button_init_device(void) | 65 | void button_init_device(void) |
29 | { | 66 | { |
67 | CLICKWHEEL00 = 0x280000; | ||
68 | CLICKWHEEL10 = 3; | ||
69 | INTMOD = 0; | ||
70 | INTMSK |= (1<<26); | ||
71 | PCON10 &= ~0xF00; | ||
30 | } | 72 | } |
31 | 73 | ||
32 | int button_read_device(void) | 74 | int button_read_device(void) |
33 | { | 75 | { |
76 | return buttons; | ||
34 | } | 77 | } |
35 | 78 | ||
36 | bool button_hold(void) | 79 | bool button_hold(void) |
37 | { | 80 | { |
38 | return ((PDAT14 & (1 << 6)) == 0); | 81 | return ((PDAT14 & (1 << 6)) == 0); |
39 | } | 82 | } |
40 | |||
diff --git a/firmware/target/arm/s5l8700/pcm-s5l8700.c b/firmware/target/arm/s5l8700/pcm-s5l8700.c index 7a4bdeb174..9421956131 100644 --- a/firmware/target/arm/s5l8700/pcm-s5l8700.c +++ b/firmware/target/arm/s5l8700/pcm-s5l8700.c | |||
@@ -48,7 +48,11 @@ static const struct div_entry { | |||
48 | int pdiv, mdiv, sdiv, cdiv; | 48 | int pdiv, mdiv, sdiv, cdiv; |
49 | } div_table[HW_NUM_FREQ] = { | 49 | } div_table[HW_NUM_FREQ] = { |
50 | [HW_FREQ_11] = { 26, 189, 3, 8}, | 50 | [HW_FREQ_11] = { 26, 189, 3, 8}, |
51 | #ifdef IPOD_NANO2G | ||
52 | [HW_FREQ_22] = { 5, 6, 3, 4}, | ||
53 | #else | ||
51 | [HW_FREQ_22] = { 50, 98, 2, 8}, | 54 | [HW_FREQ_22] = { 50, 98, 2, 8}, |
55 | #endif | ||
52 | [HW_FREQ_44] = { 37, 151, 1, 9}, | 56 | [HW_FREQ_44] = { 37, 151, 1, 9}, |
53 | [HW_FREQ_88] = { 50, 98, 1, 4}, | 57 | [HW_FREQ_88] = { 50, 98, 1, 4}, |
54 | #if 0 /* disabled because the codec driver does not support it (yet) */ | 58 | #if 0 /* disabled because the codec driver does not support it (yet) */ |
@@ -116,6 +120,17 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
116 | DMA_IISOUT_DSIZE, DMA_IISOUT_BLEN, (void *)addr, size / 2, | 120 | DMA_IISOUT_DSIZE, DMA_IISOUT_BLEN, (void *)addr, size / 2, |
117 | dma_callback); | 121 | dma_callback); |
118 | 122 | ||
123 | #ifdef IPOD_NANO2G | ||
124 | I2STXCON = (0x10 << 16) | /* burst length */ | ||
125 | (0 << 15) | /* 0 = falling edge */ | ||
126 | (0 << 13) | /* 0 = basic I2S format */ | ||
127 | (0 << 12) | /* 0 = MSB first */ | ||
128 | (0 << 11) | /* 0 = left channel for low polarity */ | ||
129 | (5 << 8) | /* MCLK divider */ | ||
130 | (0 << 5) | /* 0 = 16-bit */ | ||
131 | (2 << 3) | /* bit clock per frame */ | ||
132 | (1 << 0); /* channel index */ | ||
133 | #else | ||
119 | /* S2: IIS Tx mode set */ | 134 | /* S2: IIS Tx mode set */ |
120 | I2STXCON = (DMA_IISOUT_BLEN << 16) | /* burst length */ | 135 | I2STXCON = (DMA_IISOUT_BLEN << 16) | /* burst length */ |
121 | (0 << 15) | /* 0 = falling edge */ | 136 | (0 << 15) | /* 0 = falling edge */ |
@@ -126,6 +141,7 @@ void pcm_play_dma_start(const void *addr, size_t size) | |||
126 | (0 << 5) | /* 0 = 16-bit */ | 141 | (0 << 5) | /* 0 = 16-bit */ |
127 | (0 << 3) | /* bit clock per frame */ | 142 | (0 << 3) | /* bit clock per frame */ |
128 | (1 << 0); /* channel index */ | 143 | (1 << 0); /* channel index */ |
144 | #endif | ||
129 | 145 | ||
130 | /* S3: DMA channel 0 on */ | 146 | /* S3: DMA channel 0 on */ |
131 | dma_enable_channel(DMA_IISOUT_CHANNEL); | 147 | dma_enable_channel(DMA_IISOUT_CHANNEL); |
@@ -169,7 +185,12 @@ void pcm_play_dma_pause(bool pause) | |||
169 | void pcm_play_dma_init(void) | 185 | void pcm_play_dma_init(void) |
170 | { | 186 | { |
171 | /* configure IIS pins */ | 187 | /* configure IIS pins */ |
188 | #ifdef IPOD_NANO2G | ||
189 | PCON5 = (PCON5 & ~(0xFFFFF000)) | 0x22220000; | ||
190 | PCON6 = (PCON6 & ~(0x0F000000)) | 0x02000000; | ||
191 | #else | ||
172 | PCON7 = (PCON7 & ~(0x0FFFFF00)) | 0x02222200; | 192 | PCON7 = (PCON7 & ~(0x0FFFFF00)) | 0x02222200; |
193 | #endif | ||
173 | 194 | ||
174 | /* enable clock to the IIS module */ | 195 | /* enable clock to the IIS module */ |
175 | PWRCON &= ~(1 << 6); | 196 | PWRCON &= ~(1 << 6); |
@@ -185,26 +206,42 @@ void pcm_postinit(void) | |||
185 | /* set the configured PCM frequency */ | 206 | /* set the configured PCM frequency */ |
186 | void pcm_dma_apply_settings(void) | 207 | void pcm_dma_apply_settings(void) |
187 | { | 208 | { |
188 | audiohw_set_frequency(pcm_sampr); | 209 | // audiohw_set_frequency(pcm_sampr); |
189 | 210 | ||
190 | struct div_entry div = div_table[pcm_fsel]; | 211 | struct div_entry div = div_table[pcm_fsel]; |
191 | 212 | ||
213 | PLLCON &= ~4; | ||
214 | PLLCON &= ~0x10; | ||
215 | PLLCON &= 0x3f; | ||
216 | PLLCON |= 4; | ||
217 | |||
192 | /* configure PLL1 and MCLK for the desired sample rate */ | 218 | /* configure PLL1 and MCLK for the desired sample rate */ |
219 | #ifdef IPOD_NANO2G | ||
220 | PLL1PMS = (2 << 16) | /* PDIV */ | ||
221 | (12 << 8) | /* MDIV */ | ||
222 | (2 << 0); /* SDIV */ | ||
223 | PLL1LCNT = 0x4d2; | ||
224 | #else | ||
193 | PLL1PMS = (div.pdiv << 16) | | 225 | PLL1PMS = (div.pdiv << 16) | |
194 | (div.mdiv << 8) | | 226 | (div.mdiv << 8) | |
195 | (div.sdiv << 0); | 227 | (div.sdiv << 0); |
196 | PLL1LCNT = 7500; /* no idea what to put here */ | 228 | PLL1LCNT = 7500; /* no idea what to put here */ |
197 | 229 | #endif | |
230 | |||
198 | /* enable PLL1 and wait for lock */ | 231 | /* enable PLL1 and wait for lock */ |
199 | PLLCON |= (1 << 1); | 232 | PLLCON |= (1 << 1); |
200 | while ((PLLLOCK & (1 << 1)) == 0); | 233 | while ((PLLLOCK & (1 << 1)) == 0); |
201 | 234 | ||
202 | /* configure MCLK */ | 235 | /* configure MCLK */ |
203 | CLKCON = (CLKCON & ~(0xFF)) | | 236 | CLKCON = (CLKCON & ~(0xFF)) | |
204 | (0 << 7) | /* MCLK_MASK */ | 237 | (0 << 7) | /* MCLK_MASK */ |
205 | (2 << 5) | /* MCLK_SEL = PLL1 */ | 238 | (2 << 5) | /* MCLK_SEL = PLL2 */ |
206 | (1 << 4) | /* MCLK_DIV_ON */ | 239 | (1 << 4) | /* MCLK_DIV_ON */ |
240 | #ifdef IPOD_NANO2G | ||
241 | (3 - 1); /* MCLK_DIV_VAL */ | ||
242 | #else | ||
207 | (div.cdiv - 1); /* MCLK_DIV_VAL */ | 243 | (div.cdiv - 1); /* MCLK_DIV_VAL */ |
244 | #endif | ||
208 | } | 245 | } |
209 | 246 | ||
210 | size_t pcm_get_bytes_waiting(void) | 247 | size_t pcm_get_bytes_waiting(void) |
diff --git a/firmware/target/arm/s5l8700/system-s5l8700.c b/firmware/target/arm/s5l8700/system-s5l8700.c index 48c50645e9..a282c45235 100644 --- a/firmware/target/arm/s5l8700/system-s5l8700.c +++ b/firmware/target/arm/s5l8700/system-s5l8700.c | |||
@@ -96,12 +96,15 @@ void irq_handler(void) | |||
96 | "sub sp, sp, #8 \n"); /* Reserve stack */ | 96 | "sub sp, sp, #8 \n"); /* Reserve stack */ |
97 | 97 | ||
98 | int irq_no = INTOFFSET; | 98 | int irq_no = INTOFFSET; |
99 | int sources = SRCPND; | ||
100 | |||
101 | if (irq_no==10) { INTMSK &= ~(1<<10); } | ||
99 | 102 | ||
100 | irqvector[irq_no](); | 103 | irqvector[irq_no](); |
101 | 104 | ||
102 | /* clear interrupt */ | 105 | /* clear interrupt */ |
103 | SRCPND = (1 << irq_no); | 106 | SRCPND = sources; |
104 | INTPND = INTPND; | 107 | INTPND = sources; |
105 | 108 | ||
106 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ | 109 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ |
107 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ | 110 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ |
diff --git a/firmware/target/arm/s5l8700/wmcodec-s5l8700.c b/firmware/target/arm/s5l8700/wmcodec-s5l8700.c new file mode 100644 index 0000000000..3c7c24994d --- /dev/null +++ b/firmware/target/arm/s5l8700/wmcodec-s5l8700.c | |||
@@ -0,0 +1,46 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * TCC specific code for Wolfson audio codecs | ||
11 | * | ||
12 | * Based on code from the ipodlinux project - http://ipodlinux.org/ | ||
13 | * Adapted for Rockbox in December 2005 | ||
14 | * | ||
15 | * Original file: linux/arch/armnommu/mach-ipod/audio.c | ||
16 | * | ||
17 | * Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org) | ||
18 | * | ||
19 | * This program is free software; you can redistribute it and/or | ||
20 | * modify it under the terms of the GNU General Public License | ||
21 | * as published by the Free Software Foundation; either version 2 | ||
22 | * of the License, or (at your option) any later version. | ||
23 | * | ||
24 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
25 | * KIND, either express or implied. | ||
26 | * | ||
27 | ****************************************************************************/ | ||
28 | |||
29 | #include "system.h" | ||
30 | #include "audiohw.h" | ||
31 | #include "i2c-s5l8700.h" | ||
32 | #include "wmcodec.h" | ||
33 | |||
34 | void audiohw_init(void) | ||
35 | { | ||
36 | #if defined(HAVE_WM8731) || defined(HAVE_WM8751) || defined(HAVE_WM8985) | ||
37 | audiohw_preinit(); | ||
38 | #endif | ||
39 | } | ||
40 | |||
41 | void wmcodec_write(int reg, int data) | ||
42 | { | ||
43 | unsigned char d = data & 0xff; | ||
44 | |||
45 | i2c_write(0x34, (reg << 1) | ((data & 0x100) >> 8), 1, &d); | ||
46 | } | ||