diff options
Diffstat (limited to 'firmware/target/arm/s5l8700/crt0.S')
-rw-r--r-- | firmware/target/arm/s5l8700/crt0.S | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/firmware/target/arm/s5l8700/crt0.S b/firmware/target/arm/s5l8700/crt0.S index c6e201e73f..bb374ae5a4 100644 --- a/firmware/target/arm/s5l8700/crt0.S +++ b/firmware/target/arm/s5l8700/crt0.S | |||
@@ -82,6 +82,9 @@ newstart2: | |||
82 | // orr r0, r0, r2 | 82 | // orr r0, r0, r2 |
83 | // str r0, [r1] // switch backlight on | 83 | // str r0, [r1] // switch backlight on |
84 | 84 | ||
85 | #ifndef IPOD_NANO2G | ||
86 | /* Currently disabled for the Nano2G as it doesn't appear to be | ||
87 | correct - e.g. audio doesn't work with this code enabled. */ | ||
85 | ldr r1, =0x3c500000 // CLKCON | 88 | ldr r1, =0x3c500000 // CLKCON |
86 | ldr r0, =0x00800080 | 89 | ldr r0, =0x00800080 |
87 | str r0, [r1] | 90 | str r0, [r1] |
@@ -90,7 +93,7 @@ newstart2: | |||
90 | str r0, [r1] | 93 | str r0, [r1] |
91 | ldr r1, =0x3c500004 // PLL0PMS | 94 | ldr r1, =0x3c500004 // PLL0PMS |
92 | #ifdef IPOD_NANO2G | 95 | #ifdef IPOD_NANO2G |
93 | ldr r0, =0x21200 | 96 | ldr r0, =0x21200 // pdiv=2, mdiv=?? sdiv=0 |
94 | #else | 97 | #else |
95 | ldr r0, =0x1ad200 | 98 | ldr r0, =0x1ad200 |
96 | #endif | 99 | #endif |
@@ -123,7 +126,8 @@ newstart2: | |||
123 | nop | 126 | nop |
124 | nop | 127 | nop |
125 | nop | 128 | nop |
126 | 129 | #endif | |
130 | |||
127 | // ldr r0, =0x10100000 | 131 | // ldr r0, =0x10100000 |
128 | // ldr r1, =0x38200034 | 132 | // ldr r1, =0x38200034 |
129 | // str r0, [r1] // SRAM0/1 data width 16 bit | 133 | // str r0, [r1] // SRAM0/1 data width 16 bit |
@@ -143,7 +147,7 @@ newstart2: | |||
143 | str r0, [r1, #40] // enable clock for all peripherals | 147 | str r0, [r1, #40] // enable clock for all peripherals |
144 | mov r0, #0 // 0x0 | 148 | mov r0, #0 // 0x0 |
145 | str r0, [r1, #44] // do not enter any power saving mode | 149 | str r0, [r1, #44] // do not enter any power saving mode |
146 | 150 | ||
147 | mov r1, #0x1 | 151 | mov r1, #0x1 |
148 | mrc 15, 0, r0, c1, c0, 0 | 152 | mrc 15, 0, r0, c1, c0, 0 |
149 | bic r0, r0, r1 | 153 | bic r0, r0, r1 |
@@ -186,7 +190,7 @@ newstart2: | |||
186 | mcr 15, 0, r0, c6, c0, 1 | 190 | mcr 15, 0, r0, c6, c0, 1 |
187 | mov r0, #0x2f | 191 | mov r0, #0x2f |
188 | mcr 15, 0, r0, c6, c1, 1 | 192 | mcr 15, 0, r0, c6, c1, 1 |
189 | ldr r0, =0x0800002f | 193 | ldr r0, =0x08000031 |
190 | mcr 15, 0, r0, c6, c2, 1 | 194 | mcr 15, 0, r0, c6, c2, 1 |
191 | ldr r0, =0x22000023 | 195 | ldr r0, =0x22000023 |
192 | mcr 15, 0, r0, c6, c3, 1 | 196 | mcr 15, 0, r0, c6, c3, 1 |
@@ -196,7 +200,7 @@ newstart2: | |||
196 | mcr 15, 0, r0, c6, c0, 0 | 200 | mcr 15, 0, r0, c6, c0, 0 |
197 | mov r0, #0x2f | 201 | mov r0, #0x2f |
198 | mcr 15, 0, r0, c6, c1, 0 | 202 | mcr 15, 0, r0, c6, c1, 0 |
199 | ldr r0, =0x0800002f | 203 | ldr r0, =0x08000031 |
200 | mcr 15, 0, r0, c6, c2, 0 | 204 | mcr 15, 0, r0, c6, c2, 0 |
201 | ldr r0, =0x22000023 | 205 | ldr r0, =0x22000023 |
202 | mcr 15, 0, r0, c6, c3, 0 | 206 | mcr 15, 0, r0, c6, c3, 0 |