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author | Karl Kurbjun <kkurbjun@gmail.com> | 2011-02-08 05:53:30 +0000 |
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committer | Karl Kurbjun <kkurbjun@gmail.com> | 2011-02-08 05:53:30 +0000 |
commit | 4d129044390a087b6193b6ce63e035b2550b3ce4 (patch) | |
tree | 88a0400687fd16e2d31378bf69f9435b7fde7ac1 /firmware/target/arm/tms320dm320/dsp-dm320.c | |
parent | a014191e5e56f153f9ffb63cc953896930712eca (diff) | |
download | rockbox-4d129044390a087b6193b6ce63e035b2550b3ce4.tar.gz rockbox-4d129044390a087b6193b6ce63e035b2550b3ce4.zip |
M:Robe 500: Use bit modifiers more.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29247 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/tms320dm320/dsp-dm320.c')
-rw-r--r-- | firmware/target/arm/tms320dm320/dsp-dm320.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/arm/tms320dm320/dsp-dm320.c b/firmware/target/arm/tms320dm320/dsp-dm320.c index 5f0c997bd2..be9f8d8bd9 100644 --- a/firmware/target/arm/tms320dm320/dsp-dm320.c +++ b/firmware/target/arm/tms320dm320/dsp-dm320.c | |||
@@ -64,10 +64,10 @@ void dsp_reset(void) | |||
64 | { | 64 | { |
65 | DSP_(0x7fff) = 0xdead; | 65 | DSP_(0x7fff) = 0xdead; |
66 | 66 | ||
67 | IO_DSPC_HPIB_CONTROL &= ~(1 << 8); | 67 | bitclr16(&IO_DSPC_HPIB_CONTROL, 1 << 8); |
68 | /* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */ | 68 | /* HPIB bus cycles will lock up the ARM in here. Don't touch DSP RAM. */ |
69 | nop; nop; | 69 | nop; nop; |
70 | IO_DSPC_HPIB_CONTROL |= 1 << 8; | 70 | bitset16(&IO_DSPC_HPIB_CONTROL, 1 << 8); |
71 | 71 | ||
72 | /* TODO: Timeout. */ | 72 | /* TODO: Timeout. */ |
73 | while (DSP_(0x7fff) != 0); | 73 | while (DSP_(0x7fff) != 0); |
@@ -81,9 +81,9 @@ void dsp_wake(void) | |||
81 | 81 | ||
82 | /* The first time you INT0 the DSP, the ROM loader will branch to your RST | 82 | /* The first time you INT0 the DSP, the ROM loader will branch to your RST |
83 | handler. Subsequent times, your INT0 handler will get executed. */ | 83 | handler. Subsequent times, your INT0 handler will get executed. */ |
84 | IO_DSPC_HPIB_CONTROL &= ~(1 << 7); | 84 | bitclr16(&IO_DSPC_HPIB_CONTROL, 1 << 7); |
85 | nop; nop; | 85 | nop; nop; |
86 | IO_DSPC_HPIB_CONTROL |= 1 << 7; | 86 | bitset16(&IO_DSPC_HPIB_CONTROL, 1 << 7); |
87 | 87 | ||
88 | restore_irq(old_level); | 88 | restore_irq(old_level); |
89 | } | 89 | } |