Meg-FX: s3c register definitions really should be unsigned. Switch from 'int' to 'unsigned long' like other targets.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19325 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 4 insertions, 3 deletions

diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
index 46b726869b..43758ece08 100644
--- a/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
+++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-target.h
@@ -31,11 +31,12 @@
 /* Functions to set and clear regiser bits atomically */
 
 /* Set and clear register bits */
-void s3c_regmod(volatile int *reg, unsigned int set, unsigned int clr);
+void s3c_regmod32(volatile unsigned long *reg, unsigned long bits,
+                  unsigned long mask);
 /* Set register bits */
-void s3c_regset(volatile int *reg, unsigned int mask);
+void s3c_regset32(volatile unsigned long *reg, unsigned long bits);
 /* Clear register bits */
-void s3c_regclr(volatile int *reg, unsigned int mask);
+void s3c_regclr32(volatile unsigned long *reg, unsigned long bits);
 
 #define HAVE_INVALIDATE_ICACHE
 static inline void invalidate_icache(void)