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author | Michael Sevakis <jethead71@rockbox.org> | 2008-12-04 15:06:48 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2008-12-04 15:06:48 +0000 |
commit | a1ab7a55ffc768da55e4cb30a87cfb85b1231902 (patch) | |
tree | c64c6bdaa07fb7dd522ae96aa8c3543758dd68d1 /firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c | |
parent | 7bc50d1aa545bfed89e1e8f4f0446f9b9da65a3a (diff) | |
download | rockbox-a1ab7a55ffc768da55e4cb30a87cfb85b1231902.tar.gz rockbox-a1ab7a55ffc768da55e4cb30a87cfb85b1231902.zip |
Meg-FX: s3c register definitions really should be unsigned. Switch from 'int' to 'unsigned long' like other targets.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19325 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c')
-rw-r--r-- | firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c index 8065926e28..6d8108be49 100644 --- a/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c +++ b/firmware/target/arm/s3c2440/gigabeat-fx/system-meg-fx.c | |||
@@ -118,34 +118,35 @@ static void set_page_tables(void) | |||
118 | map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */ | 118 | map_section((int)FRAME, (int)FRAME, 1, BUFFERED); /* enable buffered writing for the framebuffer */ |
119 | } | 119 | } |
120 | 120 | ||
121 | void memory_init(void) { | 121 | void memory_init(void) |
122 | { | ||
122 | ttb_init(); | 123 | ttb_init(); |
123 | set_page_tables(); | 124 | set_page_tables(); |
124 | enable_mmu(); | 125 | enable_mmu(); |
125 | } | 126 | } |
126 | 127 | ||
127 | void s3c_regmod(volatile int *reg, unsigned int set, unsigned int clr) | 128 | void s3c_regmod32(volatile unsigned long *reg, unsigned long bits, |
129 | unsigned long mask) | ||
128 | { | 130 | { |
129 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); | 131 | int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); |
130 | unsigned int val = *reg; | 132 | *reg = (*reg & ~mask) | (bits & mask); |
131 | *reg = (val | set) & ~clr; | ||
132 | restore_interrupt(oldstatus); | 133 | restore_interrupt(oldstatus); |
133 | } | 134 | } |
134 | 135 | ||
135 | void s3c_regset(volatile int *reg, unsigned int mask) | 136 | void s3c_regset32(volatile unsigned long *reg, unsigned long bits) |
136 | { | 137 | { |
137 | s3c_regmod(reg, mask, 0); | 138 | s3c_regmod32(reg, bits, bits); |
138 | } | 139 | } |
139 | 140 | ||
140 | void s3c_regclr(volatile int *reg, unsigned int mask) | 141 | void s3c_regclr32(volatile unsigned long *reg, unsigned long bits) |
141 | { | 142 | { |
142 | s3c_regmod(reg, 0, mask); | 143 | s3c_regmod32(reg, 0, bits); |
143 | } | 144 | } |
144 | 145 | ||
145 | void system_init(void) | 146 | void system_init(void) |
146 | { | 147 | { |
147 | INTMSK = 0xFFFFFFFF; | 148 | INTMSK = 0xFFFFFFFF; |
148 | INTMOD = 0; | 149 | INTMOD = 0; |
149 | SRCPND = 0xFFFFFFFF; | 150 | SRCPND = 0xFFFFFFFF; |
150 | INTPND = 0xFFFFFFFF; | 151 | INTPND = 0xFFFFFFFF; |
151 | INTSUBMSK = 0xFFFFFFFF; | 152 | INTSUBMSK = 0xFFFFFFFF; |