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authorKarl Kurbjun <kkurbjun@gmail.com>2007-09-23 23:08:39 +0000
committerKarl Kurbjun <kkurbjun@gmail.com>2007-09-23 23:08:39 +0000
commit9ac9cc6024271f806af23a84903d809eb145dc60 (patch)
tree66ff450d331c4dfae8758281a7faa47ffd2f752f /firmware/target/arm/olympus/mrobe-500/timer-target.h
parentd969a420b6c7f9aee321d218b7a9feb1c7158703 (diff)
downloadrockbox-9ac9cc6024271f806af23a84903d809eb145dc60.tar.gz
rockbox-9ac9cc6024271f806af23a84903d809eb145dc60.zip
Working DM320 interrupts, changed the way registers are accessed in spi and uart drivers. Uart might be broken with interrupts - buttons on remote don't seem to respond when interrupts are enabled.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14836 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/olympus/mrobe-500/timer-target.h')
-rw-r--r--firmware/target/arm/olympus/mrobe-500/timer-target.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/olympus/mrobe-500/timer-target.h b/firmware/target/arm/olympus/mrobe-500/timer-target.h
index 71cfa72e9d..4abe75ad82 100644
--- a/firmware/target/arm/olympus/mrobe-500/timer-target.h
+++ b/firmware/target/arm/olympus/mrobe-500/timer-target.h
@@ -20,7 +20,7 @@
20#define TIMER_TARGET_H 20#define TIMER_TARGET_H
21 21
22/* timer is based on PCLK and minimum division is 2 */ 22/* timer is based on PCLK and minimum division is 2 */
23#define TIMER_FREQ (49156800/2) 23#define TIMER_FREQ (27000000)
24 24
25bool __timer_set(long cycles, bool set); 25bool __timer_set(long cycles, bool set);
26bool __timer_register(void); 26bool __timer_register(void);