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| author | Michael Sevakis <jethead71@rockbox.org> | 2008-06-03 05:08:24 +0000 |
|---|---|---|
| committer | Michael Sevakis <jethead71@rockbox.org> | 2008-06-03 05:08:24 +0000 |
| commit | 191320cd0f39a1dd831273f6ad57602d1b2e6cf9 (patch) | |
| tree | ceedf028763a7855bf1b2caeb11765e7c6dd79af /firmware/target/arm/ipod | |
| parent | 606d9d0c83f8396fa418fa16a23da68aa2e4d784 (diff) | |
| download | rockbox-191320cd0f39a1dd831273f6ad57602d1b2e6cf9.tar.gz rockbox-191320cd0f39a1dd831273f6ad57602d1b2e6cf9.zip | |
Rename CPU/COP_INT_CLR to CPU/COP_INT_DIS since it's really a 'write one to disable' register and hasn't anything to do with acknowledging interrupts-- that's handled at the module level.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17683 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/ipod')
| -rw-r--r-- | firmware/target/arm/ipod/button-1g-3g.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/firmware/target/arm/ipod/button-1g-3g.c b/firmware/target/arm/ipod/button-1g-3g.c index c91051e78b..c869f6f271 100644 --- a/firmware/target/arm/ipod/button-1g-3g.c +++ b/firmware/target/arm/ipod/button-1g-3g.c | |||
| @@ -167,7 +167,7 @@ static int ipod_3g_button_read(void) | |||
| 167 | 167 | ||
| 168 | void ipod_3g_button_int(void) | 168 | void ipod_3g_button_int(void) |
| 169 | { | 169 | { |
| 170 | CPU_INT_CLR = GPIO_MASK; | 170 | CPU_INT_DIS = GPIO_MASK; |
| 171 | int_btn = ipod_3g_button_read(); | 171 | int_btn = ipod_3g_button_read(); |
| 172 | CPU_INT_EN = GPIO_MASK; | 172 | CPU_INT_EN = GPIO_MASK; |
| 173 | } | 173 | } |