diff options
author | Michael Sevakis <jethead71@rockbox.org> | 2009-02-11 12:55:51 +0000 |
---|---|---|
committer | Michael Sevakis <jethead71@rockbox.org> | 2009-02-11 12:55:51 +0000 |
commit | 21f0c9a2829415f52b64cbdf965b01525e78f17a (patch) | |
tree | b5cb8021097722969f75784011c9f64f991c0c3d /firmware/target/arm/imx31/gigabeat-s | |
parent | 4cd7597172d916db9fc99bde4c03b669366f852a (diff) | |
download | rockbox-21f0c9a2829415f52b64cbdf965b01525e78f17a.tar.gz rockbox-21f0c9a2829415f52b64cbdf965b01525e78f17a.zip |
Make basic cache functions into calls, and get rid of CACHE_FUNCTION_WRAPPERS and CACHE_FUNCTIONS_AS_CALL macros. Rename flush/invalidate_icache to cpucache_flush/invalidate. They're inlined only if an implementation isn't provided by defining HAVE_CPUCACHE_FLUSH/INVALIDATE.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@19971 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s')
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/system-target.h | 32 |
1 files changed, 5 insertions, 27 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-target.h b/firmware/target/arm/imx31/gigabeat-s/system-target.h index ae50ec4c78..921af0ec8b 100644 --- a/firmware/target/arm/imx31/gigabeat-s/system-target.h +++ b/firmware/target/arm/imx31/gigabeat-s/system-target.h | |||
@@ -57,34 +57,12 @@ void imx31_regclr32(volatile uint32_t *reg_p, uint32_t mask); | |||
57 | 57 | ||
58 | #define KDEV_INIT | 58 | #define KDEV_INIT |
59 | 59 | ||
60 | #define HAVE_INVALIDATE_ICACHE | 60 | #define HAVE_CPUCACHE_INVALIDATE |
61 | static inline void invalidate_icache(void) | 61 | #define HAVE_CPUCACHE_FLUSH |
62 | { | ||
63 | asm volatile( | ||
64 | /* Clean and invalidate entire data cache */ | ||
65 | "mcr p15, 0, %0, c7, c14, 0 \n" | ||
66 | /* Invalidate entire instruction cache | ||
67 | * Also flushes the branch target cache */ | ||
68 | "mcr p15, 0, %0, c7, c5, 0 \n" | ||
69 | /* Data synchronization barrier */ | ||
70 | "mcr p15, 0, %0, c7, c10, 4 \n" | ||
71 | /* Flush prefetch buffer */ | ||
72 | "mcr p15, 0, %0, c7, c5, 4 \n" | ||
73 | : : "r"(0) | ||
74 | ); | ||
75 | } | ||
76 | 62 | ||
77 | #define HAVE_FLUSH_ICACHE | 63 | /* Different internal names */ |
78 | static inline void flush_icache(void) | 64 | #define cpucache_flush clean_dcache |
79 | { | 65 | #define cpucache_invalidate invalidate_idcache |
80 | asm volatile ( | ||
81 | /* Clean entire data cache */ | ||
82 | "mcr p15, 0, %0, c7, c10, 0 \n" | ||
83 | /* Data synchronization barrier */ | ||
84 | "mcr p15, 0, %0, c7, c10, 4 \n" | ||
85 | : : "r"(0) | ||
86 | ); | ||
87 | } | ||
88 | 66 | ||
89 | struct ARM_REGS { | 67 | struct ARM_REGS { |
90 | int r0; | 68 | int r0; |