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author | Will Robertson <aliask@rockbox.org> | 2007-09-21 15:51:53 +0000 |
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committer | Will Robertson <aliask@rockbox.org> | 2007-09-21 15:51:53 +0000 |
commit | 590501cfe404b5463adecc70628e5bc7c8f142a2 (patch) | |
tree | 3b038f90c9c3bbef8cf0b84f5a4ea338f9599851 /firmware/target/arm/imx31/gigabeat-s/system-imx31.c | |
parent | a26110c52dff9bc15d20146462d52d07f61bd238 (diff) | |
download | rockbox-590501cfe404b5463adecc70628e5bc7c8f142a2.tar.gz rockbox-590501cfe404b5463adecc70628e5bc7c8f142a2.zip |
Merge the Gigabeat S branch back into trunk. Fingers crossed nothing breaks.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14805 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/gigabeat-s/system-imx31.c')
-rw-r--r-- | firmware/target/arm/imx31/gigabeat-s/system-imx31.c | 93 |
1 files changed, 93 insertions, 0 deletions
diff --git a/firmware/target/arm/imx31/gigabeat-s/system-imx31.c b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c new file mode 100644 index 0000000000..544ae3afe6 --- /dev/null +++ b/firmware/target/arm/imx31/gigabeat-s/system-imx31.c | |||
@@ -0,0 +1,93 @@ | |||
1 | #include "kernel.h" | ||
2 | #include "system.h" | ||
3 | #include "panic.h" | ||
4 | #include "mmu-imx31.h" | ||
5 | #include "system-target.h" | ||
6 | #include "lcd.h" | ||
7 | #include "serial-imx31.h" | ||
8 | #include "debug.h" | ||
9 | |||
10 | int system_memory_guard(int newmode) | ||
11 | { | ||
12 | (void)newmode; | ||
13 | return 0; | ||
14 | } | ||
15 | |||
16 | extern void timer4(void); | ||
17 | extern void dma0(void); /* free */ | ||
18 | extern void dma1(void); | ||
19 | extern void dma3(void); | ||
20 | |||
21 | void irq_handler(void) | ||
22 | { | ||
23 | } | ||
24 | |||
25 | #ifdef BOOTLOADER | ||
26 | void fiq_handler(void) | ||
27 | { | ||
28 | } | ||
29 | #endif | ||
30 | |||
31 | void system_reboot(void) | ||
32 | { | ||
33 | } | ||
34 | |||
35 | void system_init(void) | ||
36 | { | ||
37 | } | ||
38 | |||
39 | inline void dumpregs(void) | ||
40 | { | ||
41 | asm volatile ("mov %0,r0\n\t" | ||
42 | "mov %1,r1\n\t" | ||
43 | "mov %2,r2\n\t" | ||
44 | "mov %3,r3": | ||
45 | "=r"(regs.r0),"=r"(regs.r1), | ||
46 | "=r"(regs.r2),"=r"(regs.r3):); | ||
47 | |||
48 | asm volatile ("mov %0,r4\n\t" | ||
49 | "mov %1,r5\n\t" | ||
50 | "mov %2,r6\n\t" | ||
51 | "mov %3,r7": | ||
52 | "=r"(regs.r4),"=r"(regs.r5), | ||
53 | "=r"(regs.r6),"=r"(regs.r7):); | ||
54 | |||
55 | asm volatile ("mov %0,r8\n\t" | ||
56 | "mov %1,r9\n\t" | ||
57 | "mov %2,r10\n\t" | ||
58 | "mov %3,r12": | ||
59 | "=r"(regs.r8),"=r"(regs.r9), | ||
60 | "=r"(regs.r10),"=r"(regs.r11):); | ||
61 | |||
62 | asm volatile ("mov %0,r12\n\t" | ||
63 | "mov %1,sp\n\t" | ||
64 | "mov %2,lr\n\t" | ||
65 | "mov %3,pc\n" | ||
66 | "sub %3,%3,#8": | ||
67 | "=r"(regs.r12),"=r"(regs.sp), | ||
68 | "=r"(regs.lr),"=r"(regs.pc):); | ||
69 | #ifdef HAVE_SERIAL | ||
70 | dprintf("Register Dump :\n"); | ||
71 | dprintf("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3); | ||
72 | dprintf("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7); | ||
73 | dprintf("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11); | ||
74 | dprintf("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc); | ||
75 | //dprintf("CPSR=0x%x\t\n",regs.cpsr); | ||
76 | #endif | ||
77 | DEBUGF("Register Dump :\n"); | ||
78 | DEBUGF("R0=0x%x\tR1=0x%x\tR2=0x%x\tR3=0x%x\n",regs.r0,regs.r1,regs.r2,regs.r3); | ||
79 | DEBUGF("R4=0x%x\tR5=0x%x\tR6=0x%x\tR7=0x%x\n",regs.r4,regs.r5,regs.r6,regs.r7); | ||
80 | DEBUGF("R8=0x%x\tR9=0x%x\tR10=0x%x\tR11=0x%x\n",regs.r8,regs.r9,regs.r10,regs.r11); | ||
81 | DEBUGF("R12=0x%x\tSP=0x%x\tLR=0x%x\tPC=0x%x\n",regs.r12,regs.sp,regs.lr,regs.pc); | ||
82 | //DEBUGF("CPSR=0x%x\t\n",regs.cpsr); | ||
83 | |||
84 | } | ||
85 | |||
86 | #ifdef HAVE_ADJUSTABLE_CPU_FREQ | ||
87 | |||
88 | void set_cpu_frequency(long frequency) | ||
89 | { | ||
90 | (void)freqency; | ||
91 | } | ||
92 | |||
93 | #endif | ||