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author | Michael Sevakis <jethead71@rockbox.org> | 2010-05-08 07:45:34 +0000 |
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committer | Michael Sevakis <jethead71@rockbox.org> | 2010-05-08 07:45:34 +0000 |
commit | a420561bf8315f60c290ea41aaa7e80f410c592d (patch) | |
tree | 4f8f2e5e8ad8f613d3647a0239e8c40ed8b3cf8c /firmware/target/arm/imx31/ata-imx31.c | |
parent | 7f3b3494a6a4198c59e07d54ad979b7a764250b6 (diff) | |
download | rockbox-a420561bf8315f60c290ea41aaa7e80f410c592d.tar.gz rockbox-a420561bf8315f60c290ea41aaa7e80f410c592d.zip |
Gigabeat S: Reclaim about 800K of memory that was laying unused. Get rid of DEVBSS_ATTR for this target and implement as NOCACHEBSS_ATTR. Plugin and codec buffers move so all that is now incompatible (do full update). No version increase for plugins/codecs because the loader will reject them.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@25895 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx31/ata-imx31.c')
-rw-r--r-- | firmware/target/arm/imx31/ata-imx31.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/firmware/target/arm/imx31/ata-imx31.c b/firmware/target/arm/imx31/ata-imx31.c index 5ce7ad0a03..4c6bebd168 100644 --- a/firmware/target/arm/imx31/ata-imx31.c +++ b/firmware/target/arm/imx31/ata-imx31.c | |||
@@ -249,17 +249,17 @@ static struct wakeup ata_dma_wakeup; | |||
249 | 249 | ||
250 | /** SDMA **/ | 250 | /** SDMA **/ |
251 | /* Array of buffer descriptors for large transfers and alignnment */ | 251 | /* Array of buffer descriptors for large transfers and alignnment */ |
252 | static struct buffer_descriptor ata_bda[ATA_BD_COUNT] DEVBSS_ATTR; | 252 | static struct buffer_descriptor ata_bda[ATA_BD_COUNT] NOCACHEBSS_ATTR; |
253 | /* ATA channel descriptors */ | 253 | /* ATA channel descriptors */ |
254 | static struct channel_descriptor ata_cd_rd DEVBSS_ATTR; /* read channel */ | 254 | static struct channel_descriptor ata_cd_rd NOCACHEBSS_ATTR; /* read channel */ |
255 | static struct channel_descriptor ata_cd_wr DEVBSS_ATTR; /* write channel */ | 255 | static struct channel_descriptor ata_cd_wr NOCACHEBSS_ATTR; /* write channel */ |
256 | /* DMA channel to be started for transfer */ | 256 | /* DMA channel to be started for transfer */ |
257 | static unsigned int current_channel = 0; | 257 | static unsigned int current_channel = 0; |
258 | 258 | ||
259 | /** Buffers **/ | 259 | /** Buffers **/ |
260 | /* Scatter buffer for first and last 32 bytes of a non cache-aligned transfer | 260 | /* Scatter buffer for first and last 32 bytes of a non cache-aligned transfer |
261 | * to cached RAM. */ | 261 | * to cached RAM. */ |
262 | static uint32_t scatter_buffer[32/4*2] DEVBSS_ATTR; | 262 | static uint32_t scatter_buffer[32/4*2] NOCACHEBSS_ATTR; |
263 | /* Address of ends in destination buffer for unaligned reads - copied after | 263 | /* Address of ends in destination buffer for unaligned reads - copied after |
264 | * DMA completes. */ | 264 | * DMA completes. */ |
265 | static void *sb_dst[2] = { NULL, NULL }; | 265 | static void *sb_dst[2] = { NULL, NULL }; |