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authorAmaury Pouly <amaury.pouly@gmail.com>2016-05-24 20:29:56 +0100
committerAmaury Pouly <amaury.pouly@gmail.com>2016-05-28 16:49:22 +0200
commiteac1ca22bd4a6c1849880d0f8b6764befb60bc21 (patch)
tree681da66d77b9edcb33b868cf94886440d61997cc /firmware/target/arm/imx233/powermgmt-imx233.c
parent28920ec5cc994dff19bec100a57de4557f72a7f5 (diff)
downloadrockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.tar.gz
rockbox-eac1ca22bd4a6c1849880d0f8b6764befb60bc21.zip
imx233: generate register headers using headergen_v2 and update code for it
NOTE: this commit does not introduce any change, ideally even the binary should be almost the same. I checked the disassembly by hand and there are only a few differences here and there, mostly the compiler decides to compile very close expressions slightly differently. I tried to run the new code on several targets to make sure and saw no difference. The major syntax changes of the new headers are as follows: - BF_{WR,SET,CLR} are now superpowerful and allows to set several fileds at once: BF_WR(reg, field1(value1), field2(value2), ...) - BF_CS (use like BF_WR) does a write to reg_CLR and then reg_SET instead of RMW - there is no more need for macros like BF_{WR_,SET,CLR}_V, since one can simply BF_WR with field_V(name) - the old BF_SETV macro has no trivial equivalent and is replaced with its its equivalent for BF_WR(reg_SET, ...) I also rename the register headers: "regs/regs-x.h" -> "regs/x.h" to avoid the redundant "regs". Final note: the registers were generated using the following command: ./headergen_v2 -g imx -o ../../firmware/target/arm/imx233/regs/ desc/regs-stmp3{600,700,780}.xml Change-Id: I7485e8b4315a0929a8edb63e7fa1edcaa54b1edc
Diffstat (limited to 'firmware/target/arm/imx233/powermgmt-imx233.c')
-rw-r--r--firmware/target/arm/imx233/powermgmt-imx233.c27
1 files changed, 14 insertions, 13 deletions
diff --git a/firmware/target/arm/imx233/powermgmt-imx233.c b/firmware/target/arm/imx233/powermgmt-imx233.c
index 01d0e3eae1..5db03d4127 100644
--- a/firmware/target/arm/imx233/powermgmt-imx233.c
+++ b/firmware/target/arm/imx233/powermgmt-imx233.c
@@ -28,6 +28,8 @@
28#include "logf.h" 28#include "logf.h"
29#include "powermgmt-imx233.h" 29#include "powermgmt-imx233.h"
30 30
31#include "regs/power.h"
32
31#if !defined(IMX233_CHARGE_CURRENT) || !defined(IMX233_STOP_CURRENT) \ 33#if !defined(IMX233_CHARGE_CURRENT) || !defined(IMX233_STOP_CURRENT) \
32 || !defined(IMX233_CHARGING_TIMEOUT) || !defined(IMX233_TOPOFF_TIMEOUT) 34 || !defined(IMX233_CHARGING_TIMEOUT) || !defined(IMX233_TOPOFF_TIMEOUT)
33#error You must define IMX233_CHARGE_CURRENT, IMX233_STOP_CURRENT, \ 35#error You must define IMX233_CHARGE_CURRENT, IMX233_STOP_CURRENT, \
@@ -52,17 +54,16 @@ void imx233_powermgmt_init(void)
52 imx233_power_set_stop_current(IMX233_STOP_CURRENT); 54 imx233_power_set_stop_current(IMX233_STOP_CURRENT);
53#if IMX233_SUBTARGET >= 3700 55#if IMX233_SUBTARGET >= 3700
54 /* assume that adc_init was called and battery monitoring via LRADC setup */ 56 /* assume that adc_init was called and battery monitoring via LRADC setup */
55 BF_WR(POWER_BATTMONITOR, EN_BATADJ, 1); 57 BF_WR(POWER_BATTMONITOR, EN_BATADJ(1));
56 /* setup linear regulator offsets to 25 mV below to prevent contention between 58 /* setup linear regulator offsets to 25 mV below to prevent contention between
57 * linear regulators and DCDC */ 59 * linear regulators and DCDC */
58 BF_WR(POWER_VDDDCTRL, LINREG_OFFSET, 2); 60 BF_WR(POWER_VDDDCTRL, LINREG_OFFSET(2));
59 BF_WR(POWER_VDDACTRL, LINREG_OFFSET, 2); 61 BF_WR(POWER_VDDACTRL, LINREG_OFFSET(2));
60 BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET, 2); 62 BF_WR(POWER_VDDIOCTRL, LINREG_OFFSET(2));
61 /* enable a few bits controlling the DC-DC as recommended by Freescale */ 63 /* enable a few bits controlling the DC-DC as recommended by Freescale */
62 BF_SET(POWER_LOOPCTRL, TOGGLE_DIF); 64 BF_SET(POWER_LOOPCTRL, TOGGLE_DIF);
63 BF_SET(POWER_LOOPCTRL, EN_CM_HYST); 65 BF_SET(POWER_LOOPCTRL, EN_CM_HYST);
64 BF_CLR(POWER_LOOPCTRL, EN_RCSCALE); 66 BF_CS(POWER_LOOPCTRL, EN_RCSCALE(1));
65 BF_SETV(POWER_LOOPCTRL, EN_RCSCALE, 1);
66#else 67#else
67 BF_SET(POWER_5VCTRL, LINREG_OFFSET); 68 BF_SET(POWER_5VCTRL, LINREG_OFFSET);
68#endif 69#endif
@@ -86,9 +87,9 @@ void charging_algorithm_step(void)
86 /* 5V has been lost: disable 4p2 power rail */ 87 /* 5V has been lost: disable 4p2 power rail */
87 BF_SET(POWER_CHARGE, PWD_BATTCHRG); 88 BF_SET(POWER_CHARGE, PWD_BATTCHRG);
88#if IMX233_SUBTARGET >= 3780 89#if IMX233_SUBTARGET >= 3780
89 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 0); 90 BF_WR(POWER_DCDC4P2, ENABLE_DCDC(0));
90 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 0); 91 BF_WR(POWER_DCDC4P2, ENABLE_4P2(0));
91 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT, 1); 92 BF_WR(POWER_5VCTRL, CHARGE_4P2_ILIMIT(1));
92 BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2); 93 BF_SET(POWER_5VCTRL, PWD_CHARGE_4P2);
93#endif 94#endif
94 charge_state = DISCHARGING; 95 charge_state = DISCHARGING;
@@ -105,10 +106,10 @@ void charging_algorithm_step(void)
105 * we must *NOT* disable it or this will shutdown the device. This procedure 106 * we must *NOT* disable it or this will shutdown the device. This procedure
106 * is safe: it will never disable the DCDC and will not reduce the charge 107 * is safe: it will never disable the DCDC and will not reduce the charge
107 * limit on the 4P2 rail. */ 108 * limit on the 4P2 rail. */
108 BF_WR(POWER_DCDC4P2, ENABLE_4P2, 1); 109 BF_WR(POWER_DCDC4P2, ENABLE_4P2(1));
109 BF_SET(POWER_CHARGE, ENABLE_LOAD); 110 BF_SET(POWER_CHARGE, ENABLE_LOAD);
110 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);// FIXME: manual error ? 111 BF_CLR(POWER_5VCTRL, PWD_CHARGE_4P2);// FIXME: manual error ?
111 BF_WR(POWER_DCDC4P2, ENABLE_DCDC, 1); 112 BF_WR(POWER_DCDC4P2, ENABLE_DCDC(1));
112#endif 113#endif
113 timeout_4p2_ilimit_increase = current_tick + HZ / 100; 114 timeout_4p2_ilimit_increase = current_tick + HZ / 100;
114 charge_state = TRICKLE; 115 charge_state = TRICKLE;
@@ -132,8 +133,8 @@ void charging_algorithm_step(void)
132 logf("pwrmgmt: trickle -> charging"); 133 logf("pwrmgmt: trickle -> charging");
133#if IMX233_SUBTARGET >= 3780 134#if IMX233_SUBTARGET >= 3780
134 /* adjust arbitration between 4.2 and battery */ 135 /* adjust arbitration between 4.2 and battery */
135 BF_WR(POWER_DCDC4P2, CMPTRIP, 0); /* 85% */ 136 BF_WR(POWER_DCDC4P2, CMPTRIP(0)); /* 85% */
136 BF_WR(POWER_DCDC4P2, DROPOUT_CTRL, 0xe); /* select greater, 200 mV drop */ 137 BF_WR(POWER_DCDC4P2, DROPOUT_CTRL(0xe)); /* select greater, 200 mV drop */
137#endif 138#endif
138 /* switch to DCDC */ 139 /* switch to DCDC */
139 BF_CLR(POWER_5VCTRL, DCDC_XFER); 140 BF_CLR(POWER_5VCTRL, DCDC_XFER);