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author | Amaury Pouly <pamaury@rockbox.org> | 2011-06-17 22:30:58 +0000 |
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committer | Amaury Pouly <pamaury@rockbox.org> | 2011-06-17 22:30:58 +0000 |
commit | 2cf33133820ee17e4b5d2d622db15dedff1a1f6e (patch) | |
tree | 60eddf4c3f16d5d274bc111ce53db02cfe75a6e8 /firmware/target/arm/imx233/clkctrl-imx233.h | |
parent | d4800fa3851d2d89c1be03ec99af81f277892579 (diff) | |
download | rockbox-2cf33133820ee17e4b5d2d622db15dedff1a1f6e.tar.gz rockbox-2cf33133820ee17e4b5d2d622db15dedff1a1f6e.zip |
fuze+: add more clocking code, add dma code, add ssp code, add stub usb code, update storage to SD + MMC, beginning of the driver
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30010 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/imx233/clkctrl-imx233.h')
-rw-r--r-- | firmware/target/arm/imx233/clkctrl-imx233.h | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/firmware/target/arm/imx233/clkctrl-imx233.h b/firmware/target/arm/imx233/clkctrl-imx233.h index ffc15c1043..1533b52cce 100644 --- a/firmware/target/arm/imx233/clkctrl-imx233.h +++ b/firmware/target/arm/imx233/clkctrl-imx233.h | |||
@@ -31,9 +31,20 @@ | |||
31 | #define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26) | 31 | #define HW_CLKCTRL_XTAL__TIMROT_CLK32K_GATE (1 << 26) |
32 | 32 | ||
33 | #define HW_CLKCTRL_PIX (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60)) | 33 | #define HW_CLKCTRL_PIX (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x60)) |
34 | #define HW_CLKCTRL_SSP (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x70)) | ||
34 | 35 | ||
35 | #define HW_CLKCTRL_CLKSEQ (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110)) | 36 | #define HW_CLKCTRL_CLKSEQ (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x110)) |
36 | #define HW_CLKCTRL_CLKSEQ__BYPASS_PIX (1 << 1) | 37 | #define HW_CLKCTRL_CLKSEQ__BYPASS_PIX (1 << 1) |
38 | #define HW_CLKCTRL_CLKSEQ__BYPASS_SSP (1 << 5) | ||
39 | |||
40 | #define HW_CLKCTRL_FRAC (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0xf0)) | ||
41 | #define HW_CLKCTRL_FRAC_CPU (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf0)) | ||
42 | #define HW_CLKCTRL_FRAC_EMI (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf1)) | ||
43 | #define HW_CLKCTRL_FRAC_PIX (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf2)) | ||
44 | #define HW_CLKCTRL_FRAC_IO (*(volatile uint8_t *)(HW_CLKCTRL_BASE + 0xf3)) | ||
45 | #define HW_CLKCTRL_FRAC_XX__XXDIV_BM 0x3f | ||
46 | #define HW_CLKCTRL_FRAC_XX__XX_STABLE (1 << 6) | ||
47 | #define HW_CLKCTRL_FRAC_XX__CLKGATEXX (1 << 7) | ||
37 | 48 | ||
38 | #define HW_CLKCTRL_RESET (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x120)) | 49 | #define HW_CLKCTRL_RESET (*(volatile uint32_t *)(HW_CLKCTRL_BASE + 0x120)) |
39 | #define HW_CLKCTRL_RESET_CHIP 0x2 | 50 | #define HW_CLKCTRL_RESET_CHIP 0x2 |
@@ -42,11 +53,16 @@ | |||
42 | enum imx233_clock_t | 53 | enum imx233_clock_t |
43 | { | 54 | { |
44 | CLK_PIX, | 55 | CLK_PIX, |
56 | CLK_SSP, | ||
57 | CLK_IO, | ||
45 | }; | 58 | }; |
46 | 59 | ||
47 | void imx233_enable_timrot_xtal_clk32k(bool enable); | 60 | void imx233_enable_timrot_xtal_clk32k(bool enable); |
61 | /* only use it for non-fractional clocks (ie not for IO) */ | ||
48 | void imx233_enable_clock(enum imx233_clock_t clk, bool enable); | 62 | void imx233_enable_clock(enum imx233_clock_t clk, bool enable); |
49 | void imx233_set_clock_divisor(enum imx233_clock_t clk, int div); | 63 | void imx233_set_clock_divisor(enum imx233_clock_t clk, int div); |
64 | /* call with fracdiv=0 to disable it */ | ||
65 | void imx233_set_fractional_divisor(enum imx233_clock_t clk, int fracdiv); | ||
50 | void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass); | 66 | void imx233_set_bypass_pll(enum imx233_clock_t clk, bool bypass); |
51 | 67 | ||
52 | #endif /* CLKCTRL_IMX233_H */ | 68 | #endif /* CLKCTRL_IMX233_H */ |