AMS Sansa: FS#10669 Reimplement Voltage scaling.

Reimplement voltage scaling on AMS Sansas at 1.10v during unboosted operation to improve runtimes.  The voltage is now also boosted during disk access if a µSD is present.  This prevents the µSD problems we saw on the last implementation.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23193 a1c6a512-1295-4272-9138-f99709370657

1 files changed, 3 insertions, 4 deletions

diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index d68f2c4f00..ba817b4ad3 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -335,14 +335,13 @@ void set_cpu_frequency(long frequency)
 {
     if(frequency == CPUFREQ_MAX)
     {
-#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
         /* Increasing frequency so boost voltage before change */
         ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_20));
 
         /* Wait for voltage to be at least 1.20v before making fclk > 200 MHz */
         while(adc_read(ADC_CVDD) < 480) /* 480 * .0025 = 1.20V */
             ;
-#endif
+
         asm volatile(
             "mrc p15, 0, r0, c1, c0  \n"
 
@@ -365,10 +364,10 @@ void set_cpu_frequency(long frequency)
             "bic r0, r0, #3<<30      \n"     /* fastbus clocking */
             "mcr p15, 0, r0, c1, c0  \n"
             : : : "r0" );
-#ifdef HAVE_ADJUSTABLE_CPU_VOLTAGE
+
         /* Decreasing frequency so reduce voltage after change */
         ascodec_write(AS3514_CVDD_DCDC3, (AS314_CP_DCDC3_SETTING | CVDD_1_10));
-#endif
+
         cpu_frequency = CPUFREQ_NORMAL;
     }
 }