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| author | Jack Halpin <jack.halpin@gmail.com> | 2009-05-29 06:43:37 +0000 |
|---|---|---|
| committer | Jack Halpin <jack.halpin@gmail.com> | 2009-05-29 06:43:37 +0000 |
| commit | b714ace1634cd6da7f21fca10ac2e8981da7fc88 (patch) | |
| tree | 84226c4b9d07b2afeb75f57f755e6b3301fb5f66 /firmware/target/arm/as3525/clock-target.h | |
| parent | b4b7c7501e61b0c89233d8a43c8557053b859ddf (diff) | |
| download | rockbox-b714ace1634cd6da7f21fca10ac2e8981da7fc88.tar.gz rockbox-b714ace1634cd6da7f21fca10ac2e8981da7fc88.zip | |
AMSSansa: clock-target.h and debug-as3525 now use AS3525_FCLK_PREDIV correctly. Default frequency scheme remains 248/62/62.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@21125 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'firmware/target/arm/as3525/clock-target.h')
| -rw-r--r-- | firmware/target/arm/as3525/clock-target.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/firmware/target/arm/as3525/clock-target.h b/firmware/target/arm/as3525/clock-target.h index c9b2ceb9a4..923f4e7c43 100644 --- a/firmware/target/arm/as3525/clock-target.h +++ b/firmware/target/arm/as3525/clock-target.h | |||
| @@ -89,8 +89,8 @@ | |||
| 89 | 89 | ||
| 90 | /* FCLK */ | 90 | /* FCLK */ |
| 91 | #define AS3525_FCLK_SEL AS3525_CLK_PLLA | 91 | #define AS3525_FCLK_SEL AS3525_CLK_PLLA |
| 92 | #define AS3525_FCLK_PREDIV 0 /* div = (8-n)/8 acts strange when used!*/ | 92 | #define AS3525_FCLK_PREDIV 0 /* div = (8-n)/8 Enter manually & postdiv will be calculated*/ |
| 93 | #define AS3525_FCLK_POSTDIV (CLK_DIV(AS3525_PLLA_FREQ, AS3525_FCLK_FREQ) - 1) /*div=1/(n+1)*/ | 93 | #define AS3525_FCLK_POSTDIV (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), AS3525_FCLK_FREQ) - 1) /*div=1/(n+1)*/ |
| 94 | 94 | ||
| 95 | /* PCLK */ | 95 | /* PCLK */ |
| 96 | #ifdef ASYNCHRONOUS_BUS | 96 | #ifdef ASYNCHRONOUS_BUS |