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author | Solomon Peachy <pizza@shaftnet.org> | 2018-06-28 06:24:26 -0400 |
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committer | Michael Giacomelli <giac2000@hotmail.com> | 2018-07-28 10:56:31 -0400 |
commit | 0662793ca0050e823cd1207cc4689a1cba5068bd (patch) | |
tree | 08cd2ec59c9044c96b697b5bf8d0640841d044e0 /firmware/export/cs4398.h | |
parent | b3e2bd619b1b7ea94ef29d32db48e80b347a1990 (diff) | |
download | rockbox-0662793ca0050e823cd1207cc4689a1cba5068bd.tar.gz rockbox-0662793ca0050e823cd1207cc4689a1cba5068bd.zip |
Add cleaned-up xDuoo X3 support
Cleaned up, rebased, and forward-ported from the xvortex fork.
(original credit to vsoftster@gmail.com)
Change-Id: Ibcc023a0271ea81e901450a88317708c2683236d
Signed-off-by: Solomon Peachy <pizza@shaftnet.org>
Diffstat (limited to 'firmware/export/cs4398.h')
-rw-r--r-- | firmware/export/cs4398.h | 116 |
1 files changed, 116 insertions, 0 deletions
diff --git a/firmware/export/cs4398.h b/firmware/export/cs4398.h new file mode 100644 index 0000000000..99dce6b7fa --- /dev/null +++ b/firmware/export/cs4398.h | |||
@@ -0,0 +1,116 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * | ||
9 | * Copyright (C) 2016 by Roman Stolyarov | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or | ||
12 | * modify it under the terms of the GNU General Public License | ||
13 | * as published by the Free Software Foundation; either version 2 | ||
14 | * of the License, or (at your option) any later version. | ||
15 | * | ||
16 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
17 | * KIND, either express or implied. | ||
18 | * | ||
19 | ****************************************************************************/ | ||
20 | |||
21 | #ifndef _CS4398_H | ||
22 | #define _CS4398_H | ||
23 | |||
24 | #define CS4398_VOLUME_MIN -1270 | ||
25 | #define CS4398_VOLUME_MAX 0 | ||
26 | |||
27 | #define AUDIOHW_CAPS (FILTER_ROLL_OFF_CAP | LINEOUT_CAP) | ||
28 | AUDIOHW_SETTING(VOLUME, "dB", 0, 1, CS4398_VOLUME_MIN/10, CS4398_VOLUME_MAX/10, 0) | ||
29 | AUDIOHW_SETTING(FILTER_ROLL_OFF, "", 0, 1, 0, 1, 0) | ||
30 | |||
31 | void cs4398_write_reg(uint8_t reg, uint8_t val); | ||
32 | uint8_t cs4398_read_reg(uint8_t reg); | ||
33 | |||
34 | #define CS4398_I2C_ADDR 0x4f /* 1001111 */ | ||
35 | |||
36 | #define CS4398_REG_CHIPID 0x01 | ||
37 | #define CS4398_REG_MODECTL 0x02 | ||
38 | #define CS4398_REG_VOLMIX 0x03 | ||
39 | #define CS4398_REG_MUTE 0x04 | ||
40 | #define CS4398_REG_VOL_A 0x05 | ||
41 | #define CS4398_REG_VOL_B 0x06 | ||
42 | #define CS4398_REG_RAMPFILT 0x07 | ||
43 | #define CS4398_REG_MISC 0x08 | ||
44 | #define CS4398_REG_MISC2 0x09 | ||
45 | |||
46 | /* REG_CHIPID */ | ||
47 | #define CS4398_REV_MASK 0x07 | ||
48 | #define CS4398_PART_MASK 0xf8 | ||
49 | #define CS4398_PART_CS4398 0x70 | ||
50 | /* REG_MODECTL */ | ||
51 | #define CS4398_FM_MASK 0x03 | ||
52 | #define CS4398_FM_SINGLE 0x00 | ||
53 | #define CS4398_FM_DOUBLE 0x01 | ||
54 | #define CS4398_FM_QUAD 0x02 | ||
55 | #define CS4398_FM_DSD 0x03 | ||
56 | #define CS4398_DEM_MASK 0x0c | ||
57 | #define CS4398_DEM_NONE 0x00 | ||
58 | #define CS4398_DEM_44100 0x04 | ||
59 | #define CS4398_DEM_48000 0x08 | ||
60 | #define CS4398_DEM_32000 0x0c | ||
61 | #define CS4398_DIF_MASK 0x70 | ||
62 | #define CS4398_DIF_LJUST 0x00 | ||
63 | #define CS4398_DIF_I2S 0x10 | ||
64 | #define CS4398_DIF_RJUST_16 0x20 | ||
65 | #define CS4398_DIF_RJUST_24 0x30 | ||
66 | #define CS4398_DIF_RJUST_20 0x40 | ||
67 | #define CS4398_DIF_RJUST_18 0x50 | ||
68 | #define CS4398_DSD_SRC 0x80 | ||
69 | /* REG_VOLMIX */ | ||
70 | #define CS4398_ATAPI_MASK 0x1f | ||
71 | #define CS4398_ATAPI_B_MUTE 0x00 | ||
72 | #define CS4398_ATAPI_B_R 0x01 | ||
73 | #define CS4398_ATAPI_B_L 0x02 | ||
74 | #define CS4398_ATAPI_B_LR 0x03 | ||
75 | #define CS4398_ATAPI_A_MUTE 0x00 | ||
76 | #define CS4398_ATAPI_A_R 0x04 | ||
77 | #define CS4398_ATAPI_A_L 0x08 | ||
78 | #define CS4398_ATAPI_A_LR 0x0c | ||
79 | #define CS4398_ATAPI_MIX_LR_VOL 0x10 | ||
80 | #define CS4398_INVERT_B 0x20 | ||
81 | #define CS4398_INVERT_A 0x40 | ||
82 | #define CS4398_VOL_B_EQ_A 0x80 | ||
83 | /* REG_MUTE */ | ||
84 | #define CS4398_MUTEP_MASK 0x03 | ||
85 | #define CS4398_MUTEP_AUTO 0x00 | ||
86 | #define CS4398_MUTEP_LOW 0x02 | ||
87 | #define CS4398_MUTEP_HIGH 0x03 | ||
88 | #define CS4398_MUTE_B 0x08 | ||
89 | #define CS4398_MUTE_A 0x10 | ||
90 | #define CS4398_MUTEC_A_EQ_B 0x20 | ||
91 | #define CS4398_DAMUTE 0x40 | ||
92 | #define CS4398_PAMUTE 0x80 | ||
93 | /* REG_VOL_A */ | ||
94 | #define CS4398_VOL_A_MASK 0xff | ||
95 | /* REG_VOL_B */ | ||
96 | #define CS4398_VOL_B_MASK 0xff | ||
97 | /* REG_RAMPFILT */ | ||
98 | #define CS4398_DIR_DSD 0x01 | ||
99 | #define CS4398_FILT_SEL 0x04 | ||
100 | #define CS4398_RMP_DN 0x10 | ||
101 | #define CS4398_RMP_UP 0x20 | ||
102 | #define CS4398_ZERO_CROSS 0x40 | ||
103 | #define CS4398_SOFT_RAMP 0x80 | ||
104 | /* REG_MISC */ | ||
105 | #define CS4398_MCLKDIV3 0x08 | ||
106 | #define CS4398_MCLKDIV2 0x10 | ||
107 | #define CS4398_FREEZE 0x20 | ||
108 | #define CS4398_CPEN 0x40 | ||
109 | #define CS4398_PDN 0x80 | ||
110 | /* REG_MISC2 */ | ||
111 | #define CS4398_DSD_PM_EN 0x01 | ||
112 | #define CS4398_DSD_PM_MODE 0x02 | ||
113 | #define CS4398_INVALID_DSD 0x04 | ||
114 | #define CS4398_STATIC_DSD 0x08 | ||
115 | |||
116 | #endif | ||