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| author | Aidan MacDonald <amachronic@protonmail.com> | 2021-03-03 23:48:49 +0000 |
|---|---|---|
| committer | Aidan MacDonald <amachronic@protonmail.com> | 2021-03-03 23:57:08 +0000 |
| commit | 8cb4c18310f3975adfa318154b1b9c317fcdbfab (patch) | |
| tree | 4fe7f92b52691d32c2cec33387dcf76c2aa53b59 /firmware/drivers | |
| parent | cde5ae755fde5b645ab287a91c613f803a88d79d (diff) | |
| download | rockbox-8cb4c18310f3975adfa318154b1b9c317fcdbfab.tar.gz rockbox-8cb4c18310f3975adfa318154b1b9c317fcdbfab.zip | |
Really fix the MIPS cache bug this time
In fixing the original bug I tried to optimize discard_dcache_range()
to minimize writeback and inadvertently introduced a second bug, which
typically ends in a TLB refill panic.
It occurs only if the range fits within one cache line, and when both
the start and end of the range are not aligned to a cache line. This
causes ptr to be incremented and end to be decremented, so ptr > end,
and the loop can't terminate.
Change-Id: Ibaac072f1369268d3327d534ad08ef9dcee3db65
Diffstat (limited to 'firmware/drivers')
0 files changed, 0 insertions, 0 deletions