Removed the Gmini 120 and Gmini SP code. These ports are dead, unfortunately.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@11504 a1c6a512-1295-4272-9138-f99709370657

8 files changed, 12 insertions, 315 deletions

diff --git a/firmware/drivers/adc.c b/firmware/drivers/adc.c
index adeace005b..f002be96b4 100644
--- a/firmware/drivers/adc.c
+++ b/firmware/drivers/adc.c
@@ -109,50 +109,4 @@ void adc_init(void)
     sleep(2);    /* Ensure valid readings when adc_init returns */
 }
 
-#elif CONFIG_CPU == TCC730
-
-
-/**************************************************************************
- **
- ** Each channel will be updated HZ/CHANNEL_ORDER_SIZE times per second.
- **
- *************************************************************************/
-
-static int current_channel;
-static int current_channel_idx;
-static unsigned short adcdata[NUM_ADC_CHANNELS];
-
-#define CHANNEL_ORDER_SIZE 2
-static int channel_order[CHANNEL_ORDER_SIZE] = {6,7};
-
-static void adc_tick(void)
-{
-    if (ADCON & (1 << 3)) {
-        /* previous conversion finished? */
-        adcdata[current_channel] = ADDATA >> 6;
-        if (++current_channel_idx >= CHANNEL_ORDER_SIZE)
-            current_channel_idx = 0;
-        current_channel = channel_order[current_channel_idx];
-        int adcon = (current_channel << 4) | 1;
-        ADCON = adcon;
-    }
-}
-
-unsigned short adc_read(int channel)
-{
-    return adcdata[channel];
-}
-
-void adc_init(void)
-{
-    current_channel_idx = 0;
-    current_channel = channel_order[current_channel_idx];
-  
-    ADCON = (current_channel << 4) | 1;
-  
-    tick_add_task(adc_tick);
-  
-    sleep(2);    /* Ensure valid readings when adc_init returns */
-}
-
 #endif
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c
index 4017d5f3f7..c882c22fe1 100644
--- a/firmware/drivers/ata.c
+++ b/firmware/drivers/ata.c
@@ -84,104 +84,6 @@
 #define SET_REG(reg,val) reg = (val)
 #define SET_16BITREG(reg,val) reg = (val)
 
-#elif CONFIG_CPU == TCC730
-
-/* Plain C read & write loops */
-#define PREFER_C_READING
-#define PREFER_C_WRITING
-
-#define SWAP_WORDS
-
-#define ATA_DATA_IDX        (0xD0)
-#define ATA_ERROR_IDX       (0xD2) 
-#define ATA_NSECTOR_IDX     (0xD4)
-#define ATA_SECTOR_IDX      (0xD6)
-#define ATA_LCYL_IDX        (0xD8)
-#define ATA_HCYL_IDX        (0xDA)
-#define ATA_SELECT_IDX      (0xDC)
-#define ATA_COMMAND_IDX     (0xDE)
-#define ATA_CONTROL_IDX     (0xEC)
-
-#define ATA_FEATURE_IDX     ATA_ERROR_IDX
-#define ATA_STATUS_IDX      ATA_COMMAND_IDX
-#define ATA_ALT_STATUS_IDX  ATA_CONTROL_IDX
-
-#define SET_REG(reg, value) (ide_write_register(reg ## _IDX, value))
-#define SET_16BITREG(reg, value) (ide_write_register(reg ## _IDX, value))
-#define GET_REG(reg) (ide_read_register(reg))
-
-#define ATA_DATA        (GET_REG(ATA_DATA_IDX))
-#define ATA_ERROR       (GET_REG(ATA_ERROR_IDX))
-#define ATA_NSECTOR     (GET_REG(ATA_NSECTOR_IDX))
-#define ATA_SECTOR      (GET_REG(ATA_SECTOR_IDX))
-#define ATA_LCYL        (GET_REG(ATA_LCYL_IDX))
-#define ATA_HCYL        (GET_REG(ATA_HCYL_IDX))
-#define ATA_SELECT      (GET_REG(ATA_SELECT_IDX))
-#define ATA_COMMAND     (GET_REG(ATA_COMMAND_IDX))
-
-#define ATA_CONTROL     (GET_REG(ATA_CONTROL_IDX))
-
-#define STATUS_BSY      0x80
-#define STATUS_RDY      0x40
-#define STATUS_DF       0x20
-#define STATUS_DRQ      0x08
-#define STATUS_ERR      0x01
-
-#define ERROR_ABRT      0x04
-
-#define WRITE_PATTERN1 0xa5
-#define WRITE_PATTERN2 0x5a
-#define WRITE_PATTERN3 0xaa
-#define WRITE_PATTERN4 0x55
-
-#define READ_PATTERN1 0xa5
-#define READ_PATTERN2 0x5a
-#define READ_PATTERN3 0xaa
-#define READ_PATTERN4 0x55
-
-#define READ_PATTERN1_MASK 0xff
-#define READ_PATTERN2_MASK 0xff
-#define READ_PATTERN3_MASK 0xff
-#define READ_PATTERN4_MASK 0xff
-
-static unsigned char ide_sector_data[SECTOR_SIZE] __attribute__ ((section(".idata")));
-static unsigned ide_reg_temp __attribute__ ((section(".idata")));
-
-void ide_write_register(int reg, int value) {
-    /* Archos firmware code does (sometimes!) this:
-       set the RAM speed to 8 cycles. 
-       MIUSCFG |= 0x7;
-    */
-
-    ide_reg_temp = value;
-
-    long extAddr = (long)reg << 16;
-    ddma_transfer(1, 1, &ide_reg_temp, extAddr, 2);  
-
-    /* set the RAM speed to 6 cycles.
-    unsigned char miuscfg = MIUSCFG;
-    miuscfg = (miuscfg & ~7) | 5;
-    */
-}
-
-int ide_read_register(int reg) {
-    /* set the RAM speed to 6 cycles. 
-       unsigned char miuscfg = MIUSCFG;
-       miuscfg = (miuscfg & ~7) | 5;
-       MIUSCFG = miuscfg; */
-  
-    long extAddr = (long)reg << 16;
-    ddma_transfer(0, 1, &ide_reg_temp, extAddr, 2);
-  
-    /* This is done like this in the archos firmware... 
-       miuscfg = MIUSCFG;
-       miuscfg = (miuscfg & ~7) | 5;
-       MIUSCFG = miuscfg;
-       Though I'd expect MIUSCFG &= ~0x7; (1 cycle) */
-  
-    return ide_reg_temp;
-}
-
 #endif
 
 #ifndef NOINLINE_ATTR
@@ -349,16 +251,7 @@ static void copy_read_sectors(unsigned char* buf, int wordcount)
         } while (++wbuf < wbufend); /* tail loop is faster */
     }
 #else /* !PREFER_C_READING */
-#if CONFIG_CPU == TCC730
-    int sectorcount = wordcount / 0x100;
-    do {
-        /* Slurp an entire sector with a single dma transfer */
-        ddma_transfer(0, 1, ide_sector_data, ATA_DATA_IDX << 16, SECTOR_SIZE);
-        memcpy(buf, ide_sector_data, SECTOR_SIZE);
-        buf += SECTOR_SIZE;
-        sectorcount--;
-    } while (sectorcount > 0);
-#elif defined(CPU_COLDFIRE)
+#if defined(CPU_COLDFIRE)
     unsigned char* bufend = buf + 2 * wordcount;
     /* coldfire asm reading, utilising line bursts */
     /* this assumes there is at least one full line to copy */
@@ -1416,23 +1309,6 @@ int ata_hard_reset(void)
     /* state HRR1 */
     or_b(0x02, &PADRH); /* negate _RESET */
     sleep(1); /* > 2ms */
-#elif CONFIG_CPU == TCC730
-
-    P6 &= ~0x40;
-    ddma_transfer(0, 1, ide_sector_data, 0xF00000, SECTOR_SIZE);
-    P6 |= 0x40;
-    
-    /*
-      What can the following do?
-    P1 |= 0x04;
-    P10CON &= ~0x56;
-    sleep(1);
-
-    P10CON |= 0x56;
-    P10 &= ~0x56;
-    P1 &= ~0x04;
-    sleep(1);
-    */
 #endif
 
     /* state HRR2 */
@@ -1561,8 +1437,6 @@ void ata_enable(bool on)
         or_b(0x80, &PADRL); /* disable ATA */
 
     or_b(0x80, &PAIORL);
-#elif CONFIG_CPU == TCC730
-
 #endif
 }
 #endif
@@ -1712,8 +1586,6 @@ int ata_init(void)
     int rc;
 #ifdef TARGET_TREE
     bool coldstart = ata_is_coldstart();
-#elif CONFIG_CPU == TCC730
-    bool coldstart = (P1 & 0x80) == 0;
 #else
     bool coldstart = (PACR2 & 0x4000) != 0;
 #endif
diff --git a/firmware/drivers/button.c b/firmware/drivers/button.c
index 561dc6ee14..01b9174dae 100644
--- a/firmware/drivers/button.c
+++ b/firmware/drivers/button.c
@@ -314,8 +314,6 @@ void button_init(void)
     PAIOR &= ~0x0820; /* Inputs */
 #elif CONFIG_KEYPAD == ONDIO_PAD
     /* nothing to initialize here */
-#elif CONFIG_KEYPAD == GMINI100_PAD
-    /* nothing to initialize here */
 #endif /* CONFIG_KEYPAD */
     queue_init(&button_queue, true);
     button_read();
@@ -599,38 +597,6 @@ static int button_read(void)
     if(adc_read(ADC_BUTTON_ONOFF) < 0x120) /* active low */
         btn |= BUTTON_OFF;
 
-#elif CONFIG_KEYPAD == GMINI100_PAD
-    data = adc_read(7);
-    if (data < 0x38a)
-    {
-        if (data < 0x1c5)
-            if (data < 0xe3)
-                btn = BUTTON_LEFT;
-            else
-                btn = BUTTON_DOWN;
-        else
-            if (data < 0x2a2)
-                btn = BUTTON_RIGHT;
-            else
-                btn = BUTTON_UP;
-    }
-
-    data = adc_read(6);
-    if (data < 0x355)
-    {
-        if (data < 0x288)
-            if (data < 0x233)
-                btn |= BUTTON_OFF;
-            else
-                btn |= BUTTON_PLAY;
-        else
-            btn |= BUTTON_MENU;
-    }
-
-    data = P7;
-    if (data & 0x01)
-        btn |= BUTTON_ON;
-
 #endif /* CONFIG_KEYPAD */
 
 #ifdef HAVE_LCD_BITMAP
diff --git a/firmware/drivers/i2c.c b/firmware/drivers/i2c.c
index 2b439c23ad..83ac21fae8 100644
--- a/firmware/drivers/i2c.c
+++ b/firmware/drivers/i2c.c
@@ -24,26 +24,6 @@
 #include "system.h"
 
 /* cute little functions, atomic read-modify-write */
-#if CONFIG_I2C == I2C_GMINI
-
-/* This is done like this in the Archos' firmware.
- * However, the TCC370 has an integrated I2C
- * controller (bound to the same lines). It should be
- * possible to use it and thus save some space in flash.
- */
-#define SDA_LO     (P3 &= ~0x20)
-#define SDA_HI     (P3 |= 0x20)
-#define SDA_INPUT  (P3CONH &= ~0x0C)
-#define SDA_OUTPUT (P3CONH |= 0x04)
-#define SDA        (P3 & 0x20)
-
-#define SCL_LO     (P3 &= ~0x10)
-#define SCL_HI     (P3 |= 0x10)
-#define SCL_INPUT  (P3CONH &= ~0x03)
-#define SCL_OUTPUT (P3CONH |= 0x01)
-#define SCL        (P3 & 0x10)
-
-#else /* non Gmini below */
 
 /* SDA is PB7 */
 #define SDA_LO     and_b(~0x80, &PBDRL)
@@ -67,7 +47,6 @@
 #define SCL_HI     or_b(0x20, &PBDRH)
 #define SCL        (PBDRH & 0x20)
 #endif
-#endif /* ! I2C_GMINI */
 
 /* arbitrary delay loop */
 #define DELAY   do { int _x; for(_x=0;_x<20;_x++);} while (0)
@@ -106,13 +85,10 @@ void i2c_init(void)
 {
    int i;
 
-#if CONFIG_I2C == I2C_GMINI
-   SCL_INPUT;
-   SDA_INPUT;   
-#elif CONFIG_I2C == I2C_ONDIO
+#if CONFIG_I2C == I2C_ONDIO
    /* make PB6 & PB7 general I/O */
    PBCR2 &= ~0xf000;
-#else /* not Gmini, not Ondio */
+#else /* not Ondio */
    /* make PB7 & PB13 general I/O */
    PBCR1 &= ~0x0c00; /* PB13 */
    PBCR2 &= ~0xc000; /* PB7 */
diff --git a/firmware/drivers/lcd-recorder.c b/firmware/drivers/lcd-recorder.c
index ceeb413709..5c4a0352a7 100644
--- a/firmware/drivers/lcd-recorder.c
+++ b/firmware/drivers/lcd-recorder.c
@@ -108,35 +108,7 @@ static const char scroll_tick_table[16] = {
 
 /* optimised archos recorder code is in lcd.S */
 
-#if CONFIG_CPU == TCC730
-/* Optimization opportunity:
-   In the following I do exactly as in the archos firmware.
-   There is probably a better way (ie. do only one mask operation)
-*/
-void lcd_write_command(int cmd) {
-    P2 &= 0xF7;
-    P2 &= 0xDF;
-    P2 &= 0xFB;
-    P0 = cmd;
-    P2 |= 0x04;
-    P2 |= 0x08;
-    P2 |= 0x20;
-}
-
-void lcd_write_data( const unsigned char* data, int count ) {
-    int i;
-    for (i=0; i < count; i++) {
-        P2 |= 0x08;
-        P2 &= 0xDF;
-        P2 &= 0xFB;
-        P0 = data[i];
-        P2 |= 0x04;
-        P2 |= 0x08;
-        P2 |= 0x20;
-    }
-}
-
-#elif CONFIG_CPU == PNX0101
+#if CONFIG_CPU == PNX0101
 
 void lcd_write_command(int cmd)
 {
@@ -161,9 +133,7 @@ void lcd_write_data( const unsigned char* data, int count )
 
 int lcd_default_contrast(void)
 {
-#if CONFIG_LCD == LCD_GMINI100
-    return 31;
-#elif CONFIG_LCD == LCD_IFP7XX
+#if CONFIG_LCD == LCD_IFP7XX
     return 45;
 #else
     return (read_hw_mask() & LCD_CONTRAST_BIAS) ? 31 : 49;
@@ -192,20 +162,6 @@ void lcd_set_flip(bool yesno)
 #else
     if (yesno) 
 #endif
-#if CONFIG_LCD == LCD_GMINI100
-    {
-        lcd_write_command(LCD_SET_SEGMENT_REMAP | 0x01);
-        lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08);
-        xoffset = 132 - LCD_WIDTH;
-    } 
-    else 
-    {
-        lcd_write_command(LCD_SET_SEGMENT_REMAP);
-        lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION | 0x08);
-        xoffset = 0;
-    }
-#else
-
     {
         lcd_write_command(LCD_SET_SEGMENT_REMAP);
         lcd_write_command(LCD_SET_COM_OUTPUT_SCAN_DIRECTION);
@@ -221,7 +177,6 @@ void lcd_set_flip(bool yesno)
         xoffset = 0;
 #endif
     }
-#endif
 }
 
 #endif /* !SIMULATOR */
@@ -238,15 +193,7 @@ void lcd_init(void)
 
 void lcd_init(void)
 {
-#if CONFIG_CPU == TCC730
-    /* Initialise P0 & some P2 output pins:
-       P0 -> all pins normal cmos output 
-       P2 -> pins 1 to 5 normal cmos output. */
-    P0CON = 0xff;
-    P2CONL |= 0x5a;
-    P2CONL &= 0x5b;
-    P2CONH |= 1;
-#elif CONFIG_CPU == PNX0101
+#if CONFIG_CPU == PNX0101
     LCDREG10 = 0xf;
     LCDREG04 = 0x4084;
 #else
diff --git a/firmware/drivers/led.c b/firmware/drivers/led.c
index 118911a746..a9be9399c8 100644
--- a/firmware/drivers/led.c
+++ b/firmware/drivers/led.c
@@ -28,11 +28,6 @@
 void led(bool on)
 {
     if ( on )
-#ifdef GMINI_ARCH
-        P2 |= 1;
-    else
-        P2 &= ~1;
-#else
     {
         or_b(0x40, &PBDRL);
     }
@@ -40,7 +35,6 @@ void led(bool on)
     {
         and_b(~0x40, &PBDRL);
     }
-#endif
 }
 
 #elif (CONFIG_LED == LED_VIRTUAL) || defined(HAVE_REMOTE_LCD)
diff --git a/firmware/drivers/power.c b/firmware/drivers/power.c
index e0a5de4bfb..872e8b0657 100644
--- a/firmware/drivers/power.c
+++ b/firmware/drivers/power.c
@@ -86,9 +86,7 @@ void power_init(void)
 #ifdef CONFIG_CHARGING
 bool charger_inserted(void)
 {     
-#if defined(GMINI_ARCH)
-    return (P7 & 0x80) == 0;
-#elif CONFIG_CHARGING == CHARGING_CONTROL
+#if CONFIG_CHARGING == CHARGING_CONTROL
     /* Recorder */
     return adc_read(ADC_EXT_POWER) > 0x100;
 #elif defined (HAVE_FMADC)
@@ -139,12 +137,7 @@ void ide_power_enable(bool on)
 {
     (void)on;
 
-#if defined(GMINI_ARCH)
-    if(on)
-        P1 |= 0x08;
-    else
-        P1 &= ~0x08;
-#elif defined(TOSHIBA_GIGABEAT_F)
+#if defined(TOSHIBA_GIGABEAT_F)
     /* Gigabeat TODO */
 #else /* SH1 based archos */
     bool touched = false;
@@ -189,9 +182,7 @@ void ide_power_enable(bool on)
 
 bool ide_powered(void)
 {
-#if defined(GMINI_ARCH)
-    return (P1 & 0x08?true:false);
-#elif defined(TOSHIBA_GIGABEAT_F)
+#if defined(TOSHIBA_GIGABEAT_F)
     return false;
 #else /* SH1 based archos */
 #if defined(NEEDS_ATA_POWER_ON) || defined(HAVE_ATA_POWER_OFF)
@@ -220,10 +211,7 @@ bool ide_powered(void)
 void power_off(void)
 {
     set_irq_level(HIGHEST_IRQ_LEVEL);
-#if defined(GMINI_ARCH)
-    P1 &= ~1;
-    P1CON &= ~1;
-#elif defined(TOSHIBA_GIGABEAT_F)
+#if defined(TOSHIBA_GIGABEAT_F)
     /* FIXME: Can we turn the device off, or only enter sleep mode? */
 #else
 #ifdef HAVE_POWEROFF_ON_PBDR
diff --git a/firmware/drivers/serial.c b/firmware/drivers/serial.c
index 5120161467..866d7616ed 100644
--- a/firmware/drivers/serial.c
+++ b/firmware/drivers/serial.c
@@ -30,7 +30,7 @@
 
 #if CONFIG_CPU == SH7034
 
-/* FIX: this doesn't work on iRiver or Gmini or iPod yet */
+/* FIX: this doesn't work on iRiver or iPod yet */
 /* iFP7xx has no remote */
 
 #ifndef HAVE_MMC /* MMC takes serial port 1, so don't mess with it */
@@ -172,4 +172,4 @@ void serial_setup (void)
 {
     /* a dummy */
 }
-#endif /* ! (CONFIG_CPU != MCF5249) && (CONFIG_CPU != TCC730) */
+#endif