diff options
author | Jens Arnold <amiconn@rockbox.org> | 2007-11-03 22:47:27 +0000 |
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committer | Jens Arnold <amiconn@rockbox.org> | 2007-11-03 22:47:27 +0000 |
commit | 33acc662569ab01e0770b85a6b32c57ed340c351 (patch) | |
tree | 57608dcec79578adc0896084f5fe94f5bff87239 /apps/debug_menu.c | |
parent | 9784f6b7528e37ff156a694607cdc7b674ac0968 (diff) | |
download | rockbox-33acc662569ab01e0770b85a6b32c57ed340c351.tar.gz rockbox-33acc662569ab01e0770b85a6b32c57ed340c351.zip |
* Add newfound GPO32 register to pp502x.h. * Introduce macros for the PP502x's atomic GPIO bit manipulation feature. * Remove clock setup related registers from debug screen, and add DEV_EN2, DEV_EN3 (to be verified) and GPO32 instead.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15443 a1c6a512-1295-4272-9138-f99709370657
Diffstat (limited to 'apps/debug_menu.c')
-rw-r--r-- | apps/debug_menu.c | 20 |
1 files changed, 8 insertions, 12 deletions
diff --git a/apps/debug_menu.c b/apps/debug_menu.c index 301fca834b..918a969a95 100644 --- a/apps/debug_menu.c +++ b/apps/debug_menu.c | |||
@@ -622,7 +622,7 @@ static bool dbg_hw_info(void) | |||
622 | 622 | ||
623 | snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck()); | 623 | snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck()); |
624 | lcd_puts(0, line++, buf); | 624 | lcd_puts(0, line++, buf); |
625 | 625 | ||
626 | lcd_update(); | 626 | lcd_update(); |
627 | 627 | ||
628 | while (!(action_userabort(TIMEOUT_BLOCK))); | 628 | while (!(action_userabort(TIMEOUT_BLOCK))); |
@@ -651,7 +651,7 @@ static bool dbg_hw_info(void) | |||
651 | lcd_puts(0, line++, buf); | 651 | lcd_puts(0, line++, buf); |
652 | 652 | ||
653 | snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck()); | 653 | snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck()); |
654 | lcd_puts(0, line++, buf); | 654 | lcd_puts(0, line++, buf); |
655 | 655 | ||
656 | lcd_update(); | 656 | lcd_update(); |
657 | 657 | ||
@@ -1201,19 +1201,15 @@ bool dbg_ports(void) | |||
1201 | snprintf(buf, sizeof(buf), "GPIO_F: %02x GPIO_L: %02x", gpio_f, gpio_l); | 1201 | snprintf(buf, sizeof(buf), "GPIO_F: %02x GPIO_L: %02x", gpio_f, gpio_l); |
1202 | lcd_puts(0, line++, buf); | 1202 | lcd_puts(0, line++, buf); |
1203 | line++; | 1203 | line++; |
1204 | 1204 | ||
1205 | snprintf(buf, sizeof(buf), "DEV_EN: %08lx", DEV_EN); | 1205 | snprintf(buf, sizeof(buf), "GPO32: %08lx", GPO32_VAL); |
1206 | lcd_puts(0, line++, buf); | ||
1207 | snprintf(buf, sizeof(buf), "CLOCK_SRC: %08lx", CLOCK_SOURCE); | ||
1208 | lcd_puts(0, line++, buf); | ||
1209 | snprintf(buf, sizeof(buf), "CLCD_CLK_SRC: %08lx", CLCD_CLOCK_SRC); | ||
1210 | lcd_puts(0, line++, buf); | ||
1211 | snprintf(buf, sizeof(buf), "PLL_CONTROL: %08lx", PLL_CONTROL); | ||
1212 | lcd_puts(0, line++, buf); | 1206 | lcd_puts(0, line++, buf); |
1213 | snprintf(buf, sizeof(buf), "PLL_STATUS: %08lx", PLL_STATUS); | 1207 | snprintf(buf, sizeof(buf), "DEV_EN: %08lx", DEV_EN); |
1214 | lcd_puts(0, line++, buf); | 1208 | lcd_puts(0, line++, buf); |
1215 | snprintf(buf, sizeof(buf), "DEV_TIMING1: %08lx", DEV_TIMING1); | 1209 | snprintf(buf, sizeof(buf), "DEV_EN2: %08lx", DEV_EN2); |
1216 | lcd_puts(0, line++, buf); | 1210 | lcd_puts(0, line++, buf); |
1211 | snprintf(buf, sizeof(buf), "DEV_EN3: %08lx", inl(0x60006044)); | ||
1212 | lcd_puts(0, line++, buf); /* to be verified */ | ||
1217 | 1213 | ||
1218 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) | 1214 | #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) |
1219 | line++; | 1215 | line++; |