* Add newfound GPO32 register to pp502x.h. * Introduce macros for the PP502x's atomic GPIO bit manipulation feature. * Remove clock setup related registers from debug screen, and add DEV_EN2, DEV_EN3 (to be verified) and GPO32 instead.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15443 a1c6a512-1295-4272-9138-f99709370657

2 files changed, 20 insertions, 12 deletions

diff --git a/apps/debug_menu.c b/apps/debug_menu.c
index 301fca834b..918a969a95 100644
--- a/apps/debug_menu.c
+++ b/apps/debug_menu.c
@@ -622,7 +622,7 @@ static bool dbg_hw_info(void)
 
     snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck());
     lcd_puts(0, line++, buf);
-
+    
     lcd_update();
 
     while (!(action_userabort(TIMEOUT_BLOCK)));
@@ -651,7 +651,7 @@ static bool dbg_hw_info(void)
     lcd_puts(0, line++, buf);
 
     snprintf(buf, sizeof(buf), "Est. clock (kHz): %d", perfcheck());
-    lcd_puts(0, line++, buf);
+    lcd_puts(0, line++, buf);             
 
     lcd_update();
 
@@ -1201,19 +1201,15 @@ bool dbg_ports(void)
         snprintf(buf, sizeof(buf), "GPIO_F: %02x GPIO_L: %02x", gpio_f, gpio_l);
         lcd_puts(0, line++, buf);
         line++;
-        
-        snprintf(buf, sizeof(buf), "DEV_EN:       %08lx", DEV_EN);
-        lcd_puts(0, line++, buf);
-        snprintf(buf, sizeof(buf), "CLOCK_SRC:    %08lx", CLOCK_SOURCE);
-        lcd_puts(0, line++, buf);
-        snprintf(buf, sizeof(buf), "CLCD_CLK_SRC: %08lx", CLCD_CLOCK_SRC);
-        lcd_puts(0, line++, buf);
-        snprintf(buf, sizeof(buf), "PLL_CONTROL:  %08lx", PLL_CONTROL);
+
+        snprintf(buf, sizeof(buf), "GPO32:   %08lx", GPO32_VAL);
         lcd_puts(0, line++, buf);
-        snprintf(buf, sizeof(buf), "PLL_STATUS:   %08lx", PLL_STATUS);
+        snprintf(buf, sizeof(buf), "DEV_EN:  %08lx", DEV_EN);
         lcd_puts(0, line++, buf);
-        snprintf(buf, sizeof(buf), "DEV_TIMING1:  %08lx", DEV_TIMING1);
+        snprintf(buf, sizeof(buf), "DEV_EN2: %08lx", DEV_EN2);
         lcd_puts(0, line++, buf);
+        snprintf(buf, sizeof(buf), "DEV_EN3: %08lx", inl(0x60006044));
+        lcd_puts(0, line++, buf);                    /* to be verified */
 
 #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
         line++;
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index 9d2a3b9d94..89acb2e8d2 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -300,6 +300,16 @@
 #define GPIOK_INT_CLR    (*(volatile unsigned long *)(0x6000d178))
 #define GPIOL_INT_CLR    (*(volatile unsigned long *)(0x6000d17c))
 
+/* Standard GPIO addresses + 0x800 allow atomic port manipulation on PP502x.
+ * Bits 8..15 of the written word define which bits are changed, bits 0..7
+ * define the value of those bits. */
+
+#define GPIO_SET_BITWISE(port, mask) \
+        do { *(&port + (0x800/sizeof(long))) = (mask << 8) | mask; } while(0)
+
+#define GPIO_CLEAR_BITWISE(port, mask) \
+        do { *(&port + (0x800/sizeof(long))) = mask << 8; } while(0)
+
 /* Device initialization */
 #define PP_VER1          (*(volatile unsigned long *)(0x70000000))
 #define PP_VER2          (*(volatile unsigned long *)(0x70000004))
@@ -318,6 +328,8 @@
 
 #define INIT_USB         0x80000000
 
+/* 32 bit GPO port */
+#define GPO32_VAL        (*(volatile unsigned long *)(0x70000080))
 
 /* IIS */
 #define IISDIV              (*(volatile unsigned long*)(0x60006080))