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authorRafaël Carré <rafael.carre@gmail.com>2010-06-18 17:33:51 +0000
committerRafaël Carré <rafael.carre@gmail.com>2010-06-18 17:33:51 +0000
commitfd715fa95cc6bdd57f558cdbfc43bc768ec9645b (patch)
treec9e6cb9281bca93cb5b66762ba5b373fe11fd7bc
parent6e5330f663a949e9a3ceab0ddb72e12491e0aa21 (diff)
downloadrockbox-fd715fa95cc6bdd57f558cdbfc43bc768ec9645b.tar.gz
rockbox-fd715fa95cc6bdd57f558cdbfc43bc768ec9645b.zip
as3525*: enable MMU in bootloader
Reserve 1MB of DRAM for loading rockbox and use the rest as BSS Write sdram setup in assembler and move it to a separate file, together with MMU init code git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26926 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--bootloader/sansa_as3525.c3
-rw-r--r--firmware/SOURCES3
-rw-r--r--firmware/export/as3525.h1
-rw-r--r--firmware/export/config.h6
-rw-r--r--firmware/target/arm/as3525/boot.lds28
-rw-r--r--firmware/target/arm/as3525/memory-init.S167
-rw-r--r--firmware/target/arm/as3525/sd-as3525.c6
-rw-r--r--firmware/target/arm/as3525/system-as3525.c82
-rw-r--r--firmware/target/arm/as3525/system-target.h4
-rw-r--r--firmware/target/arm/as3525/usb-drv-as3525.c9
-rw-r--r--firmware/target/arm/as3525/usb-drv-as3525.h6
-rw-r--r--firmware/target/arm/crt0.S83
12 files changed, 200 insertions, 198 deletions
diff --git a/bootloader/sansa_as3525.c b/bootloader/sansa_as3525.c
index 9906991bb4..3eb6159800 100644
--- a/bootloader/sansa_as3525.c
+++ b/bootloader/sansa_as3525.c
@@ -122,11 +122,10 @@ void main(void)
122 if(ret < 0) 122 if(ret < 0)
123 error(EBOOTFILE, ret); 123 error(EBOOTFILE, ret);
124 124
125 disable_irq(); /* disable irq until we have copied the new vectors */
126
127 if (ret == EOK) 125 if (ret == EOK)
128 { 126 {
129 kernel_entry = (void*) loadbuffer; 127 kernel_entry = (void*) loadbuffer;
128 cpucache_invalidate();
130 printf("Executing"); 129 printf("Executing");
131 kernel_entry(); 130 kernel_entry();
132 printf("ERR: Failed to boot"); 131 printf("ERR: Failed to boot");
diff --git a/firmware/SOURCES b/firmware/SOURCES
index 4d456d2873..3d9c60de6c 100644
--- a/firmware/SOURCES
+++ b/firmware/SOURCES
@@ -441,6 +441,7 @@ target/arm/pnx0101/timer-pnx0101.c
441 441
442#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2 442#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2
443target/arm/as3525/system-as3525.c 443target/arm/as3525/system-as3525.c
444target/arm/as3525/memory-init.S
444target/arm/as3525/kernel-as3525.c 445target/arm/as3525/kernel-as3525.c
445target/arm/as3525/timer-as3525.c 446target/arm/as3525/timer-as3525.c
446#if CONFIG_CPU == AS3525 447#if CONFIG_CPU == AS3525
@@ -455,8 +456,8 @@ target/arm/as3525/power-as3525.c
455target/arm/as3525/usb-as3525.c 456target/arm/as3525/usb-as3525.c
456target/arm/as3525/dma-pl081.c 457target/arm/as3525/dma-pl081.c
457target/arm/as3525/ascodec-as3525.c 458target/arm/as3525/ascodec-as3525.c
458#ifndef BOOTLOADER
459target/arm/mmu-arm.S 459target/arm/mmu-arm.S
460#ifndef BOOTLOADER
460drivers/generic_i2c.c 461drivers/generic_i2c.c
461target/arm/adc-as3514.c 462target/arm/adc-as3514.c
462target/arm/as3525/audio-as3525.c 463target/arm/as3525/audio-as3525.c
diff --git a/firmware/export/as3525.h b/firmware/export/as3525.h
index 6b0e85f9c5..52f10efb3e 100644
--- a/firmware/export/as3525.h
+++ b/firmware/export/as3525.h
@@ -31,7 +31,6 @@
31#endif 31#endif
32 32
33/* Virtual addresses */ 33/* Virtual addresses */
34/* Do not apply to the bootloader, which uses physical addresses (no MMU) */
35#define DRAM_ORIG 0x30000000 34#define DRAM_ORIG 0x30000000
36#define IRAM_ORIG (DRAM_ORIG + DRAM_SIZE) /* IRAM is mapped just next to DRAM */ 35#define IRAM_ORIG (DRAM_ORIG + DRAM_SIZE) /* IRAM is mapped just next to DRAM */
37 36
diff --git a/firmware/export/config.h b/firmware/export/config.h
index 22178e4bd4..de84dc3742 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -748,9 +748,9 @@ Lyre prototype 1 */
748 (((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \ 748 (((CONFIG_CPU == SH7034) && !defined(PLUGIN)) || /* SH1 archos: core only */ \
749 defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \ 749 defined(CPU_COLDFIRE) || /* Coldfire: core, plugins, codecs */ \
750 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \ 750 defined(CPU_PP) || /* PortalPlayer: core, plugins, codecs */ \
751 (CONFIG_CPU == AS3525 && MEMORYSIZE > 2) || /* AS3525 +2MB: core, plugins, codecs */ \ 751 (CONFIG_CPU == AS3525 && MEMORYSIZE > 2 && !defined(BOOTLOADER)) || /* AS3525 +2MB: core, plugins, codecs */ \
752 (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525 2MB: core only */ \ 752 (CONFIG_CPU == AS3525 && MEMORYSIZE <= 2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525 2MB: core only */ \
753 (CONFIG_CPU == AS3525v2 && !defined(PLUGIN) && !defined(CODEC)) || /* AS3525v2: core only */ \ 753 (CONFIG_CPU == AS3525v2 && !defined(PLUGIN) && !defined(CODEC) && !defined(BOOTLOADER)) || /* AS3525v2: core only */ \
754 (CONFIG_CPU == PNX0101) || \ 754 (CONFIG_CPU == PNX0101) || \
755 (CONFIG_CPU == TCC7801) || \ 755 (CONFIG_CPU == TCC7801) || \
756 defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \ 756 defined(CPU_S5L870X)) || /* Samsung S5L8700: core, plugins, codecs */ \
diff --git a/firmware/target/arm/as3525/boot.lds b/firmware/target/arm/as3525/boot.lds
index 502e90c22b..2274eea13a 100644
--- a/firmware/target/arm/as3525/boot.lds
+++ b/firmware/target/arm/as3525/boot.lds
@@ -6,39 +6,31 @@ OUTPUT_FORMAT(elf32-littlearm)
6OUTPUT_ARCH(arm) 6OUTPUT_ARCH(arm)
7STARTUP(target/arm/crt0.o) 7STARTUP(target/arm/crt0.o)
8 8
9#ifdef SANSA_CLIPV2 9#define LOAD_SIZE 0x100000 /* Reserve 1MB for loading the firmware */
10#define RAMORIG 0x0 /* DRAM */
11#define RAMSIZE (MEM*0x100000)
12#else
13#define RAMORIG 0x81000000 /* IRAM */
14#define RAMSIZE 0x50000
15#endif
16 10
17MEMORY 11MEMORY
18{ 12{
19 RAM : ORIGIN = RAMORIG, LENGTH = RAMSIZE 13 IRAM : ORIGIN = IRAM_ORIG, LENGTH = IRAM_SIZE
14 DRAM : ORIGIN = DRAM_ORIG + LOAD_SIZE, LENGTH = DRAM_SIZE - LOAD_SIZE - TTB_SIZE
20} 15}
21 16
22SECTIONS 17SECTIONS
23{ 18{
24 . = RAMORIG; 19 . = IRAM_ORIG;
25 20
26 .text : { 21 .text : {
27 *(.init.text) 22 *(.init.text)
28 *(.glue_7) 23 *(.glue_7)
29 *(.glue_7t) 24 *(.glue_7t)
30 *(.text*) 25 *(.text*)
31 } > RAM 26 *(.icode)
27 } > IRAM
32 28
33 .data : { 29 .data : {
34 *(.icode)
35 *(.irodata)
36 *(.idata)
37 *(.data*) 30 *(.data*)
38 *(.ncdata*)
39 *(.rodata*) 31 *(.rodata*)
40 _dataend = . ; 32 _dataend = . ;
41 } > RAM 33 } > IRAM
42 34
43 .stack (NOLOAD) : 35 .stack (NOLOAD) :
44 { 36 {
@@ -48,14 +40,12 @@ SECTIONS
48 . += 0x2000; 40 . += 0x2000;
49 _stackend = .; 41 _stackend = .;
50 stackend = .; 42 stackend = .;
51 } > RAM 43 } > IRAM
52 44
53 .bss (NOLOAD) : { 45 .bss (NOLOAD) : {
54 _edata = .; 46 _edata = .;
55 *(.bss*); 47 *(.bss*);
56 *(.ibss);
57 *(COMMON) 48 *(COMMON)
58 *(.ncbss*);
59 _end = .; 49 _end = .;
60 } > RAM 50 } > DRAM
61} 51}
diff --git a/firmware/target/arm/as3525/memory-init.S b/firmware/target/arm/as3525/memory-init.S
new file mode 100644
index 0000000000..fbc11e5c56
--- /dev/null
+++ b/firmware/target/arm/as3525/memory-init.S
@@ -0,0 +1,167 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright © 2010 by Rafaël Carré
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#include "config.h"
22#include "cpu.h"
23
24#define CACHE_NONE 0
25#define CACHE_ALL 0x0C
26#define UNCACHED_ADDR(a) (a + 0x10000000)
27
28#if defined(SANSA_CLIP) || defined(SANSA_M200V4) || defined(SANSA_C200V2)
29/* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */
30#define MEMORY_MODEL 0x21
31
32#elif defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_CLIPV2) \
33 || defined(SANSA_CLIPPLUS) || defined(SANSA_FUZEV2)
34/* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */
35#define MEMORY_MODEL 0x5
36
37#else
38#error "The external memory in your player is unknown"
39#endif
40
41 .global memory_init
42 .text
43
44memory_init:
45
46#ifdef BOOTLOADER
47
48 ldr r2, =0xC80F0014 @ CGU_PERI
49 ldr r1, [r2]
50 orr r1, r1, #(CGU_EXTMEM_CLOCK_ENABLE|CGU_EXTMEMIF_CLOCK_ENABLE)
51 str r1, [r2]
52
53 ldr r3, =0xC6030000 @ MPMC_BASE
54
55 mov r2, #1 @ enable MPMC
56 str r2, [r3] @ MPMC_CONTROL
57 ldr r2, =0x183 @ SDRAM NOP, all clocks high
58 str r2, [r3, #0x20] @ MPMC_DYNAMIC_CONTROL
59 ldr r2, =0x103 @ SDRAM PALL, all clocks high
60 str r2, [r3, #0x20] @ MPMC_DYNAMIC_CONTROL
61 ldr r1, =0x138 @ 0x138 * 16 HCLK ticks between SDRAM refresh cycles
62 str r1, [r3, #0x24] @ MPMC_DYNAMIC_REFRESH
63 mov r2, #0 @ little endian, HCLK:MPMCCLKOUT[3:0] ratio = 1:1
64 str r2, [r3, #8] @ MPMC_CONFIG
65
66 ldr r2, [r3, #0xfe8] @ MPMC_PERIPH_ID2
67 tst r2, #0xf0
68 movne r2, #1 @ command delayed, clock out not delayed
69 strne r2, [r3, #0x28] @ MPMC_DYNAMIC_READ_CONFIG
70
71 mov r1, #2
72 mov r0, #5
73 mov ip, #4
74 mov r2, #0
75 str r1, [r3, #0x30] @ tRP
76 str ip, [r3, #0x34] @ tRAS
77 str r0, [r3, #0x38] @ tSREX
78 str r2, [r3, #0x3c] @ tAPR
79 str ip, [r3, #0x40] @ tDAL
80 str r1, [r3, #0x44] @ tWR
81 str r0, [r3, #0x48] @ tRC
82 str r0, [r3, #0x4c] @ tRFC
83 str r0, [r3, #0x50] @ tXSR
84 str r1, [r3, #0x54] @ tRRD
85 str r1, [r3, #0x58] @ tMRD
86 mov ip, #(MEMORY_MODEL << 7)
87 str ip, [r3, #0x100] @ MPMC_DYNAMIC_CONFIG_CONFIG_0
88 orr r1, r1, #(2<<8) @ CAS & RAS latency = 2 clock cycle
89 str r1, [r3, #0x104] @ MPMC_DYNAMIC_CONFIG_RASCAS_0
90
91 str r2, [r3, #0x120] @ MPMC_DYNAMIC_CONFIG_CONFIG_1
92 str r2, [r3, #0x124] @ MPMC_DYNAMIC_CONFIG_RASCAS_1
93 str r2, [r3, #0x140] @ MPMC_DYNAMIC_CONFIG_CONFIG_2
94 str r2, [r3, #0x144] @ MPMC_DYNAMIC_CONFIG_RASCAS_2
95 str r2, [r3, #0x160] @ MPMC_DYNAMIC_CONFIG_CONFIG_3
96 str r2, [r3, #0x164] @ MPMC_DYNAMIC_CONFIG_RASCAS_3
97
98 mov r1, #0x82 @ SDRAM MODE, MPMCCLKOUT runs continuously
99 str r1, [r3, #0x20] @ MPMC_DYNAMIC_CONTROL
100
101 ldr r1, =DRAM_ORIG+(0x2300*MEM)
102 ldr r1, [r1]
103
104 str r2, [r3, #0x20] @ MPMC_DYNAMIC_CONTROL= SDRAM NORMAL,
105 @ MPMCCLKOUT stopped when SDRAM is idle
106
107 ldr r2, [r3, #0x100] @ MPMC_DYNAMIC_CONFIG_0
108 orr r2, r2, #(1<<19) @ buffer enable
109 str r2, [r3, #0x100]
110
111#endif /* BOOTLOADER */
112
113 @ XXX: to avoid using the stack, we rely on the fact that:
114 @ - ttb_init
115 @ - map_section
116 @ - enable_mmu
117 @ do not modify ip (r12)
118 mov ip, lr
119
120 /* Setup MMU */
121
122 bl ttb_init
123
124 mov r0, #0 @ physical address
125 mov r1, #0 @ virtual address
126 mov r2, #0x1000 @ size (all memory)
127 mov r3, #CACHE_NONE
128 bl map_section
129
130 mov r0, #0 @ physical address
131 ldr r1, =IRAM_ORIG @ virtual address
132 mov r2, #1 @ size : 1MB
133 mov r3, #CACHE_ALL
134 bl map_section
135
136 mov r0, #0 @ physical address
137 ldr r1, =UNCACHED_ADDR(IRAM_ORIG) @ virtual address
138 mov r2, #1 @ size : 1MB
139 mov r3, #CACHE_NONE
140 bl map_section
141
142 mov r0, #0x30000000 @ physical address
143 mov r1, #DRAM_ORIG @ virtual address
144 mov r2, #MEMORYSIZE @ size
145 mov r3, #CACHE_ALL
146 bl map_section
147
148 mov r0, #0x30000000 @ physical address
149 mov r1, #UNCACHED_ADDR(DRAM_ORIG) @ virtual address
150 mov r2, #MEMORYSIZE @ size
151 mov r3, #CACHE_NONE
152 bl map_section
153
154 /* map 1st mbyte of RAM at 0x0 to have exception vectors available */
155#ifdef BOOTLOADER
156 mov r0, #0x81000000 @ physical address
157#else
158 mov r0, #0x30000000 @ physical address
159#endif
160 mov r1, #0 @ virtual address
161 mov r2, #1 @ size
162 mov r3, #CACHE_ALL
163 bl map_section
164
165 bl enable_mmu
166
167 bx ip
diff --git a/firmware/target/arm/as3525/sd-as3525.c b/firmware/target/arm/as3525/sd-as3525.c
index 20ad241c02..9e55c16be6 100644
--- a/firmware/target/arm/as3525/sd-as3525.c
+++ b/firmware/target/arm/as3525/sd-as3525.c
@@ -672,9 +672,7 @@ static int sd_transfer_sectors(IF_MD2(int drive,) unsigned long start,
672 672
673 mutex_lock(&sd_mtx); 673 mutex_lock(&sd_mtx);
674 sd_enable(true); 674 sd_enable(true);
675#ifndef BOOTLOADER
676 led(true); 675 led(true);
677#endif
678 676
679 if (card_info[drive].initialized <= 0) 677 if (card_info[drive].initialized <= 0)
680 { 678 {
@@ -824,9 +822,7 @@ sd_transfer_error:
824 822
825sd_transfer_error_nodma: 823sd_transfer_error_nodma:
826 824
827#ifndef BOOTLOADER
828 led(false); 825 led(false);
829#endif
830 sd_enable(false); 826 sd_enable(false);
831 827
832 if (ret) /* error */ 828 if (ret) /* error */
@@ -848,12 +844,10 @@ int sd_write_sectors(IF_MD2(int drive,) unsigned long start, int count,
848 return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true); 844 return sd_transfer_sectors(IF_MD2(drive,) start, count, (void*)buf, true);
849} 845}
850 846
851#ifndef BOOTLOADER
852long sd_last_disk_activity(void) 847long sd_last_disk_activity(void)
853{ 848{
854 return last_disk_activity; 849 return last_disk_activity;
855} 850}
856#endif /* !BOOTLOADER */
857 851
858void sd_enable(bool on) 852void sd_enable(bool on)
859{ 853{
diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c
index 3ba56cf30a..940f183c63 100644
--- a/firmware/target/arm/as3525/system-as3525.c
+++ b/firmware/target/arm/as3525/system-as3525.c
@@ -30,9 +30,6 @@
30#include "clock-target.h" 30#include "clock-target.h"
31#include "fmradio_i2c.h" 31#include "fmradio_i2c.h"
32#include "button-target.h" 32#include "button-target.h"
33#ifndef BOOTLOADER
34#include "mmu-arm.h"
35#endif
36#include "backlight-target.h" 33#include "backlight-target.h"
37 34
38#define default_interrupt(name) \ 35#define default_interrupt(name) \
@@ -210,81 +207,6 @@ static inline void check_model_variant(void)
210} 207}
211#endif /* SANSA_C200V2*/ 208#endif /* SANSA_C200V2*/
212 209
213#if defined(BOOTLOADER)
214static void sdram_delay(void)
215{
216 int delay = 1024; /* arbitrary */
217 while (delay--) ;
218}
219
220/* Use the same initialization than OF */
221static void sdram_init(void)
222{
223 CGU_PERI |= (CGU_EXTMEM_CLOCK_ENABLE|CGU_EXTMEMIF_CLOCK_ENABLE);
224
225 MPMC_CONTROL = 0x1; /* enable MPMC */
226
227 MPMC_DYNAMIC_CONTROL = 0x183; /* SDRAM NOP, all clocks high */
228 sdram_delay();
229
230 MPMC_DYNAMIC_CONTROL = 0x103; /* SDRAM PALL, all clocks high */
231 sdram_delay();
232
233 MPMC_DYNAMIC_REFRESH = 0x138; /* 0x138 * 16 HCLK ticks between SDRAM refresh cycles */
234
235 MPMC_CONFIG = 0; /* little endian, HCLK:MPMCCLKOUT[3:0] ratio = 1:1 */
236
237 if(MPMC_PERIPH_ID2 & 0xf0)
238 MPMC_DYNAMIC_READ_CONFIG = 0x1; /* command delayed, clock out not delayed */
239
240 /* timings */
241 MPMC_DYNAMIC_tRP = 2;
242 MPMC_DYNAMIC_tRAS = 4;
243 MPMC_DYNAMIC_tSREX = 5;
244 MPMC_DYNAMIC_tAPR = 0;
245 MPMC_DYNAMIC_tDAL = 4;
246 MPMC_DYNAMIC_tWR = 2;
247 MPMC_DYNAMIC_tRC = 5;
248 MPMC_DYNAMIC_tRFC = 5;
249 MPMC_DYNAMIC_tXSR = 5;
250 MPMC_DYNAMIC_tRRD = 2;
251 MPMC_DYNAMIC_tMRD = 2;
252
253#if defined(SANSA_CLIP) || defined(SANSA_M200V4) || defined(SANSA_C200V2)
254/* 16 bits external bus, low power SDRAM, 16 Mbits = 2 Mbytes */
255#define MEMORY_MODEL 0x21
256
257#elif defined(SANSA_E200V2) || defined(SANSA_FUZE) || defined(SANSA_CLIPV2) \
258 || defined(SANSA_CLIPPLUS) || defined(SANSA_FUZEV2)
259/* 16 bits external bus, high performance SDRAM, 64 Mbits = 8 Mbytes */
260#define MEMORY_MODEL 0x5
261
262#else
263#error "The external memory in your player is unknown"
264#endif
265
266 MPMC_DYNAMIC_RASCAS_0 = (2<<8)|2; /* CAS & RAS latency = 2 clock cycles */
267 MPMC_DYNAMIC_CONFIG_0 = (MEMORY_MODEL << 7);
268
269 MPMC_DYNAMIC_RASCAS_1 = MPMC_DYNAMIC_CONFIG_1 =
270 MPMC_DYNAMIC_RASCAS_2 = MPMC_DYNAMIC_CONFIG_2 =
271 MPMC_DYNAMIC_RASCAS_3 = MPMC_DYNAMIC_CONFIG_3 = 0;
272
273 MPMC_DYNAMIC_CONTROL = 0x82; /* SDRAM MODE, MPMCCLKOUT runs continuously */
274
275 /* program the SDRAM mode register */
276 /* FIXME: details the exact settings of mode register */
277 asm volatile(
278 "ldr r4, [%0]\n"
279 : : "p"(0x30000000+0x2300*MEM) : "r4");
280
281 /* SDRAM NORMAL, MPMCCLKOUT stopped when SDRAM is idle */
282 MPMC_DYNAMIC_CONTROL = 0x0;
283
284 MPMC_DYNAMIC_CONFIG_0 |= (1<<19); /* buffer enable */
285}
286#endif /* BOOTLOADER */
287
288void system_init(void) 210void system_init(void)
289{ 211{
290#if CONFIG_CPU == AS3525v2 212#if CONFIG_CPU == AS3525v2
@@ -343,9 +265,7 @@ void system_init(void)
343#endif 265#endif
344 AS3525_PCLK_SEL); 266 AS3525_PCLK_SEL);
345 267
346#if defined(BOOTLOADER) 268#if !defined(BOOTLOADER) && defined(SANSA_FUZE) || defined(SANSA_CLIP) || defined(SANSA_E200V2)
347 sdram_init();
348#elif defined(SANSA_FUZE) || defined(SANSA_CLIP) || defined(SANSA_E200V2)
349 /* XXX: remove me when we have a new bootloader */ 269 /* XXX: remove me when we have a new bootloader */
350 MPMC_DYNAMIC_CONTROL = 0x0; /* MPMCCLKOUT stops when all SDRAMs are idle */ 270 MPMC_DYNAMIC_CONTROL = 0x0; /* MPMCCLKOUT stops when all SDRAMs are idle */
351#endif /* BOOTLOADER */ 271#endif /* BOOTLOADER */
diff --git a/firmware/target/arm/as3525/system-target.h b/firmware/target/arm/as3525/system-target.h
index 11e89d9f2c..523237ffcd 100644
--- a/firmware/target/arm/as3525/system-target.h
+++ b/firmware/target/arm/as3525/system-target.h
@@ -38,11 +38,7 @@
38#define KERNEL_TIMER_FREQ TIMER_FREQ 38#define KERNEL_TIMER_FREQ TIMER_FREQ
39#endif 39#endif
40 40
41#ifdef BOOTLOADER
42#define AS3525_UNCACHED_ADDR(a) (a)
43#else
44#define AS3525_UNCACHED_ADDR(a) ((typeof(a)) ((uintptr_t)(a) + 0x10000000)) 41#define AS3525_UNCACHED_ADDR(a) ((typeof(a)) ((uintptr_t)(a) + 0x10000000))
45#endif
46 42
47#ifdef SANSA_C200V2 43#ifdef SANSA_C200V2
48/* 0: Backlight on A5, 1: Backlight on A7 */ 44/* 0: Backlight on A5, 1: Backlight on A7 */
diff --git a/firmware/target/arm/as3525/usb-drv-as3525.c b/firmware/target/arm/as3525/usb-drv-as3525.c
index e90bc04aee..0b73713c51 100644
--- a/firmware/target/arm/as3525/usb-drv-as3525.c
+++ b/firmware/target/arm/as3525/usb-drv-as3525.c
@@ -396,8 +396,7 @@ int usb_drv_recv(int ep, void *ptr, int len)
396 endpoints[ep][1].rc = -1; 396 endpoints[ep][1].rc = -1;
397 397
398 /* remove data buffer from cache */ 398 /* remove data buffer from cache */
399 if (!is_bootloader()) /* bootloader is running uncached */ 399 invalidate_dcache();
400 invalidate_dcache();
401 400
402 /* DMA setup */ 401 /* DMA setup */
403 uc_desc->status = USB_DMA_DESC_BS_HST_RDY | 402 uc_desc->status = USB_DMA_DESC_BS_HST_RDY |
@@ -448,8 +447,7 @@ void ep_send(int ep, void *ptr, int len)
448 endpoints[ep][0].rc = -1; 447 endpoints[ep][0].rc = -1;
449 448
450 /* Make sure data is committed to memory */ 449 /* Make sure data is committed to memory */
451 if (!is_bootloader()) /* bootloader is running uncached */ 450 clean_dcache();
452 clean_dcache();
453 451
454 logf("xx%s\n", make_hex(ptr, len)); 452 logf("xx%s\n", make_hex(ptr, len));
455 453
@@ -556,8 +554,7 @@ static void handle_out_ep(int ep)
556 /* 554 /*
557 * If parts of the just dmaed range are in cache, dump them now. 555 * If parts of the just dmaed range are in cache, dump them now.
558 */ 556 */
559 if (!is_bootloader()) /* bootloader is running uncached */ 557 dump_dcache_range(uc_desc->data_ptr, dma_len);
560 dump_dcache_range(uc_desc->data_ptr, dma_len);
561 } else{ 558 } else{
562 logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep, 559 logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep,
563 dma_mst, dma_frm); 560 dma_mst, dma_frm);
diff --git a/firmware/target/arm/as3525/usb-drv-as3525.h b/firmware/target/arm/as3525/usb-drv-as3525.h
index f579638cfb..3a434170d7 100644
--- a/firmware/target/arm/as3525/usb-drv-as3525.h
+++ b/firmware/target/arm/as3525/usb-drv-as3525.h
@@ -23,12 +23,6 @@
23 23
24#include "as3525.h" 24#include "as3525.h"
25 25
26#ifdef BOOTLOADER
27#define is_bootloader() 1
28#else
29#define is_bootloader() 0
30#endif /* BOOTLOADER */
31
32#define USB_NUM_EPS 4 26#define USB_NUM_EPS 4
33 27
34typedef struct { 28typedef struct {
diff --git a/firmware/target/arm/crt0.S b/firmware/target/arm/crt0.S
index 6def9a1a88..f52056617a 100644
--- a/firmware/target/arm/crt0.S
+++ b/firmware/target/arm/crt0.S
@@ -26,23 +26,14 @@
26 .global start 26 .global start
27start: 27start:
28 /* Exception vectors */ 28 /* Exception vectors */
29 ldr pc, [pc, #24] 29 b newstart
30 ldr pc, [pc, #24] 30 b undef_instr_handler
31 ldr pc, [pc, #24] 31 b software_int_handler
32 ldr pc, [pc, #24] 32 b prefetch_abort_handler
33 ldr pc, [pc, #24] 33 b data_abort_handler
34 ldr pc, [pc, #24] 34 b reserved_handler
35 ldr pc, [pc, #24] 35 b irq_handler
36 ldr pc, [pc, #24] 36 b fiq_handler
37
38.word newstart
39.word undef_instr_handler
40.word software_int_handler
41.word prefetch_abort_handler
42.word data_abort_handler
43.word reserved_handler
44.word irq_handler
45.word fiq_handler
46 37
47_vectorsend: 38_vectorsend:
48 39
@@ -51,56 +42,11 @@ _vectorsend:
51newstart: 42newstart:
52 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */ 43 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ/FIQ */
53 44
54#if (CONFIG_CPU==AS3525 || CONFIG_CPU==AS3525v2) && !defined(BOOTLOADER) 45#if CONFIG_CPU == AS3525 || CONFIG_CPU == AS3525v2
55 46 bl memory_init
56#define CACHE_NONE 0 47#endif
57#define CACHE_ALL 0x0C
58#define UNCACHED_ADDR(a) (a + 0x10000000)
59
60 /* Setup MMU : has to be done before accessing IRAM ! */
61
62 bl ttb_init
63
64 mov r0, #0 @ physical address
65 mov r1, #0 @ virtual address
66 mov r2, #0x1000 @ size (all memory)
67 mov r3, #CACHE_NONE
68 bl map_section
69
70 mov r0, #0 @ physical address
71 ldr r1, =IRAM_ORIG @ virtual address
72 mov r2, #1 @ size : 1MB
73 mov r3, #CACHE_ALL
74 bl map_section
75
76 mov r0, #0 @ physical address
77 ldr r1, =UNCACHED_ADDR(IRAM_ORIG) @ virtual address
78 mov r2, #1 @ size : 1MB
79 mov r3, #CACHE_NONE
80 bl map_section
81
82 mov r0, #0x30000000 @ physical address
83 mov r1, #DRAM_ORIG @ virtual address
84 mov r2, #MEMORYSIZE @ size
85 mov r3, #CACHE_ALL
86 bl map_section
87
88 mov r0, #0x30000000 @ physical address
89 mov r1, #UNCACHED_ADDR(DRAM_ORIG) @ virtual address
90 mov r2, #MEMORYSIZE @ size
91 mov r3, #CACHE_NONE
92 bl map_section
93
94 /* map 1st mbyte of DRAM at 0x0 to have exception vectors available */
95
96 mov r0, #0x30000000 @ physical address
97 mov r1, #0 @ virtual address
98 mov r2, #1 @ size
99 mov r3, #CACHE_ALL
100 bl map_section
101
102 bl enable_mmu
103 48
49#ifdef USE_IRAM
104 /* Zero out IBSS */ 50 /* Zero out IBSS */
105 ldr r2, =_iedata 51 ldr r2, =_iedata
106 ldr r3, =_iend 52 ldr r3, =_iend
@@ -120,7 +66,6 @@ newstart:
120 ldrhi r5, [r2], #4 66 ldrhi r5, [r2], #4
121 strhi r5, [r3], #4 67 strhi r5, [r3], #4
122 bhi 1b 68 bhi 1b
123
124#endif 69#endif
125 70
126#ifdef HAVE_INIT_ATTR 71#ifdef HAVE_INIT_ATTR
@@ -173,8 +118,8 @@ newstart:
173 118
174 /* Switch back to supervisor mode */ 119 /* Switch back to supervisor mode */
175 msr cpsr_c, #0xd3 120 msr cpsr_c, #0xd3
176 bl main 121 ldr ip, =main @ make sure we are using the virtual address
177 122 bx ip
178 123
179/* All illegal exceptions call into UIE with exception address as first 124/* All illegal exceptions call into UIE with exception address as first
180 * parameter. This is calculated differently depending on which exception 125 * parameter. This is calculated differently depending on which exception