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author | Linus Nielsen Feltzing <linus@haxx.se> | 2002-10-30 23:39:37 +0000 |
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committer | Linus Nielsen Feltzing <linus@haxx.se> | 2002-10-30 23:39:37 +0000 |
commit | ec72d5a58ac25db983a0700d26a03fde52035a1c (patch) | |
tree | 3b3b4f970b75ccb3441f4618fc28afc423da4346 | |
parent | a02ffd5afaa7a1a82f2da572b4c3cea01782b7c5 (diff) | |
download | rockbox-ec72d5a58ac25db983a0700d26a03fde52035a1c.tar.gz rockbox-ec72d5a58ac25db983a0700d26a03fde52035a1c.zip |
Some more tech info
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@2785 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | docs/TECH | 69 |
1 files changed, 60 insertions, 9 deletions
@@ -15,15 +15,21 @@ Booting and (De)Scrambling | |||
15 | scrambling that the original Archos firmware uses so that it can be loaded | 15 | scrambling that the original Archos firmware uses so that it can be loaded |
16 | by the built-in firmware. | 16 | by the built-in firmware. |
17 | 17 | ||
18 | 1) The built-in firmware starts | ||
19 | 2) It looks in the root directory for a file called "archos.mod" (player) | ||
20 | or "ajbrec.ajz" (recorder) | ||
21 | 3) If it finds one, it loads the file, descrambles it and runs it | ||
22 | |||
18 | CPU | 23 | CPU |
19 | 24 | ||
20 | The CPU in use is a SH7034 from Hitachi, running at 11.0592MHz or 12MHz. | 25 | The CPU in use is a SH7034 from Hitachi, running at 11.0592MHz (recorder) |
21 | Most single instructions are excuted in 1 cycle. There is a 4KB internal ram | 26 | or 12MHz (player). |
22 | and a 2MB external ram. | 27 | Most single instructions are executed in 1 cycle. There is a 4KB internal RAM |
28 | and a 2MB external RAM. | ||
23 | 29 | ||
24 | Memory Usage | 30 | Memory Usage |
25 | 31 | ||
26 | All Archos Jukebox models have only 2MB ram. The ram is used for everything, | 32 | All Archos Jukebox models have only 2MB RAM. The RAM is used for everything, |
27 | including code, graphics and config. To be able to play as long as possible | 33 | including code, graphics and config. To be able to play as long as possible |
28 | without having to load more data, the size of the mpeg playing buffer must | 34 | without having to load more data, the size of the mpeg playing buffer must |
29 | remain as big as possible. Also, since we need to be able to do almost | 35 | remain as big as possible. Also, since we need to be able to do almost |
@@ -36,7 +42,50 @@ Playing MPEG | |||
36 | The MPEG decoding is performed by an external circuit, MAS3507D (for the | 42 | The MPEG decoding is performed by an external circuit, MAS3507D (for the |
37 | Player/Studio models) or MAS3587F (for the Recorder models). | 43 | Player/Studio models) or MAS3587F (for the Recorder models). |
38 | 44 | ||
39 | ... | 45 | The CPU has a serial connection to the MAS for MP3 playback, using serial |
46 | port 0 at approx. 1mbit/s. The MAS has a handshake signal called DEMAND, | ||
47 | that informs the CPU when it wants more MP3 data. Whenever the DEMAND | ||
48 | signal goes high, it wants data sent over the serial line, and it wants it | ||
49 | quickly, within ~1ms. When the MAS has received enough data, it negates the | ||
50 | DEMAND signal and expects the incoming data stream to stop within 1ms. | ||
51 | |||
52 | The DEMAND signal is connected to a port pin on the CPU which can generate | ||
53 | an IRQ, but only on the falling edge. That means that the mpeg driver code | ||
54 | must poll the DEMAND signal every ms to keep the MAS happy. The mpeg code | ||
55 | does use the IRQ to detect the falling edge when the MAS is "full". | ||
56 | |||
57 | Unfortunately, the serial port on the CPU sends the LSB first, and the MAS | ||
58 | expects the MSB first. Therefore we have to revers the bit order in every | ||
59 | byte in the loaded MP3 data. This is referred to as "bit swapping" in the | ||
60 | Rockbox code. | ||
61 | |||
62 | The internal DMA controller is used to feed the serial port with data. The | ||
63 | driver works roughly like this: | ||
64 | |||
65 | 1) Load MP3 data into the RAM buffer | ||
66 | 2) Bitswap the data | ||
67 | 3) Load the DMA source pointer to the next 64Kbyte block to be transferred | ||
68 | 4) Wait until DEMAND is high | ||
69 | 5) Enable the DMA | ||
70 | 6) Wait until the falling DEMAND pin generates an IRQ | ||
71 | 7) Disable the DMA | ||
72 | 8) Go to 4 | ||
73 | |||
74 | The DMA generates an IRQ when the 64Kbyte block is transferred, and the | ||
75 | IRQ handler updates the DMA source pointer. | ||
76 | |||
77 | |||
78 | _____________________________ | ||
79 | | | | ||
80 | DEMAND __________| |_____________ | ||
81 | _ _ _ _ _ _ _ _ _ | ||
82 | SC0 _____________/ \/ \/ \/ \/ \/ \/ \/ \/ \____________ | ||
83 | \_/\_/\_/\_/\_/\_/\_/\_/\_/ | ||
84 | ^ ^ | ||
85 | | | | ||
86 | Poll sees the DEMAND The DEMAND pin generates | ||
87 | signal go high and an IRQ that in turn disables | ||
88 | enables the DMA the DMA again | ||
40 | 89 | ||
41 | Spinning The Disk Up/Down | 90 | Spinning The Disk Up/Down |
42 | 91 | ||
@@ -87,10 +136,12 @@ Playing a Directory | |||
87 | Shuffle | 136 | Shuffle |
88 | 137 | ||
89 | Since the playlist is a an array of indexes to where to read the file name, | 138 | Since the playlist is a an array of indexes to where to read the file name, |
90 | shuffle modifies the order of these indexes in the array. The randomness is | 139 | shuffle modifies the order of these indexes in the array. The algorithm is |
91 | identical for the same random seed. This is the secret to good resume. Even | 140 | pretty much like shuffling a deck of cards, and it uses a pseudo random |
92 | when you've shut down your unit and re-starts it, using the same random seed | 141 | generator called the Mersenne Twister. The randomness is identical for the |
93 | as the previous time will give exactly the same random order. | 142 | same random seed. This is the secret to good resume. Even when you've shut |
143 | down your unit and re-starts it, using the same random seed as the previous | ||
144 | time will give exactly the same random order. | ||
94 | 145 | ||
95 | Saving Config Data | 146 | Saving Config Data |
96 | 147 | ||