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| author | Marcin Bukat <marcin.bukat@gmail.com> | 2014-07-23 12:32:16 +0200 |
|---|---|---|
| committer | Marcin Bukat <marcin.bukat@gmail.com> | 2014-07-23 12:32:16 +0200 |
| commit | dcd8172f4f3de41f163a0a0fdc79565074a32c44 (patch) | |
| tree | 39833be24fafb9fcd135f032741173df29aa71d2 | |
| parent | 9fb65294fb8bd9cfcf3e830f82bf01c3afdbbcce (diff) | |
| download | rockbox-dcd8172f4f3de41f163a0a0fdc79565074a32c44.tar.gz rockbox-dcd8172f4f3de41f163a0a0fdc79565074a32c44.zip | |
rk27load: fix stage1 dram config bug
Change-Id: I03d44dbd05fcd5dfc0e508020fae7006d8a97505
| -rw-r--r-- | utils/rk27utils/rk27load/stage1/main.S | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/utils/rk27utils/rk27load/stage1/main.S b/utils/rk27utils/rk27load/stage1/main.S index 6e2770b369..2564ad3cc4 100644 --- a/utils/rk27utils/rk27load/stage1/main.S +++ b/utils/rk27utils/rk27load/stage1/main.S | |||
| @@ -52,11 +52,11 @@ col_loop: | |||
| 52 | add r5, r4, #8 /* col_num_bits */ | 52 | add r5, r4, #8 /* col_num_bits */ |
| 53 | mov r6, r3, lsl r5 /* offset to the col1 (1<<col_num_bits) */ | 53 | mov r6, r3, lsl r5 /* offset to the col1 (1<<col_num_bits) */ |
| 54 | mov r7, #0 | 54 | mov r7, #0 |
| 55 | str r7, [r1] /* *(0x60000000) = 0 */ | 55 | str r7, [r2] /* *(0x60000000) = 0 */ |
| 56 | str r1, [r1, r6] /* store test pattern in col1 addr */ | 56 | str r1, [r2, r6] /* store test pattern in col1 addr */ |
| 57 | ldr r7, [r1] | 57 | ldr r7, [r2] |
| 58 | cmp r7, #0 /* check if beginning of dram is not touched */ | 58 | cmp r7, #0 /* check if beginning of dram is not touched */ |
| 59 | ldreq r7, [r1, r6] /* readback col1 addr */ | 59 | ldreq r7, [r2, r6] /* readback col1 addr */ |
| 60 | cmpeq r7, r1 /* check if test pattern is valid */ | 60 | cmpeq r7, r1 /* check if test pattern is valid */ |
| 61 | beq row_loop_setup /* quit column loop */ | 61 | beq row_loop_setup /* quit column loop */ |
| 62 | subs r4, #1 | 62 | subs r4, #1 |
| @@ -76,12 +76,12 @@ row_loop: | |||
| 76 | */ | 76 | */ |
| 77 | 77 | ||
| 78 | mov r7, #0 | 78 | mov r7, #0 |
| 79 | str r7, [r1] /* *(0x60000000) = 0 */ | 79 | str r7, [r2] /* *(0x60000000) = 0 */ |
| 80 | str r2, [r1, lr] /* store test pattern */ | 80 | str r2, [r2, lr] /* store test pattern */ |
| 81 | ldr r7, [r1] | 81 | ldr r7, [r2] |
| 82 | cmp r7, #0 /* check if beginning of dram is not touched */ | 82 | cmp r7, #0 /* check if beginning of dram is not touched */ |
| 83 | ldreq lr, [r1, lr] /* readback row1,col1 addr */ | 83 | ldreq lr, [r2, lr] /* readback row1,col1 addr */ |
| 84 | cmpeq lr, r2 /* check if test pattern is valid */ | 84 | cmpeq lr, r1 /* check if test pattern is valid */ |
| 85 | beq end | 85 | beq end |
| 86 | subs r5, #1 | 86 | subs r5, #1 |
| 87 | bpl row_loop | 87 | bpl row_loop |