From dcd8172f4f3de41f163a0a0fdc79565074a32c44 Mon Sep 17 00:00:00 2001
From: Marcin Bukat <marcin.bukat@gmail.com>
Date: Wed, 23 Jul 2014 12:32:16 +0200
Subject: rk27load: fix stage1 dram config bug

Change-Id: I03d44dbd05fcd5dfc0e508020fae7006d8a97505
---
 utils/rk27utils/rk27load/stage1/main.S | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/utils/rk27utils/rk27load/stage1/main.S b/utils/rk27utils/rk27load/stage1/main.S
index 6e2770b369..2564ad3cc4 100644
--- a/utils/rk27utils/rk27load/stage1/main.S
+++ b/utils/rk27utils/rk27load/stage1/main.S
@@ -52,11 +52,11 @@ col_loop:
     add     r5, r4, #8       /* col_num_bits */
     mov     r6, r3, lsl r5   /* offset to the col1 (1<<col_num_bits) */
     mov     r7, #0
-    str     r7, [r1]         /* *(0x60000000) = 0 */
-    str     r1, [r1, r6]     /* store test pattern in col1 addr */
-    ldr     r7, [r1]
+    str     r7, [r2]         /* *(0x60000000) = 0 */
+    str     r1, [r2, r6]     /* store test pattern in col1 addr */
+    ldr     r7, [r2]
     cmp     r7, #0           /* check if beginning of dram is not touched */
-    ldreq   r7, [r1, r6]     /* readback col1 addr */
+    ldreq   r7, [r2, r6]     /* readback col1 addr */
     cmpeq   r7, r1           /* check if test pattern is valid */
     beq     row_loop_setup   /* quit column loop */
     subs    r4, #1
@@ -76,12 +76,12 @@ row_loop:
                               */
 
     mov     r7, #0
-    str     r7, [r1]         /* *(0x60000000) = 0 */   
-    str     r2, [r1, lr]     /* store test pattern */
-    ldr     r7, [r1]
+    str     r7, [r2]         /* *(0x60000000) = 0 */   
+    str     r2, [r2, lr]     /* store test pattern */
+    ldr     r7, [r2]
     cmp     r7, #0           /* check if beginning of dram is not touched */
-    ldreq   lr, [r1, lr]     /* readback row1,col1 addr */
-    cmpeq   lr, r2           /* check if test pattern is valid */
+    ldreq   lr, [r2, lr]     /* readback row1,col1 addr */
+    cmpeq   lr, r1           /* check if test pattern is valid */
     beq     end
     subs    r5, #1
     bpl     row_loop
-- 
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