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authorDaniel Ankers <dan@weirdo.org.uk>2006-08-03 16:29:42 +0000
committerDaniel Ankers <dan@weirdo.org.uk>2006-08-03 16:29:42 +0000
commitcec7cdc3bbf46379131e6951585951cf97444326 (patch)
tree0ea6c203ed51fad4d51a7dc0fb2090f3f1a55dbb
parent2fa5d81fcd66abd52cee622ba87787159d3cd2e7 (diff)
downloadrockbox-cec7cdc3bbf46379131e6951585951cf97444326.tar.gz
rockbox-cec7cdc3bbf46379131e6951585951cf97444326.zip
Initial work for coprocessor support on iPods. FS#5755
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@10437 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--apps/main.c13
-rw-r--r--bootloader/ipod.c11
-rw-r--r--firmware/app.lds9
-rw-r--r--firmware/crt0.S67
-rw-r--r--firmware/export/pp5002.h5
-rw-r--r--firmware/export/pp5020.h3
6 files changed, 93 insertions, 15 deletions
diff --git a/apps/main.c b/apps/main.c
index 8ee6adfe4f..f8c3604f6b 100644
--- a/apps/main.c
+++ b/apps/main.c
@@ -451,6 +451,19 @@ void init(void)
451#endif 451#endif
452} 452}
453 453
454void cop_main(void)
455{
456/* This is the entry point for the coprocessor
457 Anyone not running an upgraded bootloader will never reach this point,
458 so it should not be assumed that the coprocessor be usable even on
459 platforms which support it.
460
461 At present all we do is send the COP to sleep if anything wakes it. */
462 while(1) {
463 COP_CTL = PROC_SLEEP;
464 }
465}
466
454int main(void) 467int main(void)
455{ 468{
456 app_main(); 469 app_main();
diff --git a/bootloader/ipod.c b/bootloader/ipod.c
index 98ff4848bb..26e5ae2937 100644
--- a/bootloader/ipod.c
+++ b/bootloader/ipod.c
@@ -425,16 +425,7 @@ void* main(void)
425 lcd_puts(0, line++, "Rockbox loaded."); 425 lcd_puts(0, line++, "Rockbox loaded.");
426 lcd_update(); 426 lcd_update();
427 memcpy((void*)DRAM_START,loadbuffer,rc); 427 memcpy((void*)DRAM_START,loadbuffer,rc);
428 428 return (void*)DRAM_START;
429 /* Transfer execution directly to Rockbox - we don't want
430 to run the rest of the bootloader startup code. */
431 asm volatile(
432 "mov r0, #" SC(DRAM_START) "\n"
433 "mov pc, r0 \n"
434 );
435
436 /* We don't get here, but keep the compiler happy. */
437 return (void*)0;
438 } 429 }
439 } 430 }
440 431
diff --git a/firmware/app.lds b/firmware/app.lds
index 3416f5c6b6..3d9be9b32e 100644
--- a/firmware/app.lds
+++ b/firmware/app.lds
@@ -257,6 +257,15 @@ SECTIONS
257 . += 0x2000; 257 . += 0x2000;
258 stackend = .; 258 stackend = .;
259 } > IRAM 259 } > IRAM
260
261 .cop_stack :
262 {
263 *(.cop_stack)
264 cop_stackbegin = .;
265 . += 0x0500;
266 cop_stackend = .;
267 } > IRAM
268
260#else 269#else
261 /* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section 270 /* TRICK ALERT! We want 0x2000 bytes of stack, but we set the section
262 size smaller, and allow the stack to grow into the .iram copy */ 271 size smaller, and allow the stack to grow into the .iram copy */
diff --git a/firmware/crt0.S b/firmware/crt0.S
index 6477011064..9831d749eb 100644
--- a/firmware/crt0.S
+++ b/firmware/crt0.S
@@ -36,11 +36,15 @@ start:
36 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org> 36 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
37 * 37 *
38 */ 38 */
39 .equ PP5002_PROC_ID, 0xc4000000
40 .equ PP5002_COP_CTRL, 0xcf004058
41 .equ PP5020_PROC_ID, 0x60000000
42 .equ PP5020_COP_CTRL, 0x60007004
39 43
40 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */ 44 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
41 45
42#ifndef BOOTLOADER 46#ifndef BOOTLOADER
43#if CONFIG_CPU == PP5002 || CONFIG_CPU == PP5020 47#ifdef CPU_PP
44 b pad_skip 48 b pad_skip
45.space 50*4 /* (more than enough) space for exception vectors */ 49.space 50*4 /* (more than enough) space for exception vectors */
46pad_skip: 50pad_skip:
@@ -81,6 +85,34 @@ remap_start:
81L_post_remap: .word remap_end 85L_post_remap: .word remap_end
82remap_end: 86remap_end:
83 87
88#ifdef CPU_PP
89 /* After doing the remapping, send the COP to sleep.
90 On wakeup it will go to cop_init */
91#if CONFIG_CPU == PP5002
92 ldr r0, =PP5002_PROC_ID
93#else
94 ldr r0, =PP5020_PROC_ID
95#endif
96 ldr r0, [r0]
97 and r0, r0, #0xff
98 cmp r0, #0x55
99 beq 1f
100
101 /* put us (co-processor) to sleep */
102#if CONFIG_CPU == PP5002
103 ldr r4, =PP5002_COP_CTRL
104 mov r3, #0xca
105#else
106 ldr r4, =PP5020_COP_CTRL
107 mov r3, #0x80000000
108#endif
109 str r3, [r4]
110
111 ldr pc, =cop_init
112
1131:
114#endif
115
84#elif CONFIG_CPU == PNX0101 116#elif CONFIG_CPU == PNX0101
85 117
86#ifndef DEBUG 118#ifndef DEBUG
@@ -167,10 +199,6 @@ remap_end:
167 199
168#ifdef BOOTLOADER 200#ifdef BOOTLOADER
169#ifdef CPU_PP 201#ifdef CPU_PP
170 .equ PP5002_PROC_ID, 0xc4000000
171 .equ PP5002_COP_CTRL, 0xcf004058
172 .equ PP5020_PROC_ID, 0x60000000
173 .equ PP5020_COP_CTRL, 0x60007004
174 /* TODO: the high part of the address is probably dependent on CONFIG_CPU. 202 /* TODO: the high part of the address is probably dependent on CONFIG_CPU.
175 Since we tend to use ifdefs for each chipset target 203 Since we tend to use ifdefs for each chipset target
176 anyway, we might as well just hardcode it here. 204 anyway, we might as well just hardcode it here.
@@ -306,6 +334,35 @@ boot_table:
306 bl main 334 bl main
307 /* main() should never return */ 335 /* main() should never return */
308 336
337#ifdef CPU_PP
338cop_init:
339 ldr sp, =cop_stackend
340 mov r3, sp
341 ldr r2, =cop_stackbegin
342 ldr r4, =0xdeadbeef
3432:
344 cmp r3, r2
345 strhi r4, [r2], #4
346 bhi 2b
347
348 ldr sp, =cop_stackend
349 bl cop_main
350#else
351 /* If we don't plan to use the COP, we have some code to catch it and send
352 it back to sleep if somebody wakes it. This means that the firmware
353 size doesn't grow too much while the COP is still unused, but it is
354 still handled cleanly. */
355#if CONFIG_CPU==PP5002
356 ldr r4, =PP5002_COP_CTRL
357 mov r3, #0xca
358#else
359 ldr r4, =PP5020_COP_CTRL
360 mov r3, #0x80000000
361#endif
362 str r3, [r4]
363 ldr pc, =cop_init
364#endif /* PP specific */
365
309/* Exception handlers. Will be copied to address 0 after memory remapping */ 366/* Exception handlers. Will be copied to address 0 after memory remapping */
310 .section .vectors,"aw" 367 .section .vectors,"aw"
311 ldr pc, [pc, #24] 368 ldr pc, [pc, #24]
diff --git a/firmware/export/pp5002.h b/firmware/export/pp5002.h
index b8f2d519dd..da35fd9200 100644
--- a/firmware/export/pp5002.h
+++ b/firmware/export/pp5002.h
@@ -20,6 +20,8 @@
20#define __PP5002_H__ 20#define __PP5002_H__
21 21
22/* All info gleaned and/or copied from the iPodLinux project. */ 22/* All info gleaned and/or copied from the iPodLinux project. */
23#define CPU_CTL (*(volatile unsigned char *)(0xcf004054))
24#define COP_CTL (*(volatile unsigned char *)(0xcf004058))
23 25
24#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000)) 26#define GPIOA_ENABLE (*(volatile unsigned char *)(0xcf000000))
25#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004)) 27#define GPIOB_ENABLE (*(volatile unsigned char *)(0xcf000004))
@@ -98,4 +100,7 @@
98#define SER1_MASK (1 << SER1_IRQ) 100#define SER1_MASK (1 << SER1_IRQ)
99#define DMA_OUT_MASK (1 << DMA_OUT_IRQ) 101#define DMA_OUT_MASK (1 << DMA_OUT_IRQ)
100 102
103#define PROC_SLEEP 0xca
104#define PROC_WAKE 0xce
105
101#endif 106#endif
diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h
index cfeb8642b8..ccb49a0d90 100644
--- a/firmware/export/pp5020.h
+++ b/firmware/export/pp5020.h
@@ -165,4 +165,7 @@
165#define IISFIFO_WR (*(volatile unsigned long*)(0x70002840)) 165#define IISFIFO_WR (*(volatile unsigned long*)(0x70002840))
166#define IISFIFO_RD (*(volatile unsigned long*)(0x70002880)) 166#define IISFIFO_RD (*(volatile unsigned long*)(0x70002880))
167 167
168#define PROC_SLEEP 0x80000000
169#define PROC_WAKE 0x0
170
168#endif 171#endif