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-rw-r--r--firmware/crt0.S67
1 files changed, 62 insertions, 5 deletions
diff --git a/firmware/crt0.S b/firmware/crt0.S
index 6477011064..9831d749eb 100644
--- a/firmware/crt0.S
+++ b/firmware/crt0.S
@@ -36,11 +36,15 @@ start:
36 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org> 36 * Copyright (c) 2005, Bernard Leach <leachbj@bouncycastle.org>
37 * 37 *
38 */ 38 */
39 .equ PP5002_PROC_ID, 0xc4000000
40 .equ PP5002_COP_CTRL, 0xcf004058
41 .equ PP5020_PROC_ID, 0x60000000
42 .equ PP5020_COP_CTRL, 0x60007004
39 43
40 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */ 44 msr cpsr_c, #0xd3 /* enter supervisor mode, disable IRQ */
41 45
42#ifndef BOOTLOADER 46#ifndef BOOTLOADER
43#if CONFIG_CPU == PP5002 || CONFIG_CPU == PP5020 47#ifdef CPU_PP
44 b pad_skip 48 b pad_skip
45.space 50*4 /* (more than enough) space for exception vectors */ 49.space 50*4 /* (more than enough) space for exception vectors */
46pad_skip: 50pad_skip:
@@ -81,6 +85,34 @@ remap_start:
81L_post_remap: .word remap_end 85L_post_remap: .word remap_end
82remap_end: 86remap_end:
83 87
88#ifdef CPU_PP
89 /* After doing the remapping, send the COP to sleep.
90 On wakeup it will go to cop_init */
91#if CONFIG_CPU == PP5002
92 ldr r0, =PP5002_PROC_ID
93#else
94 ldr r0, =PP5020_PROC_ID
95#endif
96 ldr r0, [r0]
97 and r0, r0, #0xff
98 cmp r0, #0x55
99 beq 1f
100
101 /* put us (co-processor) to sleep */
102#if CONFIG_CPU == PP5002
103 ldr r4, =PP5002_COP_CTRL
104 mov r3, #0xca
105#else
106 ldr r4, =PP5020_COP_CTRL
107 mov r3, #0x80000000
108#endif
109 str r3, [r4]
110
111 ldr pc, =cop_init
112
1131:
114#endif
115
84#elif CONFIG_CPU == PNX0101 116#elif CONFIG_CPU == PNX0101
85 117
86#ifndef DEBUG 118#ifndef DEBUG
@@ -167,10 +199,6 @@ remap_end:
167 199
168#ifdef BOOTLOADER 200#ifdef BOOTLOADER
169#ifdef CPU_PP 201#ifdef CPU_PP
170 .equ PP5002_PROC_ID, 0xc4000000
171 .equ PP5002_COP_CTRL, 0xcf004058
172 .equ PP5020_PROC_ID, 0x60000000
173 .equ PP5020_COP_CTRL, 0x60007004
174 /* TODO: the high part of the address is probably dependent on CONFIG_CPU. 202 /* TODO: the high part of the address is probably dependent on CONFIG_CPU.
175 Since we tend to use ifdefs for each chipset target 203 Since we tend to use ifdefs for each chipset target
176 anyway, we might as well just hardcode it here. 204 anyway, we might as well just hardcode it here.
@@ -306,6 +334,35 @@ boot_table:
306 bl main 334 bl main
307 /* main() should never return */ 335 /* main() should never return */
308 336
337#ifdef CPU_PP
338cop_init:
339 ldr sp, =cop_stackend
340 mov r3, sp
341 ldr r2, =cop_stackbegin
342 ldr r4, =0xdeadbeef
3432:
344 cmp r3, r2
345 strhi r4, [r2], #4
346 bhi 2b
347
348 ldr sp, =cop_stackend
349 bl cop_main
350#else
351 /* If we don't plan to use the COP, we have some code to catch it and send
352 it back to sleep if somebody wakes it. This means that the firmware
353 size doesn't grow too much while the COP is still unused, but it is
354 still handled cleanly. */
355#if CONFIG_CPU==PP5002
356 ldr r4, =PP5002_COP_CTRL
357 mov r3, #0xca
358#else
359 ldr r4, =PP5020_COP_CTRL
360 mov r3, #0x80000000
361#endif
362 str r3, [r4]
363 ldr pc, =cop_init
364#endif /* PP specific */
365
309/* Exception handlers. Will be copied to address 0 after memory remapping */ 366/* Exception handlers. Will be copied to address 0 after memory remapping */
310 .section .vectors,"aw" 367 .section .vectors,"aw"
311 ldr pc, [pc, #24] 368 ldr pc, [pc, #24]