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| author | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2008-05-03 22:33:09 +0000 |
|---|---|---|
| committer | Maurus Cuelenaere <mcuelenaere@gmail.com> | 2008-05-03 22:33:09 +0000 |
| commit | a969e85e179cd1260b04203f01c68aaa85001504 (patch) | |
| tree | 1dd14b5a433862b4d4ef973846f67edde4b81946 | |
| parent | 41a82f96a8451f7f326ca3786dc64327c14f42e7 (diff) | |
| download | rockbox-a969e85e179cd1260b04203f01c68aaa85001504.tar.gz rockbox-a969e85e179cd1260b04203f01c68aaa85001504.zip | |
Forgot a file
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17340 a1c6a512-1295-4272-9138-f99709370657
| -rw-r--r-- | firmware/export/dm320.h | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/firmware/export/dm320.h b/firmware/export/dm320.h index 311ac01f29..9facbd2dd3 100644 --- a/firmware/export/dm320.h +++ b/firmware/export/dm320.h | |||
| @@ -351,7 +351,7 @@ | |||
| 351 | #define IO_VID_ENC_VMOD DM320_REG(0x0800) | 351 | #define IO_VID_ENC_VMOD DM320_REG(0x0800) |
| 352 | #define IO_VID_ENC_VDCTL DM320_REG(0x0802) | 352 | #define IO_VID_ENC_VDCTL DM320_REG(0x0802) |
| 353 | #define IO_VID_ENC_VDPRO DM320_REG(0x0804) | 353 | #define IO_VID_ENC_VDPRO DM320_REG(0x0804) |
| 354 | #define IO_VID_ENC_SYNCCTL DM320_REG(0x0806) | 354 | #define IO_VID_ENC_SYNCTL DM320_REG(0x0806) |
| 355 | #define IO_VID_ENC_HSPLS DM320_REG(0x0808) | 355 | #define IO_VID_ENC_HSPLS DM320_REG(0x0808) |
| 356 | #define IO_VID_ENC_VSPLS DM320_REG(0x080A) | 356 | #define IO_VID_ENC_VSPLS DM320_REG(0x080A) |
| 357 | #define IO_VID_ENC_HINT DM320_REG(0x080C) | 357 | #define IO_VID_ENC_HINT DM320_REG(0x080C) |
| @@ -960,19 +960,19 @@ | |||
| 960 | #define VENC_VDPRO_CUPS (1 << 1) | 960 | #define VENC_VDPRO_CUPS (1 << 1) |
| 961 | #define VENC_VDPRO_YUPS (1 << 0) | 961 | #define VENC_VDPRO_YUPS (1 << 0) |
| 962 | 962 | ||
| 963 | #define VENC_SYNCCTL_EXFEN (1 << 12) | 963 | #define VENC_SYNCTL_EXFEN (1 << 12) |
| 964 | #define VENC_SYNCCTL_EXFIV (1 << 11) | 964 | #define VENC_SYNCTL_EXFIV (1 << 11) |
| 965 | #define VENC_SYNCCTL_EXSYNC (1 << 10) | 965 | #define VENC_SYNCTL_EXSYNC (1 << 10) |
| 966 | #define VENC_SYNCCTL_EXVIV (1 << 9) | 966 | #define VENC_SYNCTL_EXVIV (1 << 9) |
| 967 | #define VENC_SYNCCTL_EXHIV (1 << 8) | 967 | #define VENC_SYNCTL_EXHIV (1 << 8) |
| 968 | #define VENC_SYNCCTL_CSP (1 << 7) | 968 | #define VENC_SYNCTL_CSP (1 << 7) |
| 969 | #define VENC_SYNCCTL_CSE (1 << 6) | 969 | #define VENC_SYNCTL_CSE (1 << 6) |
| 970 | #define VENC_SYNCCTL_SYSW (1 << 5) | 970 | #define VENC_SYNCTL_SYSW (1 << 5) |
| 971 | #define VENC_SYNCCTL_VSYNCS (1 << 4) | 971 | #define VENC_SYNCTL_VSYNCS (1 << 4) |
| 972 | #define VENC_SYNCCTL_VPL (1 << 3) | 972 | #define VENC_SYNCTL_VPL (1 << 3) |
| 973 | #define VENC_SYNCCTL_HPL (1 << 2) | 973 | #define VENC_SYNCTL_HPL (1 << 2) |
| 974 | #define VENC_SYNCCTL_SYE (1 << 1) | 974 | #define VENC_SYNCTL_SYE (1 << 1) |
| 975 | #define VENC_SYNCCTL_SYDIR (1 << 0) | 975 | #define VENC_SYNCTL_SYDIR (1 << 0) |
| 976 | 976 | ||
| 977 | #define VENC_RGBCTL_IRONM (1 << 11) | 977 | #define VENC_RGBCTL_IRONM (1 << 11) |
| 978 | #define VENC_RGBCTL_DFLTR (1 << 10) | 978 | #define VENC_RGBCTL_DFLTR (1 << 10) |