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authorMaurus Cuelenaere <mcuelenaere@gmail.com>2008-05-03 22:27:55 +0000
committerMaurus Cuelenaere <mcuelenaere@gmail.com>2008-05-03 22:27:55 +0000
commit41a82f96a8451f7f326ca3786dc64327c14f42e7 (patch)
treeab0feeaba25035eb340150b43d11914ac261b72a
parent5fc95a301d41bf29b18bc41c1c9c07684298124a (diff)
downloadrockbox-41a82f96a8451f7f326ca3786dc64327c14f42e7.tar.gz
rockbox-41a82f96a8451f7f326ca3786dc64327c14f42e7.zip
More LCD stuff..
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@17339 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c164
1 files changed, 98 insertions, 66 deletions
diff --git a/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c b/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
index 84b2e780cb..2d75b1ffa6 100644
--- a/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
+++ b/firmware/target/arm/tms320dm320/creative-zvm/lcd-creativezvm.c
@@ -29,9 +29,8 @@
29#include "lcd-target.h" 29#include "lcd-target.h"
30 30
31/* Power and display status */ 31/* Power and display status */
32static bool display_on = true; /* Is the display turned on? */ 32static bool display_on = false; /* Is the display turned on? */
33static bool direct_fb_access = false; /* Does the DM320 has direct access to 33static bool direct_fb_access = false; /* Does the DM320 has direct access to the FB? */
34 the FB? */
35 34
36/* Copies a rectangle from one framebuffer to another. Can be used in 35/* Copies a rectangle from one framebuffer to another. Can be used in
37 single transfer mode with width = num pixels, and height = 1 which 36 single transfer mode with width = num pixels, and height = 1 which
@@ -60,8 +59,30 @@ void lcd_set_flip(bool yesno) {
60 /* TODO: */ 59 /* TODO: */
61} 60}
62 61
62static void enable_venc(bool enable)
63{
64 if(enable)
65 {
66 /* Set OSD clock */
67 IO_CLK_MOD1 &= ~(CLK_MOD1_VENC | CLK_MOD1_OSD); /* disable OSD clock and VENC clock */
68 IO_CLK_O2DIV = 3;
69
70 IO_CLK_OSEL &= ~CLK_OSEL_O2SEL(0xF); /* reset 'General purpose clock output (GIO26, GIO34)' and */
71 IO_CLK_OSEL |= CLK_OSEL_O2SEL(4); /* set to 'PLLIN clock' */
72
73 IO_CLK_SEL1 |= (CLK_SEL1_OSD | CLK_SEL1_VENC(7)); /* set to 'GP clock output 2 (GIO26, GIO34)' and turn on 'VENC clock' */
74 IO_CLK_MOD1 |= (CLK_MOD1_VENC | CLK_MOD1_OSD); /* enable OSD clock and VENC clock */
75 }
76 else
77 {
78 /* Disable video encoder */
79 IO_VID_ENC_VMOD &= ~VENC_VMOD_VENC;
80 /* Disable clock for power saving */
81 IO_CLK_MOD1 &= ~(CLK_MOD1_VENC | CLK_MOD1_OSD);
82 }
83}
84
63/* LTV250QV panel functions */ 85/* LTV250QV panel functions */
64#ifdef ENABLE_DISPLAY_FUNCS
65static void lcd_write_reg(unsigned char reg, unsigned short val) 86static void lcd_write_reg(unsigned char reg, unsigned short val)
66{ 87{
67 unsigned char block[3]; 88 unsigned char block[3];
@@ -80,8 +101,8 @@ static void sleep_ms(unsigned int ms)
80 sleep(ms*HZ/1000); 101 sleep(ms*HZ/1000);
81} 102}
82 103
83static void lcd_display_on(void) 104static void lcd_display_on(bool reset)
84{ 105{
85 /* Enable main power */ 106 /* Enable main power */
86 IO_GIO_BITSET2 |= (1 << 3); 107 IO_GIO_BITSET2 |= (1 << 3);
87 108
@@ -160,14 +181,18 @@ static void lcd_display_on(void)
160 lcd_write_reg(10, 0x111A); 181 lcd_write_reg(10, 0x111A);
161 sleep_ms(10); 182 sleep_ms(10);
162 183
184 if(!reset)
185 {
186 enable_venc(true);
187 /* Re-enable video encoder */
188 IO_VID_ENC_VMOD |= VENC_VMOD_VENC;
189 }
163 /* tell that we're on now */ 190 /* tell that we're on now */
164 display_on = true; 191 display_on = true;
165} 192}
166 193
167void lcd_display_off(void) 194static void lcd_display_off(void)
168{ 195{
169 display_on = false;
170
171 /* LQV shutdown sequence */ 196 /* LQV shutdown sequence */
172 lcd_write_reg(9, 0x855); 197 lcd_write_reg(9, 0x855);
173 sleep_ms(20); 198 sleep_ms(20);
@@ -194,26 +219,28 @@ void lcd_display_off(void)
194 219
195 /* Disable main power */ 220 /* Disable main power */
196 IO_GIO_BITCLR2 |= (1 << 3); 221 IO_GIO_BITCLR2 |= (1 << 3);
222
223 enable_venc(false);
224
225 display_on = false;
197} 226}
198 227
199#endif /* ENABLE_DISPLAY_FUNCS */
200
201 228
202void lcd_enable(bool on) 229void lcd_enable(bool on)
203{ 230{
231/* Disabled until properly working */
232return;
204 if (on == display_on) 233 if (on == display_on)
205 return; 234 return;
206 235
207 if (on) 236 if (on)
208 { 237 {
209 display_on = true; /*TODO: remove me! */ 238 lcd_display_on(false); /* Turn on display */
210 //lcd_display_on(); /* Turn on display */
211 lcd_update(); /* Resync display */ 239 lcd_update(); /* Resync display */
212 } 240 }
213 else 241 else
214 { 242 {
215 display_on = false; /*TODO: remove me! */ 243 lcd_display_off(); /* Turn off display */
216 //lcd_display_off(); /* Turn off display */
217 } 244 }
218} 245}
219 246
@@ -239,56 +266,64 @@ bool lcd_get_direct_fb(void)
239 return direct_fb_access; 266 return direct_fb_access;
240} 267}
241 268
242void lcd_init_device(void) 269static bool _lcd_enabled(void)
243{ 270{
244 /* Based on lcd-mr500.c from Catalin Patulea */ 271 /* Needed to detect if VENC/LCD already is initialized... */
245 unsigned int addr; 272 if(IO_VID_ENC_VDCTL & VENC_VDCTL_VCLKE)
273 return true;
274 else if(!(IO_VID_ENC_VDCTL & VENC_VDCTL_YCDC))
275 return true;
276 else if(IO_CLK_MOD1 & CLK_MOD1_VENC)
277 return true;
278 else if(IO_CLK_MOD1 & CLK_MOD1_OSD)
279 return true;
280 else
281 return false;
282}
283
284void lcd_init_device(void)
285{
286 if(!_lcd_enabled())
287 {
288 lcd_display_on(true);
289
290 enable_venc(true);
291
292 /* Set LCD values in Video Encoder */
293 IO_VID_ENC_VMOD &= 0x8800; /* Clear all values */
294 IO_VID_ENC_VMOD |= (VENC_VMOD_DACPD | VENC_VMOD_VMD | VENC_VMOD_ITLC | VENC_VMOD_VDMD(2)); /* set mode to RGB666 parallel 16 bit */
295 IO_VID_ENC_VDCTL &= 0x8FE8; /* Clear all values */
296 IO_VID_ENC_VDCTL |= (VENC_VDCTL_VCLKP | VENC_VDCTL_DOMD(2)),
297 IO_VID_ENC_VDPRO = VENC_VDPRO_PFLTR;
298 IO_VID_ENC_SYNCTL &= 0xE000; /* Clear all values */
299 IO_VID_ENC_SYNCTL |= (VENC_SYNCTL_VPL | VENC_SYNCTL_HPL);
300 IO_VID_ENC_HSDLY = 0;
301 IO_VID_ENC_HSPLS = 0x12;
302 IO_VID_ENC_HSTART = 0x1B;
303 IO_VID_ENC_HVALID = 0x140;
304 IO_VID_ENC_HINT = 0x168;
305 IO_VID_ENC_VSDLY = 0;
306 IO_VID_ENC_VSPLS = 3;
307 IO_VID_ENC_VSTART = 5;
308 IO_VID_ENC_VVALID = 0xF0;
309 IO_VID_ENC_VINT = 0x118;
310 IO_VID_ENC_RGBCTL &= 0x088; /* Clear all values */
311 IO_VID_ENC_RGBCTL |= VENC_RGBCTL_DFLTR;
312 IO_VID_ENC_RGBCLP = VENC_RGBCLP_UCLIP(0xFF);
313 IO_VID_ENC_LCDOUT &= 0xFE00; /* Clear all values */
314 IO_VID_ENC_LCDOUT |= (VENC_LCDOUT_OEE | VENC_LCDOUT_FIDS);
315 IO_VID_ENC_DCLKCTL &= 0xC0C0; /* Clear all values */
316 IO_VID_ENC_DCLKCTL |= VENC_DCLKCTL_DCKEC;
317 IO_VID_ENC_DCLKPTN0 = 1;
318 DM320_REG(0x0864) = 0; /* ???? */
319 }
320 else
321 display_on = true;
246 322
323 /* Based on lcd-mr500.c from Catalin Patulea */
247 /* Clear the Frame */ 324 /* Clear the Frame */
248 memset16(FRAME, 0x0000, LCD_WIDTH*LCD_HEIGHT); 325 memset16(FRAME, 0x0000, LCD_WIDTH*LCD_HEIGHT);
249 326
250#ifdef ENABLE_DISPLAY_FUNCS
251 lcd_display_on();
252
253 /* Set OSD clock */
254 IO_CLK_MOD1 &= ~(CLK_MOD1_VENC | CLK_MOD1_OSD); /* disable OSD clock and VENC clock */
255 IO_CLK_O2DIV = 3;
256
257 IO_CLK_OSEL &= ~CLK_OSEL_O2SEL(0xF); /* reset 'General purpose clock output (GIO26, GIO34)' and */
258 IO_CLK_OSEL |= CLK_OSEL_O2SEL(4); /* set to 'PLLIN clock' */
259
260 IO_CLK_SEL1 |= (CLK_SEL1_OSD | CLK_SEL1_VENC(7)); /* set to 'GP clock output 2 (GIO26, GIO34)' and turn on 'VENC clock' */
261 IO_CLK_MOD1 |= (CLK_MOD1_VENC | CLK_MOD1_OSD); /* enable OSD clock and VENC clock */
262
263 /* Set LCD values in Video Encoder */
264 IO_VID_ENC_VMOD &= 0x8800; /* Clear all values */
265 IO_VID_ENC_VMOD |= (VENC_VMOD_DACPD | VENC_VMOD_VMD | VENC_VMOD_ITLC | VENC_VMOD_VDMD(2)); /* set mode to RGB666 parallel 16 bit */
266 IO_VID_ENC_VDTL &= 0x8FE8; /* Clear all values */
267 IO_VID_ENC_VDCTL |= (VENC_VDCTL_VCLKP | VENC_VDCTL_DOMD(2)),
268 IO_VID_ENC_VPRO = VENC_VDPRO_PFLTR;
269 IO_VID_ENC_SYNCCTL &= 0xE000; /* Clear all values */
270 IO_VID_ENC_SYNCCTL |= (VENC_SYNCCTL_VPL | VENC_SYNCCTL_HPL);
271 IO_VID_ENC_HSDLY = 0;
272 IO_VID_ENC_HSPLS = 0x12;
273 IO_VID_ENC_HSTART = 0x1B;
274 IO_VID_ENC_HVALID = 0x140;
275 IO_VID_ENC_HINT = 0x168;
276 IO_VID_ENC_VSDLY = 0;
277 IO_VID_ENC_VSPLS = 3;
278 IO_VID_ENC_VSTART = 5;
279 IO_VID_ENC_VVALID = 0xF0;
280 IO_VID_ENC_VINT = 0x118;
281 IO_VID_ENC_RGBCTL &= 0x088; /* Clear all values */
282 IO_VID_ENC_RGBCTL |= VENC_RGBCTL_DFLTR;
283 IO_VID_ENC_RGBCLP = VENC_RGBCLP_UCLIP(0xFF);
284 IO_VID_ENC_LCDOUT &= 0xFE00; /* Clear all values */
285 IO_VID_ENC_LCDOUT |= (VENC_LCDOUT_OEE | VENC_LCDOUT_FIDS);
286 IO_VID_ENC_DCLKCTL &= 0xC0C0; /* Clear all values */
287 IO_VID_ENC_DCLKCTL |= VENC_DCLKCTL_DCKEC;
288 IO_VID_ENC_DCLKPTN0 = 1;
289 DM320_REG(0x0864) = 0; /* ???? */
290#endif
291
292 IO_OSD_MODE = 0x00ff; 327 IO_OSD_MODE = 0x00ff;
293 IO_OSD_VIDWINMD = 0x0002; 328 IO_OSD_VIDWINMD = 0x0002;
294 IO_OSD_OSDWINMD0 = 0x2001; 329 IO_OSD_OSDWINMD0 = 0x2001;
@@ -296,6 +331,7 @@ void lcd_init_device(void)
296 IO_OSD_ATRMD = 0x0000; 331 IO_OSD_ATRMD = 0x0000;
297 IO_OSD_RECTCUR = 0x0000; 332 IO_OSD_RECTCUR = 0x0000;
298 333
334 unsigned int addr;
299 IO_OSD_OSDWIN0OFST = (LCD_WIDTH*16) / 256; 335 IO_OSD_OSDWIN0OFST = (LCD_WIDTH*16) / 256;
300 addr = ((unsigned int)FRAME-CONFIG_SDRAM_START) / 32; 336 addr = ((unsigned int)FRAME-CONFIG_SDRAM_START) / 32;
301 IO_OSD_OSDWINADH = addr >> 16; 337 IO_OSD_OSDWINADH = addr >> 16;
@@ -314,19 +350,15 @@ void lcd_init_device(void)
314 IO_OSD_OSDWIN0XL = LCD_WIDTH; 350 IO_OSD_OSDWIN0XL = LCD_WIDTH;
315 IO_OSD_OSDWIN0YL = LCD_HEIGHT; 351 IO_OSD_OSDWIN0YL = LCD_HEIGHT;
316 352
317#ifdef ENABLE_DISPLAY_FUNCS
318 IO_VID_ENC_VDCTL |= VENC_VDCTL_VCLKE; /* Enable VCLK */ 353 IO_VID_ENC_VDCTL |= VENC_VDCTL_VCLKE; /* Enable VCLK */
319 IO_VID_ENC_VMOD |= VENC_VMOD_VENC; /* Enable video encoder */ 354 IO_VID_ENC_VMOD |= VENC_VMOD_VENC; /* Enable video encoder */
320 IO_VID_ENC_SYNCCTL |= VENC_SYNCCTL_SYE; /* Enable sync output */ 355 IO_VID_ENC_SYNCTL |= VENC_SYNCTL_SYE; /* Enable sync output */
321 IO_VID_ENC_VDCTL &= ~VENC_VDCTL_DOMD(3); /* Normal digital data output */ 356 IO_VID_ENC_VDCTL &= ~VENC_VDCTL_DOMD(3); /* Normal digital data output */
322#endif
323} 357}
324 358
325 359
326/*** Update functions ***/ 360/*** Update functions ***/
327 361
328
329
330/* Update a fraction of the display. */ 362/* Update a fraction of the display. */
331void lcd_update_rect(int x, int y, int width, int height) 363void lcd_update_rect(int x, int y, int width, int height)
332{ 364{