e200v1 seems to be ok using USB-enabled bootloader. Also, include the bootloader USB .lds into the boot.lds instead of pasting into every one to keep things sane for now-- commented upon inside.

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@29062 a1c6a512-1295-4272-9138-f99709370657

5 files changed, 150 insertions, 136 deletions

diff --git a/firmware/export/config/sansae200.h b/firmware/export/config/sansae200.h
index 94e9e5b690..a6f4e5416d 100644
--- a/firmware/export/config/sansae200.h
+++ b/firmware/export/config/sansae200.h
@@ -190,6 +190,9 @@
 #define USB_VENDOR_ID 0x0781
 #define USB_PRODUCT_ID 0x7421
 #define HAVE_USB_HID_MOUSE
+#ifdef BOOTLOADER
+#define HAVE_BOOTLOADER_USB_MODE
+#endif
 
 /* Define this if you have adjustable CPU frequency */
 #define HAVE_ADJUSTABLE_CPU_FREQ
diff --git a/firmware/target/arm/boot-pp502x-bl-usb.lds b/firmware/target/arm/boot-pp502x-bl-usb.lds
new file mode 100644
index 0000000000..30a8c0e716
--- /dev/null
+++ b/firmware/target/arm/boot-pp502x-bl-usb.lds
@@ -0,0 +1,136 @@
+/* Will have been included from boot.lds */
+ENTRY(start)
+OUTPUT_FORMAT(elf32-littlearm)
+OUTPUT_ARCH(arm)
+STARTUP(target/arm/crt0-pp502x-bl-usb.o)
+
+#define DRAMORIG        0x01000000 /* Load at 16 MB */
+#define DRAMSIZE        0x00100000 /* 1MB for bootloader */
+#define MEMEND          (MEMORYSIZE*0x100000) /* From virtual mapping at 0 */
+#define NOCACHE_BASE    0x10000000
+#ifndef IRAMORIG
+#define IRAMORIG 0x40000000
+#endif
+#define IRAMSIZE 0x20000
+#define FLASHORIG 0x001f0000
+#define FLASHSIZE 2M
+
+#define CACHEALIGN_SIZE 16
+
+MEMORY
+{
+    DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
+    IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
+}
+
+SECTIONS
+{
+    . = DRAMORIG;
+    _loadaddress = . + NOCACHE_BASE;
+
+    .text :
+    {
+        *(.init.text)
+        *(.text*)
+        *(.glue_7)
+        *(.glue_7t)
+        . = ALIGN(0x4);
+    } > DRAM
+
+    .rodata :
+    {
+        *(.rodata)  /* problems without this, dunno why */
+        *(.rodata*)
+        *(.rodata.str1.1)
+        *(.rodata.str1.4)
+        . = ALIGN(0x4);
+    } > DRAM
+
+    .data :
+    {
+        *(.data*)
+        . = ALIGN(0x4);
+    } > DRAM
+
+    /* .ncdata section is placed at uncached physical alias address and is
+     * loaded at the proper cached virtual address - no copying is
+     * performed in the init code */
+    .ncdata . + NOCACHE_BASE :
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncdata*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> DRAM
+
+    /DISCARD/ . - NOCACHE_BASE :
+    {
+        *(.eh_frame)
+    } > DRAM
+
+    _noloaddram  = .;
+
+    .ibss IRAMORIG (NOLOAD) :
+    {
+        _iedata = .;
+        *(.qharray)
+        *(.ibss)
+        . = ALIGN(0x4);
+        _iend = .;
+    } > IRAM
+
+    .iram _iend :
+    {
+        _iramstart = .;
+        *(.icode)
+        *(.irodata)
+        *(.idata)
+        _iramend = .;
+    } > IRAM AT> DRAM
+
+    _iramcopy = LOADADDR(.iram);
+
+    .loadaddressend :
+    {
+        _loadaddressend = . + NOCACHE_BASE;
+    } AT> DRAM
+
+    .stack (NOLOAD) :
+    {
+        . = ALIGN(8);
+        *(.stack)
+        stackbegin = .;
+        . += 0x2000;
+        stackend = .;
+    } > IRAM
+
+    /* .bss and .ncbss are treated as a single section to use one init loop
+     * to zero them - note "_edata" and "_end" */
+    .bss _noloaddram (NOLOAD) :
+    {
+        _edata = .;
+        *(.bss*)
+        *(COMMON)
+    } > DRAM
+
+    .ncbss . + NOCACHE_BASE (NOLOAD) :
+    {
+        . = ALIGN(CACHEALIGN_SIZE);
+        *(.ncbss*)
+        . = ALIGN(CACHEALIGN_SIZE);
+    } AT> DRAM
+
+    /* This will be aligned by preceding alignments */
+    .endaddr . - NOCACHE_BASE (NOLOAD) :
+    {
+        _end = .;
+    } > DRAM
+
+    /* Reference to all DRAM after loaded bootloader image */
+    .freebuffer _end (NOLOAD) :
+    {
+        . = ALIGN(4);
+        freebuffer = .;
+        . = MEMEND-1;
+        freebufferend = .;
+    }
+}
diff --git a/firmware/target/arm/philips/boot.lds b/firmware/target/arm/philips/boot.lds
index 411d7b1df2..5d63caddb0 100644
--- a/firmware/target/arm/philips/boot.lds
+++ b/firmware/target/arm/philips/boot.lds
@@ -2,142 +2,7 @@
 
 /* Can't link all Philips ARM devices the same way at this time */
 #ifdef HAVE_BOOTLOADER_USB_MODE
-ENTRY(start)
-OUTPUT_FORMAT(elf32-littlearm)
-OUTPUT_ARCH(arm)
-STARTUP(target/arm/crt0-pp502x-bl-usb.o)
-
-#define DRAMORIG        0x01000000 /* Load at 16 MB */
-#define DRAMSIZE        0x00100000 /* 1MB for bootloader */
-#define MEMEND          (MEMORYSIZE*0x100000) /* From virtual mapping at 0 */
-#define NOCACHE_BASE    0x10000000
-#ifndef IRAMORIG
-#define IRAMORIG 0x40000000
-#endif
-#define IRAMSIZE 0x20000
-#define FLASHORIG 0x001f0000
-#define FLASHSIZE 2M
-
-#define CACHEALIGN_SIZE 16
-
-MEMORY
-{
-    DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
-    IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
-}
-
-SECTIONS
-{
-    . = DRAMORIG;
-    _loadaddress = . + NOCACHE_BASE;
-
-    .text :
-    {
-        *(.init.text)
-        *(.text*)
-        *(.glue_7)
-        *(.glue_7t)
-        . = ALIGN(0x4);
-    } > DRAM
-
-    .rodata :
-    {
-        *(.rodata)  /* problems without this, dunno why */
-        *(.rodata*)
-        *(.rodata.str1.1)
-        *(.rodata.str1.4)
-        . = ALIGN(0x4);
-    } > DRAM
-
-    .data :
-    {
-        *(.data*)
-        . = ALIGN(0x4);
-    } > DRAM
-
-    /* .ncdata section is placed at uncached physical alias address and is
-     * loaded at the proper cached virtual address - no copying is
-     * performed in the init code */
-    .ncdata . + NOCACHE_BASE :
-    {
-        . = ALIGN(CACHEALIGN_SIZE);
-        *(.ncdata*)
-        . = ALIGN(CACHEALIGN_SIZE);
-    } AT> DRAM
-
-    /DISCARD/ . - NOCACHE_BASE :
-    {
-        *(.eh_frame)
-    } > DRAM
-
-    _noloaddram  = .;
-
-    .ibss IRAMORIG (NOLOAD) :
-    {
-        _iedata = .;
-        *(.qharray)
-        *(.ibss)
-        . = ALIGN(0x4);
-        _iend = .;
-    } > IRAM
-
-    .iram _iend :
-    {
-        _iramstart = .;
-        *(.icode)
-        *(.irodata)
-        *(.idata)
-        _iramend = .;
-    } > IRAM AT> DRAM
-
-    _iramcopy = LOADADDR(.iram);
-
-    .loadaddressend :
-    {
-        _loadaddressend = . + NOCACHE_BASE;
-    } AT> DRAM
-
-    .stack (NOLOAD) :
-    {
-        . = ALIGN(8);
-        *(.stack)
-        stackbegin = .;
-        . += 0x2000;
-        stackend = .;
-    } > IRAM
-
-    /* .bss and .ncbss are treated as a single section to use one init loop
-     * to zero them - note "_edata" and "_end" */
-    .bss _noloaddram (NOLOAD) :
-    {
-        _edata = .;
-        *(.bss*)
-        *(COMMON)
-    } > DRAM
-
-    .ncbss . + NOCACHE_BASE (NOLOAD) :
-    {
-        . = ALIGN(CACHEALIGN_SIZE);
-        *(.ncbss*)
-        . = ALIGN(CACHEALIGN_SIZE);
-    } AT> DRAM
-
-    /* This will be aligned by preceding alignments */
-    .endaddr . - NOCACHE_BASE (NOLOAD) :
-    {
-        _end = .;
-    } > DRAM
-
-    /* Reference to all DRAM after loaded bootloader image */
-    .freebuffer _end (NOLOAD) :
-    {
-        . = ALIGN(4);
-        freebuffer = .;
-        . = MEMEND-1;
-        freebufferend = .;
-    }
-}
-
+#include "../boot-pp502x-bl-usb.lds"
 #else /* !HAVE_BOOTLOADER_USB_MODE */
 ENTRY(start)
 OUTPUT_FORMAT(elf32-littlearm)
diff --git a/firmware/target/arm/sandisk/boot.lds b/firmware/target/arm/sandisk/boot.lds
index c0621b8abf..4b8adc8991 100644
--- a/firmware/target/arm/sandisk/boot.lds
+++ b/firmware/target/arm/sandisk/boot.lds
@@ -1,5 +1,10 @@
 #include "config.h"
 
+/* Can't link all Sansa PP devices the same way at this time */
+#ifdef HAVE_BOOTLOADER_USB_MODE
+#include "../boot-pp502x-bl-usb.lds"
+#else /* !HAVE_BOOTLOADER_USB_MODE */
+
 ENTRY(start)
 OUTPUT_FORMAT(elf32-littlearm)
 OUTPUT_ARCH(arm)
@@ -73,3 +78,4 @@ SECTIONS
      _end = .;
   } > DRAM
 }
+#endif /* HAVE_BOOTLOADER_USB_MODE */
diff --git a/firmware/target/arm/sandisk/sansa-e200/button-e200.c b/firmware/target/arm/sandisk/sansa-e200/button-e200.c
index 52b8949396..1e952b3882 100644
--- a/firmware/target/arm/sandisk/sansa-e200/button-e200.c
+++ b/firmware/target/arm/sandisk/sansa-e200/button-e200.c
@@ -272,6 +272,10 @@ void clickwheel_int(void)
             delta = 0x7ful << 24;
     }
 }
+#else
+void clickwheel_int(void)
+{
+}
 #endif /* BOOTLOADER */
 
 /* device buttons */