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Diffstat (limited to 'firmware/target/arm/philips/boot.lds')
-rw-r--r--firmware/target/arm/philips/boot.lds137
1 files changed, 1 insertions, 136 deletions
diff --git a/firmware/target/arm/philips/boot.lds b/firmware/target/arm/philips/boot.lds
index 411d7b1df2..5d63caddb0 100644
--- a/firmware/target/arm/philips/boot.lds
+++ b/firmware/target/arm/philips/boot.lds
@@ -2,142 +2,7 @@
2 2
3/* Can't link all Philips ARM devices the same way at this time */ 3/* Can't link all Philips ARM devices the same way at this time */
4#ifdef HAVE_BOOTLOADER_USB_MODE 4#ifdef HAVE_BOOTLOADER_USB_MODE
5ENTRY(start) 5#include "../boot-pp502x-bl-usb.lds"
6OUTPUT_FORMAT(elf32-littlearm)
7OUTPUT_ARCH(arm)
8STARTUP(target/arm/crt0-pp502x-bl-usb.o)
9
10#define DRAMORIG 0x01000000 /* Load at 16 MB */
11#define DRAMSIZE 0x00100000 /* 1MB for bootloader */
12#define MEMEND (MEMORYSIZE*0x100000) /* From virtual mapping at 0 */
13#define NOCACHE_BASE 0x10000000
14#ifndef IRAMORIG
15#define IRAMORIG 0x40000000
16#endif
17#define IRAMSIZE 0x20000
18#define FLASHORIG 0x001f0000
19#define FLASHSIZE 2M
20
21#define CACHEALIGN_SIZE 16
22
23MEMORY
24{
25 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
26 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
27}
28
29SECTIONS
30{
31 . = DRAMORIG;
32 _loadaddress = . + NOCACHE_BASE;
33
34 .text :
35 {
36 *(.init.text)
37 *(.text*)
38 *(.glue_7)
39 *(.glue_7t)
40 . = ALIGN(0x4);
41 } > DRAM
42
43 .rodata :
44 {
45 *(.rodata) /* problems without this, dunno why */
46 *(.rodata*)
47 *(.rodata.str1.1)
48 *(.rodata.str1.4)
49 . = ALIGN(0x4);
50 } > DRAM
51
52 .data :
53 {
54 *(.data*)
55 . = ALIGN(0x4);
56 } > DRAM
57
58 /* .ncdata section is placed at uncached physical alias address and is
59 * loaded at the proper cached virtual address - no copying is
60 * performed in the init code */
61 .ncdata . + NOCACHE_BASE :
62 {
63 . = ALIGN(CACHEALIGN_SIZE);
64 *(.ncdata*)
65 . = ALIGN(CACHEALIGN_SIZE);
66 } AT> DRAM
67
68 /DISCARD/ . - NOCACHE_BASE :
69 {
70 *(.eh_frame)
71 } > DRAM
72
73 _noloaddram = .;
74
75 .ibss IRAMORIG (NOLOAD) :
76 {
77 _iedata = .;
78 *(.qharray)
79 *(.ibss)
80 . = ALIGN(0x4);
81 _iend = .;
82 } > IRAM
83
84 .iram _iend :
85 {
86 _iramstart = .;
87 *(.icode)
88 *(.irodata)
89 *(.idata)
90 _iramend = .;
91 } > IRAM AT> DRAM
92
93 _iramcopy = LOADADDR(.iram);
94
95 .loadaddressend :
96 {
97 _loadaddressend = . + NOCACHE_BASE;
98 } AT> DRAM
99
100 .stack (NOLOAD) :
101 {
102 . = ALIGN(8);
103 *(.stack)
104 stackbegin = .;
105 . += 0x2000;
106 stackend = .;
107 } > IRAM
108
109 /* .bss and .ncbss are treated as a single section to use one init loop
110 * to zero them - note "_edata" and "_end" */
111 .bss _noloaddram (NOLOAD) :
112 {
113 _edata = .;
114 *(.bss*)
115 *(COMMON)
116 } > DRAM
117
118 .ncbss . + NOCACHE_BASE (NOLOAD) :
119 {
120 . = ALIGN(CACHEALIGN_SIZE);
121 *(.ncbss*)
122 . = ALIGN(CACHEALIGN_SIZE);
123 } AT> DRAM
124
125 /* This will be aligned by preceding alignments */
126 .endaddr . - NOCACHE_BASE (NOLOAD) :
127 {
128 _end = .;
129 } > DRAM
130
131 /* Reference to all DRAM after loaded bootloader image */
132 .freebuffer _end (NOLOAD) :
133 {
134 . = ALIGN(4);
135 freebuffer = .;
136 . = MEMEND-1;
137 freebufferend = .;
138 }
139}
140
141#else /* !HAVE_BOOTLOADER_USB_MODE */ 6#else /* !HAVE_BOOTLOADER_USB_MODE */
142ENTRY(start) 7ENTRY(start)
143OUTPUT_FORMAT(elf32-littlearm) 8OUTPUT_FORMAT(elf32-littlearm)