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authorJörg Hohensohn <hohensoh@rockbox.org>2003-11-06 01:34:50 +0000
committerJörg Hohensohn <hohensoh@rockbox.org>2003-11-06 01:34:50 +0000
commit75bab49a542922bb3623f5671ec259e6ef4734d5 (patch)
treeeb0d8fedec577ec25460e951ccb1ce5d6f99fef0
parent9e957579289cac6cb468500dff5bd169d97d45fa (diff)
downloadrockbox-75bab49a542922bb3623f5671ec259e6ef4734d5.tar.gz
rockbox-75bab49a542922bb3623f5671ec259e6ef4734d5.zip
set/clear port bits with atomic instructions instead of read-modify-write, saves time+space, allows port usage in ISR
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@4022 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/backlight.c9
-rw-r--r--firmware/drivers/ata.c14
-rw-r--r--firmware/drivers/fmradio.c15
-rw-r--r--firmware/drivers/i2c.c35
-rw-r--r--firmware/drivers/led.c9
-rw-r--r--firmware/drivers/mas.c11
-rw-r--r--firmware/drivers/power.c34
-rw-r--r--firmware/mpeg.c28
8 files changed, 88 insertions, 67 deletions
diff --git a/firmware/backlight.c b/firmware/backlight.c
index 5173d7819c..9a1159e59f 100644
--- a/firmware/backlight.c
+++ b/firmware/backlight.c
@@ -26,6 +26,7 @@
26#include "rtc.h" 26#include "rtc.h"
27#include "usb.h" 27#include "usb.h"
28#include "power.h" 28#include "power.h"
29#include "system.h"
29 30
30#define BACKLIGHT_ON 1 31#define BACKLIGHT_ON 1
31#define BACKLIGHT_OFF 2 32#define BACKLIGHT_OFF 2
@@ -73,7 +74,7 @@ void backlight_thread(void)
73 /* Disable square wave */ 74 /* Disable square wave */
74 rtc_write(0x0a, rtc_read(0x0a) & ~0x40); 75 rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
75#else 76#else
76 PADR |= 0x4000; 77 __set_bit_constant(14-8, &PADRH);
77#endif 78#endif
78 } 79 }
79 /* else if(backlight_timer) */ 80 /* else if(backlight_timer) */
@@ -83,7 +84,7 @@ void backlight_thread(void)
83 /* Enable square wave */ 84 /* Enable square wave */
84 rtc_write(0x0a, rtc_read(0x0a) | 0x40); 85 rtc_write(0x0a, rtc_read(0x0a) | 0x40);
85#else 86#else
86 PADR &= ~0x4000; 87 __clear_bit_constant(14-8, &PADRH);
87#endif 88#endif
88 } 89 }
89 break; 90 break;
@@ -93,7 +94,7 @@ void backlight_thread(void)
93 /* Disable square wave */ 94 /* Disable square wave */
94 rtc_write(0x0a, rtc_read(0x0a) & ~0x40); 95 rtc_write(0x0a, rtc_read(0x0a) & ~0x40);
95#else 96#else
96 PADR |= 0x4000; 97 __set_bit_constant(14-8, &PADRH);
97#endif 98#endif
98 break; 99 break;
99 100
@@ -171,7 +172,7 @@ void backlight_init(void)
171 create_thread(backlight_thread, backlight_stack, 172 create_thread(backlight_thread, backlight_stack,
172 sizeof(backlight_stack), backlight_thread_name); 173 sizeof(backlight_stack), backlight_thread_name);
173 174
174 PAIOR |= 0x4000; 175 __set_bit_constant(14-8, &PAIORH);
175 176
176 backlight_on(); 177 backlight_on();
177} 178}
diff --git a/firmware/drivers/ata.c b/firmware/drivers/ata.c
index 01a8fa360b..507a0c6353 100644
--- a/firmware/drivers/ata.c
+++ b/firmware/drivers/ata.c
@@ -607,11 +607,11 @@ int ata_hard_reset(void)
607 int ret; 607 int ret;
608 608
609 /* state HRR0 */ 609 /* state HRR0 */
610 PADR &= ~0x0200; /* assert _RESET */ 610 __clear_bit_constant(9-8, &PADRH); /* assert _RESET */
611 sleep(1); /* > 25us */ 611 sleep(1); /* > 25us */
612 612
613 /* state HRR1 */ 613 /* state HRR1 */
614 PADR |= 0x0200; /* negate _RESET */ 614 __set_bit_constant(9-8, &PADRH); /* negate _RESET */
615 sleep(1); /* > 2ms */ 615 sleep(1); /* > 2ms */
616 616
617 /* state HRR2 */ 617 /* state HRR2 */
@@ -718,11 +718,11 @@ static int io_address_detect(void)
718void ata_enable(bool on) 718void ata_enable(bool on)
719{ 719{
720 if(on) 720 if(on)
721 PADR &= ~0x80; /* enable ATA */ 721 __clear_bit_constant(7, &PADRL); /* enable ATA */
722 else 722 else
723 PADR |= 0x80; /* disable ATA */ 723 __set_bit_constant(7, &PADRL); /* disable ATA */
724 724
725 PAIOR |= 0x80; 725 __set_bit_constant(7, &PAIORL);
726} 726}
727 727
728static int identify(void) 728static int identify(void)
@@ -787,8 +787,8 @@ int ata_init(void)
787 led(false); 787 led(false);
788 788
789 /* Port A setup */ 789 /* Port A setup */
790 PAIOR |= 0x0200; /* output for ATA reset */ 790 __set_bit_constant(9-8, &PAIORH); /* output for ATA reset */
791 PADR |= 0x0200; /* release ATA reset */ 791 __set_bit_constant(9-8, &PADRH); /* release ATA reset */
792 PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */ 792 PACR2 &= 0xBFFF; /* GPIO function for PA7 (IDE enable) */
793 793
794 sleeping = false; 794 sleeping = false;
diff --git a/firmware/drivers/fmradio.c b/firmware/drivers/fmradio.c
index 14abb8e2b0..4b496b7e1c 100644
--- a/firmware/drivers/fmradio.c
+++ b/firmware/drivers/fmradio.c
@@ -21,6 +21,7 @@
21#include "kernel.h" 21#include "kernel.h"
22#include "thread.h" 22#include "thread.h"
23#include "debug.h" 23#include "debug.h"
24#include "system.h"
24 25
25#ifdef HAVE_FMRADIO 26#ifdef HAVE_FMRADIO
26 27
@@ -37,15 +38,15 @@
37#define PB4 0x0010 38#define PB4 0x0010
38 39
39/* cute little functions */ 40/* cute little functions */
40#define CE_LO (PBDR &= ~PB3) 41#define CE_LO __clear_bit_constant(3, PBDRL_ADDR)
41#define CE_HI (PBDR |= PB3) 42#define CE_HI __set_bit_constant(3, PBDRL_ADDR)
42#define CL_LO (PBDR &= ~PB1) 43#define CL_LO __clear_bit_constant(1, PBDRL_ADDR)
43#define CL_HI (PBDR |= PB1) 44#define CL_HI __set_bit_constant(1, PBDRL_ADDR)
44#define DO (PBDR & PB4) 45#define DO (PBDR & PB4)
45#define DI_LO (PBDR &= ~PB0) 46#define DI_LO __clear_bit_constant(0, PBDRL_ADDR)
46#define DI_HI (PBDR |= PB0) 47#define DI_HI __set_bit_constant(0, PBDRL_ADDR)
47 48
48#define START (PBDR |= (PB3 | PB1)) 49#define START __set_mask_constant((PB3 | PB1), PBDRL_ADDR)
49 50
50/* delay loop */ 51/* delay loop */
51#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0) 52#define DELAY do { int _x; for(_x=0;_x<10;_x++);} while (0)
diff --git a/firmware/drivers/i2c.c b/firmware/drivers/i2c.c
index f0b5907be8..6530227ad7 100644
--- a/firmware/drivers/i2c.c
+++ b/firmware/drivers/i2c.c
@@ -21,22 +21,23 @@
21#include "kernel.h" 21#include "kernel.h"
22#include "thread.h" 22#include "thread.h"
23#include "debug.h" 23#include "debug.h"
24#include "system.h"
24 25
25#define PB13 0x2000 26#define PB13 0x2000
26#define PB7 0x0080 27#define PB7 0x0080
27#define PB5 0x0020 28#define PB5 0x0020
28 29
29/* cute little functions */ 30/* cute little functions, atomic read-modify-write */
30#define SDA_LO (PBDR &= ~PB7) 31#define SDA_LO __clear_bit_constant(7, &PBDRL)
31#define SDA_HI (PBDR |= PB7) 32#define SDA_HI __set_bit_constant(7, &PBDRL)
32#define SDA_INPUT (PBIOR &= ~PB7) 33#define SDA_INPUT __clear_bit_constant(7, &PBIORL)
33#define SDA_OUTPUT (PBIOR |= PB7) 34#define SDA_OUTPUT __set_bit_constant(7, &PBIORL)
34#define SDA (PBDR & PB7) 35#define SDA (PBDR & PB7)
35 36
36#define SCL_INPUT (PBIOR &= ~PB13) 37#define SCL_INPUT __clear_bit_constant(13-8, &PBIORH)
37#define SCL_OUTPUT (PBIOR |= PB13) 38#define SCL_OUTPUT __set_bit_constant(13-8, &PBIORH)
38#define SCL_LO (PBDR &= ~PB13) 39#define SCL_LO __clear_bit_constant(13-8, &PBDRH)
39#define SCL_HI (PBDR |= PB13) 40#define SCL_HI __set_bit_constant(13-8, &PBDRH)
40#define SCL (PBDR & PB13) 41#define SCL (PBDR & PB13)
41 42
42/* arbitrary delay loop */ 43/* arbitrary delay loop */
@@ -81,11 +82,11 @@ void i2c_init(void)
81 PBCR2 &= ~0xcc00; /* PB5 abd PB7 */ 82 PBCR2 &= ~0xcc00; /* PB5 abd PB7 */
82 83
83 /* PB5 is "MAS enable". make it output and high */ 84 /* PB5 is "MAS enable". make it output and high */
84 PBIOR |= PB5; 85 __set_bit_constant(5, &PBIORL);
85 PBDR |= PB5; 86 __set_bit_constant(5, &PBDRL);
86 87
87 /* Set the clock line to an output */ 88 /* Set the clock line PB13 to an output */
88 PBIOR |= PB13; 89 __set_bit_constant(13-8, &PBIORH);
89 90
90 SDA_OUTPUT; 91 SDA_OUTPUT;
91 SDA_HI; 92 SDA_HI;
@@ -103,9 +104,13 @@ void i2c_ack(int bit)
103 104
104 SCL_LO; /* Set the clock low */ 105 SCL_LO; /* Set the clock low */
105 if ( bit ) 106 if ( bit )
107 {
106 SDA_HI; 108 SDA_HI;
109 }
107 else 110 else
111 {
108 SDA_LO; 112 SDA_LO;
113 }
109 114
110 SCL_INPUT; /* Set the clock to input */ 115 SCL_INPUT; /* Set the clock to input */
111 while(!SCL) /* and wait for the MAS to release it */ 116 while(!SCL) /* and wait for the MAS to release it */
@@ -153,9 +158,13 @@ void i2c_outb(unsigned char byte)
153 /* clock out each bit, MSB first */ 158 /* clock out each bit, MSB first */
154 for ( i=0x80; i; i>>=1 ) { 159 for ( i=0x80; i; i>>=1 ) {
155 if ( i & byte ) 160 if ( i & byte )
161 {
156 SDA_HI; 162 SDA_HI;
163 }
157 else 164 else
165 {
158 SDA_LO; 166 SDA_LO;
167 }
159 SCL_HI; 168 SCL_HI;
160 SCL_LO; 169 SCL_LO;
161 } 170 }
diff --git a/firmware/drivers/led.c b/firmware/drivers/led.c
index 293904f3f8..ad21dc9baf 100644
--- a/firmware/drivers/led.c
+++ b/firmware/drivers/led.c
@@ -20,6 +20,7 @@
20#include <stdbool.h> 20#include <stdbool.h>
21#include "sh7034.h" 21#include "sh7034.h"
22#include "led.h" 22#include "led.h"
23#include "system.h"
23 24
24void led(bool on) 25void led(bool on)
25{ 26{
@@ -30,8 +31,12 @@ void led(bool on)
30 asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1)); 31 asm("and.b" "\t" "%0,@(r0,gbr)" : : "I"(~0x40), "z"(PBDR_ADDR+1));
31#else 32#else
32 if ( on ) 33 if ( on )
33 PBDR |= 0x40; 34 {
35 __set_bit_constant(6, &PBDRL);
36 }
34 else 37 else
35 PBDR &= ~0x40; 38 {
39 __clear_bit_constant(6, &PBDRL);
40 }
36#endif 41#endif
37} 42}
diff --git a/firmware/drivers/mas.c b/firmware/drivers/mas.c
index e5967fe5f0..4d2c35be0f 100644
--- a/firmware/drivers/mas.c
+++ b/firmware/drivers/mas.c
@@ -23,6 +23,7 @@
23#include "debug.h" 23#include "debug.h"
24#include "mas.h" 24#include "mas.h"
25#include "kernel.h" 25#include "kernel.h"
26#include "system.h"
26 27
27extern bool old_recorder; 28extern bool old_recorder;
28 29
@@ -268,21 +269,21 @@ static int mas_devread(unsigned long *dest, int len)
268#ifdef HAVE_MAS3587F 269#ifdef HAVE_MAS3587F
269void mas_reset(void) 270void mas_reset(void)
270{ 271{
271 PAIOR |= 0x100; 272 __set_bit_constant(8-8, &PAIORH);
272 273
273 if(old_recorder) 274 if(old_recorder)
274 { 275 {
275 /* Older recorder models don't invert the POR signal */ 276 /* Older recorder models don't invert the POR signal */
276 PADR |= 0x100; 277 __set_bit_constant(8-8, &PADRH);
277 sleep(HZ/100); 278 sleep(HZ/100);
278 PADR &= ~0x100; 279 __clear_bit_constant(8-8, &PADRH);
279 sleep(HZ/5); 280 sleep(HZ/5);
280 } 281 }
281 else 282 else
282 { 283 {
283 PADR &= ~0x100; 284 __clear_bit_constant(8-8, &PADRH);
284 sleep(HZ/100); 285 sleep(HZ/100);
285 PADR |= 0x100; 286 __set_bit_constant(8-8, &PADRH);
286 sleep(HZ/5); 287 sleep(HZ/5);
287 } 288 }
288} 289}
diff --git a/firmware/drivers/power.c b/firmware/drivers/power.c
index 33015b2f4c..c0fa57d3b0 100644
--- a/firmware/drivers/power.c
+++ b/firmware/drivers/power.c
@@ -21,6 +21,7 @@
21#include "config.h" 21#include "config.h"
22#include "adc.h" 22#include "adc.h"
23#include "kernel.h" 23#include "kernel.h"
24#include "system.h"
24#include "power.h" 25#include "power.h"
25 26
26#ifdef HAVE_CHARGE_CTRL 27#ifdef HAVE_CHARGE_CTRL
@@ -32,11 +33,11 @@ bool charger_enabled;
32void power_init(void) 33void power_init(void)
33{ 34{
34#ifdef HAVE_CHARGE_CTRL 35#ifdef HAVE_CHARGE_CTRL
35 PBIOR |= 0x20; /* Set charging control bit to output */ 36 __set_bit_constant(5, &PBIORL); /* Set charging control bit to output */
36 charger_enable(false); /* Default to charger OFF */ 37 charger_enable(false); /* Default to charger OFF */
37#endif 38#endif
38#ifdef HAVE_ATA_POWER_OFF 39#ifdef HAVE_ATA_POWER_OFF
39 PAIOR |= 0x20; 40 __set_bit_constant(5, &PAIORL);
40 PACR2 &= 0xFBFF; 41 PACR2 &= 0xFBFF;
41#endif 42#endif
42} 43}
@@ -60,11 +61,14 @@ bool charger_inserted(void)
60void charger_enable(bool on) 61void charger_enable(bool on)
61{ 62{
62#ifdef HAVE_CHARGE_CTRL 63#ifdef HAVE_CHARGE_CTRL
63 if(on) { 64 if(on)
64 PBDR &= ~0x20; 65 {
66 __clear_bit_constant(5, &PBDRL);
65 charger_enabled = 1; 67 charger_enabled = 1;
66 } else { 68 }
67 PBDR |= 0x20; 69 else
70 {
71 __set_bit_constant(5, &PBDRL);
68 charger_enabled = 0; 72 charger_enabled = 0;
69 } 73 }
70#else 74#else
@@ -76,9 +80,9 @@ void ide_power_enable(bool on)
76{ 80{
77#ifdef HAVE_ATA_POWER_OFF 81#ifdef HAVE_ATA_POWER_OFF
78 if(on) 82 if(on)
79 PADR |= 0x20; 83 __set_bit_constant(5, &PADRL);
80 else 84 else
81 PADR &= ~0x20; 85 __clear_bit_constant(5, &PADRL);
82#else 86#else
83 on = on; 87 on = on;
84#endif 88#endif
@@ -88,14 +92,14 @@ void power_off(void)
88{ 92{
89 set_irq_level(15); 93 set_irq_level(15);
90#ifdef HAVE_POWEROFF_ON_PBDR 94#ifdef HAVE_POWEROFF_ON_PBDR
91 PBDR &= ~PBDR_BTN_OFF; 95 __clear_mask_constant(PBDR_BTN_OFF, &PBDRL);
92 PBIOR |= PBDR_BTN_OFF; 96 __set_mask_constant(PBDR_BTN_OFF, &PBIORL);
93#elif defined(HAVE_POWEROFF_ON_PB5) 97#elif defined(HAVE_POWEROFF_ON_PB5)
94 PBDR &= ~0x20; 98 __clear_bit_constant(5, &PBDRL);
95 PBIOR |= 0x20; 99 __set_bit_constant(5, &PBIORL);
96#else 100#else
97 PADR &= ~0x800; 101 __clear_bit_constant(11-8, &PADRH);
98 PAIOR |= 0x800; 102 __set_bit_constant(11-8, &PAIORH);
99#endif 103#endif
100 while(1); 104 while(1);
101} 105}
diff --git a/firmware/mpeg.c b/firmware/mpeg.c
index ef6972f3e4..a8f2dd3238 100644
--- a/firmware/mpeg.c
+++ b/firmware/mpeg.c
@@ -740,7 +740,7 @@ void drain_dma_buffer(void)
740 { 740 {
741 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) 741 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
742 { 742 {
743 PADR |= 0x800; 743 __set_bit_constant(11-8, &PADRH);
744 744
745 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); 745 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
746 746
@@ -748,7 +748,7 @@ void drain_dma_buffer(void)
748 the data is read */ 748 the data is read */
749 asm(" nop\n nop\n nop\n"); 749 asm(" nop\n nop\n nop\n");
750 asm(" nop\n nop\n nop\n"); 750 asm(" nop\n nop\n nop\n");
751 PADR &= ~0x800; 751 __clear_bit_constant(11-8, &PADRH);
752 752
753 while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); 753 while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
754 } 754 }
@@ -757,7 +757,7 @@ void drain_dma_buffer(void)
757 { 757 {
758 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) 758 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40))
759 { 759 {
760 PADR &= ~0x800; 760 __clear_bit_constant(11-8, &PADRH);
761 761
762 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); 762 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
763 763
@@ -766,7 +766,7 @@ void drain_dma_buffer(void)
766 asm(" nop\n nop\n nop\n"); 766 asm(" nop\n nop\n nop\n");
767 asm(" nop\n nop\n nop\n"); 767 asm(" nop\n nop\n nop\n");
768 768
769 PADR |= 0x800; 769 __set_bit_constant(11-8, &PADRH);
770 770
771 while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); 771 while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80));
772 } 772 }
@@ -814,7 +814,7 @@ static void dma_tick(void)
814 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) 814 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
815 && i < 30) 815 && i < 30)
816 { 816 {
817 PADR |= 0x800; 817 __set_bit_constant(11-8, &PADRH);
818 818
819 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); 819 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
820 820
@@ -828,7 +828,7 @@ static void dma_tick(void)
828 828
829 i++; 829 i++;
830 830
831 PADR &= ~0x800; 831 __clear_bit_constant(11-8, &PADRH);
832 832
833 /* No wait for /RTW, cause it's not necessary */ 833 /* No wait for /RTW, cause it's not necessary */
834 } 834 }
@@ -839,7 +839,7 @@ static void dma_tick(void)
839 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) 839 while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)
840 && i < 30) 840 && i < 30)
841 { 841 {
842 PADR &= ~0x800; 842 __clear_bit_constant(11-8, &PADRH);
843 843
844 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); 844 while(*((volatile unsigned char *)PBDR_ADDR) & 0x80);
845 845
@@ -853,7 +853,7 @@ static void dma_tick(void)
853 853
854 i++; 854 i++;
855 855
856 PADR |= 0x800; 856 __set_bit_constant(11-8, &PADRH);
857 857
858 /* No wait for /RTW, cause it's not necessary */ 858 /* No wait for /RTW, cause it's not necessary */
859 } 859 }
@@ -2169,7 +2169,7 @@ static void setup_sci0(void)
2169 PBCR1 = (PBCR1 & 0x0cff) | 0x1208; 2169 PBCR1 = (PBCR1 & 0x0cff) | 0x1208;
2170 2170
2171 /* Set PB12 to output */ 2171 /* Set PB12 to output */
2172 PBIOR |= 0x1000; 2172 __set_bit_constant(12-8, &PBIORH);
2173 2173
2174 /* Disable serial port */ 2174 /* Disable serial port */
2175 SCR0 = 0x00; 2175 SCR0 = 0x00;
@@ -2190,8 +2190,8 @@ static void setup_sci0(void)
2190 IPRD &= 0x0ff0; 2190 IPRD &= 0x0ff0;
2191 2191
2192 /* set PB15 and PB14 to inputs */ 2192 /* set PB15 and PB14 to inputs */
2193 PBIOR &= 0x7fff; 2193 __clear_bit_constant(15-8, &PBIORH);
2194 PBIOR &= 0xbfff; 2194 __clear_bit_constant(14-8, &PBIORH);
2195 2195
2196 /* Enable End of DMA interrupt at prio 8 */ 2196 /* Enable End of DMA interrupt at prio 8 */
2197 IPRC = (IPRC & 0xf0ff) | 0x0800; 2197 IPRC = (IPRC & 0xf0ff) | 0x0800;
@@ -3144,7 +3144,7 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
3144 setup_sci0(); 3144 setup_sci0();
3145 3145
3146#ifdef HAVE_MAS3587F 3146#ifdef HAVE_MAS3587F
3147 PAIOR |= 0x0800; /* output for /PR */ 3147 __set_bit_constant(11-8, &PAIORH); /* output for /PR */
3148 init_playback(); 3148 init_playback();
3149 3149
3150 mas_version_code = mas_readver(); 3150 mas_version_code = mas_readver();
@@ -3157,9 +3157,9 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness,
3157#endif 3157#endif
3158 3158
3159#ifdef HAVE_MAS3507D 3159#ifdef HAVE_MAS3507D
3160 PBDR &= ~0x20; 3160 __clear_bit_constant(5, &PBDRL);
3161 sleep(HZ/5); 3161 sleep(HZ/5);
3162 PBDR |= 0x20; 3162 __set_bit_constant(5, &PBDRL);
3163 sleep(HZ/5); 3163 sleep(HZ/5);
3164 3164
3165 /* set IRQ6 to edge detect */ 3165 /* set IRQ6 to edge detect */