diff options
Diffstat (limited to 'firmware/mpeg.c')
-rw-r--r-- | firmware/mpeg.c | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/firmware/mpeg.c b/firmware/mpeg.c index ef6972f3e4..a8f2dd3238 100644 --- a/firmware/mpeg.c +++ b/firmware/mpeg.c | |||
@@ -740,7 +740,7 @@ void drain_dma_buffer(void) | |||
740 | { | 740 | { |
741 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) | 741 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) |
742 | { | 742 | { |
743 | PADR |= 0x800; | 743 | __set_bit_constant(11-8, &PADRH); |
744 | 744 | ||
745 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); | 745 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); |
746 | 746 | ||
@@ -748,7 +748,7 @@ void drain_dma_buffer(void) | |||
748 | the data is read */ | 748 | the data is read */ |
749 | asm(" nop\n nop\n nop\n"); | 749 | asm(" nop\n nop\n nop\n"); |
750 | asm(" nop\n nop\n nop\n"); | 750 | asm(" nop\n nop\n nop\n"); |
751 | PADR &= ~0x800; | 751 | __clear_bit_constant(11-8, &PADRH); |
752 | 752 | ||
753 | while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); | 753 | while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); |
754 | } | 754 | } |
@@ -757,7 +757,7 @@ void drain_dma_buffer(void) | |||
757 | { | 757 | { |
758 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) | 758 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40)) |
759 | { | 759 | { |
760 | PADR &= ~0x800; | 760 | __clear_bit_constant(11-8, &PADRH); |
761 | 761 | ||
762 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); | 762 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); |
763 | 763 | ||
@@ -766,7 +766,7 @@ void drain_dma_buffer(void) | |||
766 | asm(" nop\n nop\n nop\n"); | 766 | asm(" nop\n nop\n nop\n"); |
767 | asm(" nop\n nop\n nop\n"); | 767 | asm(" nop\n nop\n nop\n"); |
768 | 768 | ||
769 | PADR |= 0x800; | 769 | __set_bit_constant(11-8, &PADRH); |
770 | 770 | ||
771 | while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); | 771 | while(!(*((volatile unsigned char *)PBDR_ADDR) & 0x80)); |
772 | } | 772 | } |
@@ -814,7 +814,7 @@ static void dma_tick(void) | |||
814 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) | 814 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) |
815 | && i < 30) | 815 | && i < 30) |
816 | { | 816 | { |
817 | PADR |= 0x800; | 817 | __set_bit_constant(11-8, &PADRH); |
818 | 818 | ||
819 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); | 819 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); |
820 | 820 | ||
@@ -828,7 +828,7 @@ static void dma_tick(void) | |||
828 | 828 | ||
829 | i++; | 829 | i++; |
830 | 830 | ||
831 | PADR &= ~0x800; | 831 | __clear_bit_constant(11-8, &PADRH); |
832 | 832 | ||
833 | /* No wait for /RTW, cause it's not necessary */ | 833 | /* No wait for /RTW, cause it's not necessary */ |
834 | } | 834 | } |
@@ -839,7 +839,7 @@ static void dma_tick(void) | |||
839 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) | 839 | while((*((volatile unsigned char *)PBDR_ADDR) & 0x40) |
840 | && i < 30) | 840 | && i < 30) |
841 | { | 841 | { |
842 | PADR &= ~0x800; | 842 | __clear_bit_constant(11-8, &PADRH); |
843 | 843 | ||
844 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); | 844 | while(*((volatile unsigned char *)PBDR_ADDR) & 0x80); |
845 | 845 | ||
@@ -853,7 +853,7 @@ static void dma_tick(void) | |||
853 | 853 | ||
854 | i++; | 854 | i++; |
855 | 855 | ||
856 | PADR |= 0x800; | 856 | __set_bit_constant(11-8, &PADRH); |
857 | 857 | ||
858 | /* No wait for /RTW, cause it's not necessary */ | 858 | /* No wait for /RTW, cause it's not necessary */ |
859 | } | 859 | } |
@@ -2169,7 +2169,7 @@ static void setup_sci0(void) | |||
2169 | PBCR1 = (PBCR1 & 0x0cff) | 0x1208; | 2169 | PBCR1 = (PBCR1 & 0x0cff) | 0x1208; |
2170 | 2170 | ||
2171 | /* Set PB12 to output */ | 2171 | /* Set PB12 to output */ |
2172 | PBIOR |= 0x1000; | 2172 | __set_bit_constant(12-8, &PBIORH); |
2173 | 2173 | ||
2174 | /* Disable serial port */ | 2174 | /* Disable serial port */ |
2175 | SCR0 = 0x00; | 2175 | SCR0 = 0x00; |
@@ -2190,8 +2190,8 @@ static void setup_sci0(void) | |||
2190 | IPRD &= 0x0ff0; | 2190 | IPRD &= 0x0ff0; |
2191 | 2191 | ||
2192 | /* set PB15 and PB14 to inputs */ | 2192 | /* set PB15 and PB14 to inputs */ |
2193 | PBIOR &= 0x7fff; | 2193 | __clear_bit_constant(15-8, &PBIORH); |
2194 | PBIOR &= 0xbfff; | 2194 | __clear_bit_constant(14-8, &PBIORH); |
2195 | 2195 | ||
2196 | /* Enable End of DMA interrupt at prio 8 */ | 2196 | /* Enable End of DMA interrupt at prio 8 */ |
2197 | IPRC = (IPRC & 0xf0ff) | 0x0800; | 2197 | IPRC = (IPRC & 0xf0ff) | 0x0800; |
@@ -3144,7 +3144,7 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness, | |||
3144 | setup_sci0(); | 3144 | setup_sci0(); |
3145 | 3145 | ||
3146 | #ifdef HAVE_MAS3587F | 3146 | #ifdef HAVE_MAS3587F |
3147 | PAIOR |= 0x0800; /* output for /PR */ | 3147 | __set_bit_constant(11-8, &PAIORH); /* output for /PR */ |
3148 | init_playback(); | 3148 | init_playback(); |
3149 | 3149 | ||
3150 | mas_version_code = mas_readver(); | 3150 | mas_version_code = mas_readver(); |
@@ -3157,9 +3157,9 @@ void mpeg_init(int volume, int bass, int treble, int balance, int loudness, | |||
3157 | #endif | 3157 | #endif |
3158 | 3158 | ||
3159 | #ifdef HAVE_MAS3507D | 3159 | #ifdef HAVE_MAS3507D |
3160 | PBDR &= ~0x20; | 3160 | __clear_bit_constant(5, &PBDRL); |
3161 | sleep(HZ/5); | 3161 | sleep(HZ/5); |
3162 | PBDR |= 0x20; | 3162 | __set_bit_constant(5, &PBDRL); |
3163 | sleep(HZ/5); | 3163 | sleep(HZ/5); |
3164 | 3164 | ||
3165 | /* set IRQ6 to edge detect */ | 3165 | /* set IRQ6 to edge detect */ |