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author | Frank Gevaerts <frank@gevaerts.be> | 2008-09-16 17:38:33 +0000 |
---|---|---|
committer | Frank Gevaerts <frank@gevaerts.be> | 2008-09-16 17:38:33 +0000 |
commit | 66045bca7d1f02e882ed9e0bfce82ef6825cd515 (patch) | |
tree | 68ff87429dbd363d7db29cb130500948c6ab159a | |
parent | c0e898ae2983d36f6f58f26b25f543c69d281457 (diff) | |
download | rockbox-66045bca7d1f02e882ed9e0bfce82ef6825cd515.tar.gz rockbox-66045bca7d1f02e882ed9e0bfce82ef6825cd515.zip |
add s6d0154 register definitions, and flesh out lcd_init_device()
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@18532 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r-- | firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c | 79 | ||||
-rw-r--r-- | firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h | 80 |
2 files changed, 158 insertions, 1 deletions
diff --git a/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c b/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c index 567023d35e..dac0dc6164 100644 --- a/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c +++ b/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include "lcd.h" | 25 | #include "lcd.h" |
26 | #include "system.h" | 26 | #include "system.h" |
27 | #include "cpu.h" | 27 | #include "cpu.h" |
28 | #include "s6d0154.h" | ||
28 | 29 | ||
29 | /*** definitions ***/ | 30 | /*** definitions ***/ |
30 | 31 | ||
@@ -42,6 +43,8 @@ | |||
42 | #define SETSS() (PDAT7 |= (1 << 1)) | 43 | #define SETSS() (PDAT7 |= (1 << 1)) |
43 | #define CLRSS() (PDAT7 &= ~(1 << 1)) | 44 | #define CLRSS() (PDAT7 &= ~(1 << 1)) |
44 | 45 | ||
46 | static unsigned short controller_type = 0; | ||
47 | |||
45 | void init_lcd_spi(void) | 48 | void init_lcd_spi(void) |
46 | { | 49 | { |
47 | int oldval; | 50 | int oldval; |
@@ -117,7 +120,6 @@ unsigned int lcd_spi_io(unsigned int output,unsigned int bits,unsigned int inski | |||
117 | return (input); | 120 | return (input); |
118 | } | 121 | } |
119 | 122 | ||
120 | |||
121 | void spi_set_reg(unsigned char reg,unsigned short value) | 123 | void spi_set_reg(unsigned char reg,unsigned short value) |
122 | { | 124 | { |
123 | lcd_spi_io(0x700000|reg,24,0); // possibly 0x74 | 125 | lcd_spi_io(0x700000|reg,24,0); // possibly 0x74 |
@@ -172,6 +174,81 @@ void lcd_set_flip(bool yesno) | |||
172 | /* LCD init */ | 174 | /* LCD init */ |
173 | void lcd_init_device(void) | 175 | void lcd_init_device(void) |
174 | { | 176 | { |
177 | controller_type = lcd_read_id(); | ||
178 | switch(controller_type) | ||
179 | { | ||
180 | case 0x0154: | ||
181 | spi_set_reg(S6D0154_REG_EXTERNAL_INTERFACE_CONTROL, 0x130); | ||
182 | spi_set_reg(S6D0154_REG_MTP_TEST_KEY, 0x8d); | ||
183 | spi_set_reg(0x92, 0x10); | ||
184 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x1b); | ||
185 | spi_set_reg(S6D0154_REG_POWER_CONTROL_3, 0x3101); | ||
186 | spi_set_reg(S6D0154_REG_POWER_CONTROL_4, 0x105f); | ||
187 | spi_set_reg(S6D0154_REG_POWER_CONTROL_5, 0x667f); | ||
188 | spi_set_reg(S6D0154_REG_POWER_CONTROL_1, 0x800); | ||
189 | delay(20); | ||
190 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x11b); | ||
191 | delay(20); | ||
192 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x31b); | ||
193 | delay(20); | ||
194 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x71b); | ||
195 | delay(20); | ||
196 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf1b); | ||
197 | delay(20); | ||
198 | spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf3b); | ||
199 | delay(20); | ||
200 | spi_set_reg(S6D0154_REG_DRIVER_OUTPUT_CONTROL, 0x2128); | ||
201 | spi_set_reg(S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL, 0x100); | ||
202 | spi_set_reg(S6D0154_REG_ENTRY_MODE, 0x1030); | ||
203 | spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0); | ||
204 | spi_set_reg(S6D0154_REG_BLANK_PERIOD_CONTROL, 0x808); | ||
205 | spi_set_reg(S6D0154_REG_FRAME_CYCLE_CONTROL, 0x1100); | ||
206 | spi_set_reg(S6D0154_REG_START_OSCILLATION, 0xf01); | ||
207 | spi_set_reg(S6D0154_REG_VCI_RECYCLING, 0); | ||
208 | spi_set_reg(S6D0154_REG_GATE_SCAN_POSITION, 0); | ||
209 | spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1, 0x13f); | ||
210 | spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2, 0); | ||
211 | spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1, 0xef); | ||
212 | spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2, 0); | ||
213 | spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1, 0x13f); | ||
214 | spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2, 0); | ||
215 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_1, 0); | ||
216 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_2, 0xf00); | ||
217 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_3, 0xa03); | ||
218 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_4, 0x300); | ||
219 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_5, 0xc05); | ||
220 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_6, 0xf00); | ||
221 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_7, 0xf00); | ||
222 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_8, 3); | ||
223 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_9, 0x1f07); | ||
224 | spi_set_reg(S6D0154_REG_GAMMA_CONTROL_10, 0x71f); | ||
225 | break; | ||
226 | } | ||
227 | } | ||
228 | |||
229 | |||
230 | void lcd_off(void) | ||
231 | { | ||
232 | switch(controller_type) | ||
233 | { | ||
234 | case 0x0154: | ||
235 | spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12); | ||
236 | delay(20); | ||
237 | spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x00); | ||
238 | break; | ||
239 | } | ||
240 | } | ||
241 | |||
242 | void lcd_on(void) | ||
243 | { | ||
244 | switch(controller_type) | ||
245 | { | ||
246 | case 0x0154: | ||
247 | spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12); | ||
248 | delay(20); | ||
249 | spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x13); | ||
250 | break; | ||
251 | } | ||
175 | } | 252 | } |
176 | 253 | ||
177 | /*** Update functions ***/ | 254 | /*** Update functions ***/ |
diff --git a/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h b/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h new file mode 100644 index 0000000000..093c9d2a52 --- /dev/null +++ b/firmware/target/arm/s5l8700/meizu-m6sl/s6d0154.h | |||
@@ -0,0 +1,80 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id: adc-target.h 17847 2008-06-28 18:10:04Z bagder $ | ||
9 | * | ||
10 | * Copyright (C) 2008 by Frank Gevaerts | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #ifndef _S6D0154_H_ | ||
22 | #define _S6D0154_H_ | ||
23 | |||
24 | #define S6D0154_REG_VERSION 0x00 | ||
25 | #define S6D0154_REG_DRIVER_OUTPUT_CONTROL 0x01 | ||
26 | #define S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL 0x02 | ||
27 | #define S6D0154_REG_ENTRY_MODE 0x03 | ||
28 | #define S6D0154_REG_DISPLAY_CONTROL 0x07 | ||
29 | #define S6D0154_REG_BLANK_PERIOD_CONTROL 0x08 | ||
30 | #define S6D0154_REG_FRAME_CYCLE_CONTROL 0x0B | ||
31 | #define S6D0154_REG_EXTERNAL_INTERFACE_CONTROL 0x0C | ||
32 | #define S6D0154_REG_START_OSCILLATION 0x0F | ||
33 | #define S6D0154_REG_POWER_CONTROL_1 0x10 | ||
34 | #define S6D0154_REG_POWER_CONTROL_2 0x11 | ||
35 | #define S6D0154_REG_POWER_CONTROL_3 0x12 | ||
36 | #define S6D0154_REG_POWER_CONTROL_4 0x13 | ||
37 | #define S6D0154_REG_POWER_CONTROL_5 0x14 | ||
38 | #define S6D0154_REG_VCI_RECYCLING 0x15 | ||
39 | #define S6D0154_REG_RAM_ADDRESS_REGISTER_1 0x20 | ||
40 | #define S6D0154_REG_RAM_ADDRESS_REGISTER_2 0x21 | ||
41 | #define S6D0154_REG_GRAM_READ_WRITE 0x22 | ||
42 | #define S6D0154_REG_RESET 0x28 | ||
43 | #define S6D0154_REG_FLM_FUNCTION 0x29 | ||
44 | #define S6D0154_REG_GATE_SCAN_POSITION 0x30 | ||
45 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1A 0x31 | ||
46 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_1B 0x32 | ||
47 | #define S6D0154_REG_VERTICAL_SCROLL_CONTROL_2 0x33 | ||
48 | #define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1 0x34 | ||
49 | #define S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2 0x35 | ||
50 | #define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1 0x36 | ||
51 | #define S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2 0x37 | ||
52 | #define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1 0x38 | ||
53 | #define S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2 0x39 | ||
54 | #define S6D0154_REG_SUB_PANEL_CONTROL 0x40 | ||
55 | #define S6D0154_REG_MDDI_LINK_WAKEUP_START_POSITION 0x41 | ||
56 | #define S6D0154_REG_SUB_PANEL_SELECTION_INDEX 0x42 | ||
57 | #define S6D0154_REG_SUB_PANEL_DATA_WRITE_INDEX 0x43 | ||
58 | #define S6D0154_REG_GPIO_VALUE 0x44 | ||
59 | #define S6D0154_REG_GPIO_IO_CONTROL 0x45 | ||
60 | #define S6D0154_REG_GPIO_CLEAR 0x46 | ||
61 | #define S6D0154_REG_GPIO_INTERRUPT_ENABLE 0x47 | ||
62 | #define S6D0154_REG_GPIO_POLARITY_SELECTION 0x48 | ||
63 | |||
64 | #define S6D0154_REG_GAMMA_CONTROL_1 0x50 | ||
65 | #define S6D0154_REG_GAMMA_CONTROL_2 0x51 | ||
66 | #define S6D0154_REG_GAMMA_CONTROL_3 0x52 | ||
67 | #define S6D0154_REG_GAMMA_CONTROL_4 0x53 | ||
68 | #define S6D0154_REG_GAMMA_CONTROL_5 0x54 | ||
69 | #define S6D0154_REG_GAMMA_CONTROL_6 0x55 | ||
70 | #define S6D0154_REG_GAMMA_CONTROL_7 0x56 | ||
71 | #define S6D0154_REG_GAMMA_CONTROL_8 0x57 | ||
72 | #define S6D0154_REG_GAMMA_CONTROL_9 0x58 | ||
73 | #define S6D0154_REG_GAMMA_CONTROL_10 0x59 | ||
74 | |||
75 | #define S6D0154_REG_MTP_TEST_KEY 0x80 | ||
76 | #define S6D0154_REG_MTP_CONTROL_REGISTERS 0x81 | ||
77 | #define S6D0154_REG_MTP_DATA_READ_WRITE 0x82 | ||
78 | #define S6D0154_REG_PRODUCT_NAME_VERSION_WRITE 0x83 | ||
79 | |||
80 | #endif | ||