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Diffstat (limited to 'firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c')
-rw-r--r--firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c79
1 files changed, 78 insertions, 1 deletions
diff --git a/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c b/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c
index 567023d35e..dac0dc6164 100644
--- a/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c
+++ b/firmware/target/arm/s5l8700/meizu-m6sl/lcd-m6sl.c
@@ -25,6 +25,7 @@
25#include "lcd.h" 25#include "lcd.h"
26#include "system.h" 26#include "system.h"
27#include "cpu.h" 27#include "cpu.h"
28#include "s6d0154.h"
28 29
29/*** definitions ***/ 30/*** definitions ***/
30 31
@@ -42,6 +43,8 @@
42#define SETSS() (PDAT7 |= (1 << 1)) 43#define SETSS() (PDAT7 |= (1 << 1))
43#define CLRSS() (PDAT7 &= ~(1 << 1)) 44#define CLRSS() (PDAT7 &= ~(1 << 1))
44 45
46static unsigned short controller_type = 0;
47
45void init_lcd_spi(void) 48void init_lcd_spi(void)
46{ 49{
47 int oldval; 50 int oldval;
@@ -117,7 +120,6 @@ unsigned int lcd_spi_io(unsigned int output,unsigned int bits,unsigned int inski
117 return (input); 120 return (input);
118} 121}
119 122
120
121void spi_set_reg(unsigned char reg,unsigned short value) 123void spi_set_reg(unsigned char reg,unsigned short value)
122{ 124{
123 lcd_spi_io(0x700000|reg,24,0); // possibly 0x74 125 lcd_spi_io(0x700000|reg,24,0); // possibly 0x74
@@ -172,6 +174,81 @@ void lcd_set_flip(bool yesno)
172/* LCD init */ 174/* LCD init */
173void lcd_init_device(void) 175void lcd_init_device(void)
174{ 176{
177 controller_type = lcd_read_id();
178 switch(controller_type)
179 {
180 case 0x0154:
181 spi_set_reg(S6D0154_REG_EXTERNAL_INTERFACE_CONTROL, 0x130);
182 spi_set_reg(S6D0154_REG_MTP_TEST_KEY, 0x8d);
183 spi_set_reg(0x92, 0x10);
184 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x1b);
185 spi_set_reg(S6D0154_REG_POWER_CONTROL_3, 0x3101);
186 spi_set_reg(S6D0154_REG_POWER_CONTROL_4, 0x105f);
187 spi_set_reg(S6D0154_REG_POWER_CONTROL_5, 0x667f);
188 spi_set_reg(S6D0154_REG_POWER_CONTROL_1, 0x800);
189 delay(20);
190 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x11b);
191 delay(20);
192 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x31b);
193 delay(20);
194 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0x71b);
195 delay(20);
196 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf1b);
197 delay(20);
198 spi_set_reg(S6D0154_REG_POWER_CONTROL_2, 0xf3b);
199 delay(20);
200 spi_set_reg(S6D0154_REG_DRIVER_OUTPUT_CONTROL, 0x2128);
201 spi_set_reg(S6D0154_REG_LCD_DRIVING_WAVEFORM_CONTROL, 0x100);
202 spi_set_reg(S6D0154_REG_ENTRY_MODE, 0x1030);
203 spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0);
204 spi_set_reg(S6D0154_REG_BLANK_PERIOD_CONTROL, 0x808);
205 spi_set_reg(S6D0154_REG_FRAME_CYCLE_CONTROL, 0x1100);
206 spi_set_reg(S6D0154_REG_START_OSCILLATION, 0xf01);
207 spi_set_reg(S6D0154_REG_VCI_RECYCLING, 0);
208 spi_set_reg(S6D0154_REG_GATE_SCAN_POSITION, 0);
209 spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_1, 0x13f);
210 spi_set_reg(S6D0154_REG_PARTIAL_SCREEN_DRIVING_POSITION_2, 0);
211 spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_1, 0xef);
212 spi_set_reg(S6D0154_REG_HORIZONTAL_WINDOW_ADDRESS_2, 0);
213 spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_1, 0x13f);
214 spi_set_reg(S6D0154_REG_VERTICAL_WINDOW_ADDRESS_2, 0);
215 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_1, 0);
216 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_2, 0xf00);
217 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_3, 0xa03);
218 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_4, 0x300);
219 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_5, 0xc05);
220 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_6, 0xf00);
221 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_7, 0xf00);
222 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_8, 3);
223 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_9, 0x1f07);
224 spi_set_reg(S6D0154_REG_GAMMA_CONTROL_10, 0x71f);
225 break;
226 }
227}
228
229
230void lcd_off(void)
231{
232 switch(controller_type)
233 {
234 case 0x0154:
235 spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
236 delay(20);
237 spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x00);
238 break;
239 }
240}
241
242void lcd_on(void)
243{
244 switch(controller_type)
245 {
246 case 0x0154:
247 spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x12);
248 delay(20);
249 spi_set_reg(S6D0154_REG_DISPLAY_CONTROL, 0x13);
250 break;
251 }
175} 252}
176 253
177/*** Update functions ***/ 254/*** Update functions ***/