rk27xx - implement cache_commit_discard(). Cache is still not enabled in crt0.S

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@30167 a1c6a512-1295-4272-9138-f99709370657

3 files changed, 24 insertions, 1 deletions

diff --git a/firmware/export/rk27xx.h b/firmware/export/rk27xx.h
index a5cd396a33..7ada367627 100644
--- a/firmware/export/rk27xx.h
+++ b/firmware/export/rk27xx.h
@@ -7,6 +7,9 @@
 #define FLASH_BANK0 0x10000000
 #define FLASH_BANK1 0x11000000
 
+#define USB_NUM_ENDPOINTS 16
+#define USB_DEVBSS_ATTR
+
 /* Timers */
 #define APB0_TIMER             (ARM_BUS0_BASE + 0x00000000)
 #define TMR0LR                 (*(volatile unsigned long *)(APB0_TIMER + 0x00))
@@ -1006,7 +1009,7 @@
 #define DMACHEN_CH3          (0x101<<3)
 
 /* ARM7 cache controller */
-#define ARM_CACHE_CNTRL        0xEFFF0000
+#define ARM_CACHE_CTRL      0xEFFF0000
 #define DEVID               (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x00))
 #define CACHEOP             (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x04))
 #define CACHELKDN           (*(volatile unsigned long *)(ARM_CACHE_CTRL + 0x08))
diff --git a/firmware/target/arm/rk27xx/system-rk27xx.c b/firmware/target/arm/rk27xx/system-rk27xx.c
index 724273b61a..1459770b94 100644
--- a/firmware/target/arm/rk27xx/system-rk27xx.c
+++ b/firmware/target/arm/rk27xx/system-rk27xx.c
@@ -163,3 +163,19 @@ void udelay(unsigned usecs)
     );
 }
 
+void cpucache_commit_discard(void)
+{
+    /* invalidate cache way 0 */
+    CACHEOP = 0x02;
+
+    /* wait for invalidate process to complete */
+    while (CACHEOP & 0x01);
+
+    /* invalidate cache way 1 */
+    CACHEOP = 0x80000002;
+
+    /* wait for invalidate process to complete */
+    while (CACHEOP & 0x01);   
+}
+
+void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
diff --git a/firmware/target/arm/rk27xx/system-target.h b/firmware/target/arm/rk27xx/system-target.h
index fb904091b1..7fcf470ced 100644
--- a/firmware/target/arm/rk27xx/system-target.h
+++ b/firmware/target/arm/rk27xx/system-target.h
@@ -38,6 +38,10 @@ static inline void core_sleep(void)
     SCU_CPUPD = 0xdeedbabe;
 }
 
+#define HAVE_CPUCACHE_COMMIT_DISCARD
+/* deprecated alias */
+#define HAVE_CPUCACHE_INVALIDATE
+
 #define CPUFREQ_NORMAL 200000000
 #define CPUFREQ_MAX    200000000