summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMichael Sevakis <jethead71@rockbox.org>2007-10-17 00:01:03 +0000
committerMichael Sevakis <jethead71@rockbox.org>2007-10-17 00:01:03 +0000
commit4829f7835a9f1965263438f2ee9587dc19408397 (patch)
tree1a6945c53234c78790d95ad3ecd75393bde3b0b4
parentfc43b9df823af80dd1c9cf7dc1b5de6703944043 (diff)
downloadrockbox-4829f7835a9f1965263438f2ee9587dc19408397.tar.gz
rockbox-4829f7835a9f1965263438f2ee9587dc19408397.zip
Apply Akio Idehara's fix for FS#7972 - Fix ARM's swp (xchg) inline assembly for gcc 4.2. Also avoids UNPREDICTABLE behavior that GCC should have always warned about.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15157 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/export/thread.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/firmware/export/thread.h b/firmware/export/thread.h
index 89eb65184a..867c587794 100644
--- a/firmware/export/thread.h
+++ b/firmware/export/thread.h
@@ -372,7 +372,7 @@ struct core_entry
372({ uint32_t o; \ 372({ uint32_t o; \
373 asm volatile( \ 373 asm volatile( \
374 "swpb %0, %1, [%2]" \ 374 "swpb %0, %1, [%2]" \
375 : "=r"(o) \ 375 : "=&r"(o) \
376 : "r"(v), \ 376 : "r"(v), \
377 "r"((uint8_t*)(a))); \ 377 "r"((uint8_t*)(a))); \
378 o; }) 378 o; })
@@ -381,7 +381,7 @@ struct core_entry
381({ uint32_t o; \ 381({ uint32_t o; \
382 asm volatile( \ 382 asm volatile( \
383 "swp %0, %1, [%2]" \ 383 "swp %0, %1, [%2]" \
384 : "=r"(o) \ 384 : "=&r"(o) \
385 : "r"((uint32_t)(v)), \ 385 : "r"((uint32_t)(v)), \
386 "r"((uint32_t*)(a))); \ 386 "r"((uint32_t*)(a))); \
387 o; }) 387 o; })
@@ -390,7 +390,7 @@ struct core_entry
390({ typeof (*(a)) o; \ 390({ typeof (*(a)) o; \
391 asm volatile( \ 391 asm volatile( \
392 "swp %0, %1, [%2]" \ 392 "swp %0, %1, [%2]" \
393 : "=r"(o) \ 393 : "=&r"(o) \
394 : "r"(v), "r"(a)); \ 394 : "r"(v), "r"(a)); \
395 o; }) 395 o; })
396#endif /* locking selection */ 396#endif /* locking selection */