From 4829f7835a9f1965263438f2ee9587dc19408397 Mon Sep 17 00:00:00 2001 From: Michael Sevakis Date: Wed, 17 Oct 2007 00:01:03 +0000 Subject: Apply Akio Idehara's fix for FS#7972 - Fix ARM's swp (xchg) inline assembly for gcc 4.2. Also avoids UNPREDICTABLE behavior that GCC should have always warned about. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@15157 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/thread.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/firmware/export/thread.h b/firmware/export/thread.h index 89eb65184a..867c587794 100644 --- a/firmware/export/thread.h +++ b/firmware/export/thread.h @@ -372,7 +372,7 @@ struct core_entry ({ uint32_t o; \ asm volatile( \ "swpb %0, %1, [%2]" \ - : "=r"(o) \ + : "=&r"(o) \ : "r"(v), \ "r"((uint8_t*)(a))); \ o; }) @@ -381,7 +381,7 @@ struct core_entry ({ uint32_t o; \ asm volatile( \ "swp %0, %1, [%2]" \ - : "=r"(o) \ + : "=&r"(o) \ : "r"((uint32_t)(v)), \ "r"((uint32_t*)(a))); \ o; }) @@ -390,7 +390,7 @@ struct core_entry ({ typeof (*(a)) o; \ asm volatile( \ "swp %0, %1, [%2]" \ - : "=r"(o) \ + : "=&r"(o) \ : "r"(v), "r"(a)); \ o; }) #endif /* locking selection */ -- cgit v1.2.3