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authorJens Arnold <amiconn@rockbox.org>2007-07-26 21:51:44 +0000
committerJens Arnold <amiconn@rockbox.org>2007-07-26 21:51:44 +0000
commit3deb27053a7772e06ac40bbabe230fabcef882f0 (patch)
tree3a6b26235cab95fc21eb997f762113df9ae22c49
parent31848ac8bd4f6696238bafc4a07e2ba84605c3af (diff)
downloadrockbox-3deb27053a7772e06ac40bbabe230fabcef882f0.tar.gz
rockbox-3deb27053a7772e06ac40bbabe230fabcef882f0.zip
Fix red bootloader builds. * Fix non-working PP5022 bootloaders. Also define correct IRAM size for PP5022/PP5024 bootloaders.
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14015 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--firmware/boot.lds4
-rw-r--r--firmware/export/config.h5
-rw-r--r--firmware/target/coldfire/iaudio/system-iaudio.c4
-rw-r--r--firmware/target/coldfire/iriver/system-iriver.c4
4 files changed, 15 insertions, 2 deletions
diff --git a/firmware/boot.lds b/firmware/boot.lds
index b032f8e64a..0896e86fca 100644
--- a/firmware/boot.lds
+++ b/firmware/boot.lds
@@ -43,10 +43,10 @@ INPUT(target/sh/crt0.o)
43#define IRAMSIZE 0x18000 43#define IRAMSIZE 0x18000
44#define FLASHORIG 0x001f0000 44#define FLASHORIG 0x001f0000
45#define FLASHSIZE 2M 45#define FLASHSIZE 2M
46#elif CONFIG_CPU == PP5024 46#elif (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
47#define DRAMORIG 0x10000000 47#define DRAMORIG 0x10000000
48#define IRAMORIG 0x40000000 48#define IRAMORIG 0x40000000
49#define IRAMSIZE 0x18000 49#define IRAMSIZE 0x20000
50#define FLASHORIG 0x001f0000 50#define FLASHORIG 0x001f0000
51#define FLASHSIZE 2M 51#define FLASHSIZE 2M
52#elif CONFIG_CPU == S3C2440 52#elif CONFIG_CPU == S3C2440
diff --git a/firmware/export/config.h b/firmware/export/config.h
index a47eee1b6a..7b14f1f2e0 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -252,6 +252,11 @@
252#define CONFIG_TUNER_MULTI 252#define CONFIG_TUNER_MULTI
253#endif 253#endif
254 254
255#if defined(BOOTLOADER) && defined(HAVE_ADJUSTABLE_CPU_FREQ)
256/* Bootloaders don't use CPU frequency adjustment */
257#undef HAVE_ADJUSTABLE_CPU_FREQ
258#endif
259
255/* Enable the directory cache and tagcache in RAM if we have 260/* Enable the directory cache and tagcache in RAM if we have
256 * plenty of RAM. Both features can be enabled independently. */ 261 * plenty of RAM. Both features can be enabled independently. */
257#if ((defined(MEMORYSIZE) && (MEMORYSIZE > 8)) || MEM > 8) && \ 262#if ((defined(MEMORYSIZE) && (MEMORYSIZE > 8)) || MEM > 8) && \
diff --git a/firmware/target/coldfire/iaudio/system-iaudio.c b/firmware/target/coldfire/iaudio/system-iaudio.c
index 565f75aa6d..d934577911 100644
--- a/firmware/target/coldfire/iaudio/system-iaudio.c
+++ b/firmware/target/coldfire/iaudio/system-iaudio.c
@@ -24,6 +24,8 @@
24#include "timer.h" 24#include "timer.h"
25#include "pcf50606.h" 25#include "pcf50606.h"
26 26
27#ifdef HAVE_ADJUSTABLE_CPU_FREQ
28
27/* Settings for all possible clock frequencies (with properly working timers) 29/* Settings for all possible clock frequencies (with properly working timers)
28 * 30 *
29 * xxx_REFRESH_TIMER below 31 * xxx_REFRESH_TIMER below
@@ -113,3 +115,5 @@ void set_cpu_frequency(long frequency)
113 break; 115 break;
114 } 116 }
115} 117}
118
119#endif /* HAVE_ADJUSTABLE_CPU_FREQ */
diff --git a/firmware/target/coldfire/iriver/system-iriver.c b/firmware/target/coldfire/iriver/system-iriver.c
index f2973ac525..184f76cdad 100644
--- a/firmware/target/coldfire/iriver/system-iriver.c
+++ b/firmware/target/coldfire/iriver/system-iriver.c
@@ -24,6 +24,8 @@
24#include "timer.h" 24#include "timer.h"
25#include "pcf50606.h" 25#include "pcf50606.h"
26 26
27#ifdef HAVE_ADJUSTABLE_CPU_FREQ
28
27/* Settings for all possible clock frequencies (with properly working timers) 29/* Settings for all possible clock frequencies (with properly working timers)
28 * NOTE: Some 5249 chips don't like having PLLDIV set to 0. We must avoid that! 30 * NOTE: Some 5249 chips don't like having PLLDIV set to 0. We must avoid that!
29 * 31 *
@@ -155,3 +157,5 @@ void set_cpu_frequency(long frequency)
155 break; 157 break;
156 } 158 }
157} 159}
160
161#endif /* HAVE_ADJUSTABLE_CPU_FREQ */