From 3deb27053a7772e06ac40bbabe230fabcef882f0 Mon Sep 17 00:00:00 2001 From: Jens Arnold Date: Thu, 26 Jul 2007 21:51:44 +0000 Subject: Fix red bootloader builds. * Fix non-working PP5022 bootloaders. Also define correct IRAM size for PP5022/PP5024 bootloaders. git-svn-id: svn://svn.rockbox.org/rockbox/trunk@14015 a1c6a512-1295-4272-9138-f99709370657 --- firmware/boot.lds | 4 ++-- firmware/export/config.h | 5 +++++ firmware/target/coldfire/iaudio/system-iaudio.c | 4 ++++ firmware/target/coldfire/iriver/system-iriver.c | 4 ++++ 4 files changed, 15 insertions(+), 2 deletions(-) diff --git a/firmware/boot.lds b/firmware/boot.lds index b032f8e64a..0896e86fca 100644 --- a/firmware/boot.lds +++ b/firmware/boot.lds @@ -43,10 +43,10 @@ INPUT(target/sh/crt0.o) #define IRAMSIZE 0x18000 #define FLASHORIG 0x001f0000 #define FLASHSIZE 2M -#elif CONFIG_CPU == PP5024 +#elif (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024) #define DRAMORIG 0x10000000 #define IRAMORIG 0x40000000 -#define IRAMSIZE 0x18000 +#define IRAMSIZE 0x20000 #define FLASHORIG 0x001f0000 #define FLASHSIZE 2M #elif CONFIG_CPU == S3C2440 diff --git a/firmware/export/config.h b/firmware/export/config.h index a47eee1b6a..7b14f1f2e0 100644 --- a/firmware/export/config.h +++ b/firmware/export/config.h @@ -252,6 +252,11 @@ #define CONFIG_TUNER_MULTI #endif +#if defined(BOOTLOADER) && defined(HAVE_ADJUSTABLE_CPU_FREQ) +/* Bootloaders don't use CPU frequency adjustment */ +#undef HAVE_ADJUSTABLE_CPU_FREQ +#endif + /* Enable the directory cache and tagcache in RAM if we have * plenty of RAM. Both features can be enabled independently. */ #if ((defined(MEMORYSIZE) && (MEMORYSIZE > 8)) || MEM > 8) && \ diff --git a/firmware/target/coldfire/iaudio/system-iaudio.c b/firmware/target/coldfire/iaudio/system-iaudio.c index 565f75aa6d..d934577911 100644 --- a/firmware/target/coldfire/iaudio/system-iaudio.c +++ b/firmware/target/coldfire/iaudio/system-iaudio.c @@ -24,6 +24,8 @@ #include "timer.h" #include "pcf50606.h" +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + /* Settings for all possible clock frequencies (with properly working timers) * * xxx_REFRESH_TIMER below @@ -113,3 +115,5 @@ void set_cpu_frequency(long frequency) break; } } + +#endif /* HAVE_ADJUSTABLE_CPU_FREQ */ diff --git a/firmware/target/coldfire/iriver/system-iriver.c b/firmware/target/coldfire/iriver/system-iriver.c index f2973ac525..184f76cdad 100644 --- a/firmware/target/coldfire/iriver/system-iriver.c +++ b/firmware/target/coldfire/iriver/system-iriver.c @@ -24,6 +24,8 @@ #include "timer.h" #include "pcf50606.h" +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + /* Settings for all possible clock frequencies (with properly working timers) * NOTE: Some 5249 chips don't like having PLLDIV set to 0. We must avoid that! * @@ -155,3 +157,5 @@ void set_cpu_frequency(long frequency) break; } } + +#endif /* HAVE_ADJUSTABLE_CPU_FREQ */ -- cgit v1.2.3