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authorJörg Hohensohn <hohensoh@rockbox.org>2004-11-19 23:04:40 +0000
committerJörg Hohensohn <hohensoh@rockbox.org>2004-11-19 23:04:40 +0000
commit0044a04c22b65b4ac9e9f6e941c2296ce2f7a2e8 (patch)
treecae9032df93f6d37ee868d4d9edfe04ab0690d46
parent50d363f32f7ff121bfbea8f0f024880605803f3f (diff)
downloadrockbox-0044a04c22b65b4ac9e9f6e941c2296ce2f7a2e8.tar.gz
rockbox-0044a04c22b65b4ac9e9f6e941c2296ce2f7a2e8.zip
the -t test option now does no memory test, but enables 38400 baud on players
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5441 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--flash/uart_boot/uart_boot.c120
1 files changed, 10 insertions, 110 deletions
diff --git a/flash/uart_boot/uart_boot.c b/flash/uart_boot/uart_boot.c
index 914937305c..f2047d8987 100644
--- a/flash/uart_boot/uart_boot.c
+++ b/flash/uart_boot/uart_boot.c
@@ -173,7 +173,13 @@ int main(int argc, char* argv[])
173 173
174 if (gCmd.bNoDownload) 174 if (gCmd.bNoDownload)
175 { // just set our speed 175 { // just set our speed
176 if (!UartConfig(serial_handle, gCmd.bRecorder ? 115200 : 38400, eNOPARITY, eONESTOPBIT, 8)) 176 int baudrate = gCmd.bRecorder ? 115200 : 14400;
177 if (!gCmd.bRecorder && gCmd.bTest)
178 { // experimental Player speedup to 38400 baud
179 baudrate = 38400;
180 }
181
182 if (!UartConfig(serial_handle, baudrate, eNOPARITY, eONESTOPBIT, 8))
177 { 183 {
178 printf("Error setting up COM params\n"); 184 printf("Error setting up COM params\n");
179 exit(1); 185 exit(1);
@@ -198,9 +204,9 @@ int main(int argc, char* argv[])
198 { // we can be faster 204 { // we can be faster
199 SetTargetBaudrate(serial_handle, 11059200, 115200); // set to 115200 205 SetTargetBaudrate(serial_handle, 11059200, 115200); // set to 115200
200 } 206 }
201 else 207 else if (gCmd.bTest) // experimental Player speedup to 38400 baud
202 { 208 {
203 SetTargetBaudrate(serial_handle, 12000000, 38400); // set to 38400 209 SetTargetBaudrate(serial_handle, 12000000, 38400); // set to 38400
204 } 210 }
205 } 211 }
206 } 212 }
@@ -345,112 +351,6 @@ int main(int argc, char* argv[])
345 } 351 }
346 352
347 353
348 if (gCmd.bTest) // DRAM test
349 {
350 static UINT8 abRam[2*1024*1024]; // DRAM copy, not on stack
351 int i;
352 int fails;
353
354 // init the DRAM controller like the flash boot does
355 reg = ReadHalfword(serial_handle, 0x05FFFFCA); // PACR2
356 reg &= 0xFFFB; // PA1 config: /RAS
357 reg |= 0x0008;
358 WriteHalfword(serial_handle, 0x05FFFFCA, reg); // PACR2
359 reg = 0xAFFF; // CS1, CS3 config: /CASH. /CASL
360 WriteHalfword(serial_handle, 0x05FFFFEE, reg); // CASCR
361 reg = ReadHalfword(serial_handle, 0x05FFFFA0); // BCR
362 reg |= 0x8000; // DRAM enable, default bus
363 WriteHalfword(serial_handle, 0x05FFFFA0, reg); // BCR
364 reg = ReadHalfword(serial_handle, 0x05FFFFA2); // WCR1
365 reg &= 0xFDFD; // 1-cycle CAS
366 WriteHalfword(serial_handle, 0x05FFFFA2, reg); // WCR1
367 reg = 0x0E00; // CAS 35%, multiplexed, 10 bit row addr.
368 WriteHalfword(serial_handle, 0x05FFFFA8, reg); // DCR
369 reg = 0x5AB0; // refresh, 4 cycle waitstate
370 WriteHalfword(serial_handle, 0x05FFFFAC, reg); // RCR
371 reg = 0x9605; // refresh constant
372 WriteHalfword(serial_handle, 0x05FFFFB2, reg); // RTCOR
373 reg = 0xA518; // phi/32
374 WriteHalfword(serial_handle, 0x05FFFFAE, reg); // RTCSR
375
376 fails = 0;
377 memset(abRam, 0xFF, sizeof(abRam));
378 printf("writing 0xFF pattern\n");
379 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
380 printf("testing marching 0x00\n");
381 for (i=0; i<sizeof(abRam); i++)
382 {
383 UINT8 byte;
384 WriteByte(serial_handle, 0x09000000 + i, 0x00);
385 byte = ReadByte(serial_handle, 0x09000000 + i);
386 WriteByte(serial_handle, 0x09000000 + i, 0xFF);
387
388 if (byte != 0x00)
389 {
390 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, byte, 0x00);
391 fails++;
392 }
393
394 }
395 printf("%d failures\n", fails);
396
397 fails = 0;
398 memset(abRam, 0x00, sizeof(abRam));
399 printf("writing 0x00 pattern\n");
400 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
401 printf("testing marching 0xFF\n");
402 for (i=0; i<sizeof(abRam); i++)
403 {
404 UINT8 byte;
405 WriteByte(serial_handle, 0x09000000 + i, 0xFF);
406 byte = ReadByte(serial_handle, 0x09000000 + i);
407 WriteByte(serial_handle, 0x09000000 + i, 0x00);
408
409 if (byte != 0xFF)
410 {
411 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, byte, 0xFF);
412 fails++;
413 }
414
415 }
416 printf("%d failures\n", fails);
417
418 fails = 0;
419 memset(abRam, 0xAA, sizeof(abRam));
420 printf("writing 0xAA pattern\n");
421 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
422 printf("reading back\n");
423 ReadByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
424 for (i=0; i<sizeof(abRam); i++)
425 {
426 if (abRam[i] != 0xAA)
427 {
428 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, abRam[i], 0xAA);
429 fails++;
430 }
431
432 }
433 printf("%d failures\n", fails);
434
435 fails = 0;
436 memset(abRam, 0x55, sizeof(abRam));
437 printf("writing 0x55 pattern\n");
438 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
439 printf("reading back\n");
440 ReadByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
441 for (i=0; i<sizeof(abRam); i++)
442 {
443 if (abRam[i] != 0x55)
444 {
445 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, abRam[i], 0x55);
446 fails++;
447 }
448
449 }
450 printf("%d failures\n", fails);
451 }
452
453
454 if (gCmd.bBlink) 354 if (gCmd.bBlink)
455 { 355 {
456 // blinking LED 356 // blinking LED