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authorJörg Hohensohn <hohensoh@rockbox.org>2004-11-19 22:46:19 +0000
committerJörg Hohensohn <hohensoh@rockbox.org>2004-11-19 22:46:19 +0000
commit50d363f32f7ff121bfbea8f0f024880605803f3f (patch)
tree967fd337658af66bbe2948ea8316045ad9994553
parentc519e6365e50645510d3394b2bcc67a501748b8c (diff)
downloadrockbox-50d363f32f7ff121bfbea8f0f024880605803f3f.tar.gz
rockbox-50d363f32f7ff121bfbea8f0f024880605803f3f.zip
HD spindown for Players
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@5440 a1c6a512-1295-4272-9138-f99709370657
-rw-r--r--flash/uart_boot/uart_boot.c164
1 files changed, 133 insertions, 31 deletions
diff --git a/flash/uart_boot/uart_boot.c b/flash/uart_boot/uart_boot.c
index acfbb8e9c5..914937305c 100644
--- a/flash/uart_boot/uart_boot.c
+++ b/flash/uart_boot/uart_boot.c
@@ -27,6 +27,7 @@ struct
27} gCmd; 27} gCmd;
28 28
29 29
30
30int ProcessCmdLine(int argc, char* argv[]) 31int ProcessCmdLine(int argc, char* argv[])
31{ 32{
32 argc--; // exclude our name 33 argc--; // exclude our name
@@ -152,7 +153,7 @@ int main(int argc, char* argv[])
152 UINT16 reg; 153 UINT16 reg;
153 FILE* pFile; 154 FILE* pFile;
154 size_t size; 155 size_t size;
155 UINT8 abFirmware[512*1024]; // blocksize 156 static UINT8 abFirmware[256*1024]; // blocksize
156 memset(abFirmware, 0xFF, sizeof(abFirmware)); 157 memset(abFirmware, 0xFF, sizeof(abFirmware));
157 158
158 ProcessCmdLine(argc, argv); // what to do 159 ProcessCmdLine(argc, argv); // what to do
@@ -172,7 +173,7 @@ int main(int argc, char* argv[])
172 173
173 if (gCmd.bNoDownload) 174 if (gCmd.bNoDownload)
174 { // just set our speed 175 { // just set our speed
175 if (!UartConfig(serial_handle, gCmd.bRecorder ? 115200 : 14400, eNOPARITY, eONESTOPBIT, 8)) 176 if (!UartConfig(serial_handle, gCmd.bRecorder ? 115200 : 38400, eNOPARITY, eONESTOPBIT, 8))
176 { 177 {
177 printf("Error setting up COM params\n"); 178 printf("Error setting up COM params\n");
178 exit(1); 179 exit(1);
@@ -183,7 +184,7 @@ int main(int argc, char* argv[])
183 if (gCmd.bArchos) 184 if (gCmd.bArchos)
184 { 185 {
185 printf("Waiting for box startup to download monitor..."); 186 printf("Waiting for box startup to download monitor...");
186 DownloadArchosMonitor(serial_handle, "minimon_v2.bin"); // load the monitor image 187 DownloadArchosMonitor(serial_handle, "minimon_archos.bin"); // load the monitor image
187 printf("\b\b\b done.\n"); 188 printf("\b\b\b done.\n");
188 } 189 }
189 else 190 else
@@ -197,6 +198,10 @@ int main(int argc, char* argv[])
197 { // we can be faster 198 { // we can be faster
198 SetTargetBaudrate(serial_handle, 11059200, 115200); // set to 115200 199 SetTargetBaudrate(serial_handle, 11059200, 115200); // set to 115200
199 } 200 }
201 else
202 {
203 SetTargetBaudrate(serial_handle, 12000000, 38400); // set to 38400
204 }
200 } 205 }
201 } 206 }
202 207
@@ -219,17 +224,30 @@ int main(int argc, char* argv[])
219 if (gCmd.bSpindown) 224 if (gCmd.bSpindown)
220 { 225 {
221 // power down the disk 226 // power down the disk
222 reg = ReadHalfword(serial_handle, 0x05FFFFCA); // PACR2 227 if (gCmd.bRecorder)
223 reg &= ~0x0400; // clear bit 10: GPIO 228 { // Recorder (V1+V2) and FM have disk power control on PA5
224 WriteHalfword(serial_handle, 0x05FFFFCA, reg); 229 reg = ReadHalfword(serial_handle, 0x05FFFFCA); // PACR2
225 230 reg &= ~0x0400; // clear bit 10: GPIO
226 reg = ReadHalfword(serial_handle, 0x05FFFFC4); // PAIOR 231 WriteHalfword(serial_handle, 0x05FFFFCA, reg);
227 reg |= 0x0020; // set bit 5: output 232
228 WriteHalfword(serial_handle, 0x05FFFFC4, reg); 233 reg = ReadHalfword(serial_handle, 0x05FFFFC4); // PAIOR
229 234 reg |= 0x0020; // set bit 5: output
230 reg = ReadHalfword(serial_handle, 0x05FFFFC0); // PADR 235 WriteHalfword(serial_handle, 0x05FFFFC4, reg);
231 reg &= ~0x0020; // clear PA5 to power down 236
232 WriteHalfword(serial_handle, 0x05FFFFC0, reg); 237 reg = ReadHalfword(serial_handle, 0x05FFFFC0); // PADR
238 reg &= ~0x0020; // clear PA5 to power down
239 WriteHalfword(serial_handle, 0x05FFFFC0, reg);
240 }
241 else
242 { // new Players have disk power control on PB4
243 reg = ReadHalfword(serial_handle, 0x05FFFFC4); // PBIOR
244 reg |= 0x0010; // set bit 4: output
245 WriteHalfword(serial_handle, 0x05FFFFC6, reg);
246
247 reg = ReadHalfword(serial_handle, 0x05FFFFC0); // PBDR
248 reg &= ~0x0010; // clear PB4 to power down
249 WriteHalfword(serial_handle, 0x05FFFFC2, reg);
250 }
233 printf("Harddisk powered down.\n"); 251 printf("Harddisk powered down.\n");
234 } 252 }
235 253
@@ -327,26 +345,110 @@ int main(int argc, char* argv[])
327 } 345 }
328 346
329 347
330 if (gCmd.bTest) 348 if (gCmd.bTest) // DRAM test
331 { 349 {
332 // test code: toggle PA5 to test FM IDE power 350 static UINT8 abRam[2*1024*1024]; // DRAM copy, not on stack
351 int i;
352 int fails;
353
354 // init the DRAM controller like the flash boot does
333 reg = ReadHalfword(serial_handle, 0x05FFFFCA); // PACR2 355 reg = ReadHalfword(serial_handle, 0x05FFFFCA); // PACR2
334 reg &= ~0x0400; // clear bit 10: GPIO 356 reg &= 0xFFFB; // PA1 config: /RAS
335 WriteHalfword(serial_handle, 0x05FFFFCA, reg); 357 reg |= 0x0008;
336 358 WriteHalfword(serial_handle, 0x05FFFFCA, reg); // PACR2
337 reg = ReadHalfword(serial_handle, 0x05FFFFC4); // PAIOR 359 reg = 0xAFFF; // CS1, CS3 config: /CASH. /CASL
338 reg |= 0x0020; // set bit 5: output 360 WriteHalfword(serial_handle, 0x05FFFFEE, reg); // CASCR
339 WriteHalfword(serial_handle, 0x05FFFFC4, reg); 361 reg = ReadHalfword(serial_handle, 0x05FFFFA0); // BCR
362 reg |= 0x8000; // DRAM enable, default bus
363 WriteHalfword(serial_handle, 0x05FFFFA0, reg); // BCR
364 reg = ReadHalfword(serial_handle, 0x05FFFFA2); // WCR1
365 reg &= 0xFDFD; // 1-cycle CAS
366 WriteHalfword(serial_handle, 0x05FFFFA2, reg); // WCR1
367 reg = 0x0E00; // CAS 35%, multiplexed, 10 bit row addr.
368 WriteHalfword(serial_handle, 0x05FFFFA8, reg); // DCR
369 reg = 0x5AB0; // refresh, 4 cycle waitstate
370 WriteHalfword(serial_handle, 0x05FFFFAC, reg); // RCR
371 reg = 0x9605; // refresh constant
372 WriteHalfword(serial_handle, 0x05FFFFB2, reg); // RTCOR
373 reg = 0xA518; // phi/32
374 WriteHalfword(serial_handle, 0x05FFFFAE, reg); // RTCSR
340 375
341 printf("Toggling PA5 forever... (stop with Ctrl-C)\n"); 376 fails = 0;
342 reg = ReadHalfword(serial_handle, 0x05FFFFC0); // PADR 377 memset(abRam, 0xFF, sizeof(abRam));
343 while (1) 378 printf("writing 0xFF pattern\n");
344 { 379 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
345 reg ^= 0x0020; 380 printf("testing marching 0x00\n");
346 WriteHalfword(serial_handle, 0x05FFFFC0, reg); // PADR 381 for (i=0; i<sizeof(abRam); i++)
347 Sleep(1000); 382 {
348 } 383 UINT8 byte;
349 } 384 WriteByte(serial_handle, 0x09000000 + i, 0x00);
385 byte = ReadByte(serial_handle, 0x09000000 + i);
386 WriteByte(serial_handle, 0x09000000 + i, 0xFF);
387
388 if (byte != 0x00)
389 {
390 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, byte, 0x00);
391 fails++;
392 }
393
394 }
395 printf("%d failures\n", fails);
396
397 fails = 0;
398 memset(abRam, 0x00, sizeof(abRam));
399 printf("writing 0x00 pattern\n");
400 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
401 printf("testing marching 0xFF\n");
402 for (i=0; i<sizeof(abRam); i++)
403 {
404 UINT8 byte;
405 WriteByte(serial_handle, 0x09000000 + i, 0xFF);
406 byte = ReadByte(serial_handle, 0x09000000 + i);
407 WriteByte(serial_handle, 0x09000000 + i, 0x00);
408
409 if (byte != 0xFF)
410 {
411 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, byte, 0xFF);
412 fails++;
413 }
414
415 }
416 printf("%d failures\n", fails);
417
418 fails = 0;
419 memset(abRam, 0xAA, sizeof(abRam));
420 printf("writing 0xAA pattern\n");
421 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
422 printf("reading back\n");
423 ReadByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
424 for (i=0; i<sizeof(abRam); i++)
425 {
426 if (abRam[i] != 0xAA)
427 {
428 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, abRam[i], 0xAA);
429 fails++;
430 }
431
432 }
433 printf("%d failures\n", fails);
434
435 fails = 0;
436 memset(abRam, 0x55, sizeof(abRam));
437 printf("writing 0x55 pattern\n");
438 WriteByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
439 printf("reading back\n");
440 ReadByteMultiple(serial_handle, 0x09000000, sizeof(abRam), abRam);
441 for (i=0; i<sizeof(abRam); i++)
442 {
443 if (abRam[i] != 0x55)
444 {
445 printf("RAM at offset 0x%06X is 0x%02X instead of 0x%02X\n", i, abRam[i], 0x55);
446 fails++;
447 }
448
449 }
450 printf("%d failures\n", fails);
451 }
350 452
351 453
352 if (gCmd.bBlink) 454 if (gCmd.bBlink)