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1#define _PAGE_ Port pin assignments
2#include "head.t"
3
4<h1>CPU Port pin assignments</h1>
5
6<table border=1>
7<tr><th>Port pin</th>
8 <th colspan=2>Player</th>
9 <th colspan=2>Recorder</th>
10 <th colspan=2>FM/V2 Recorder</th>
11</tr>
12<tr><th><b>PA0</b></th>
13 <td><b>GP In</b></td><td>DC adapter detect (0=inserted)</td>
14 <td>/CS4</td><td>MAS Parallel Port (for recording)</td>
15 <td>/CS4</td><td>MAS Parallel Port (for recording)</td>
16</tr>
17<tr><th><b>PA1</b></th>
18 <td><b>/RAS Out</b></td><td>DRAM control</td>
19 <td><b>/RAS Out</b></td><td>DRAM control</td>
20 <td><b>/RAS Out</b></td><td>DRAM control</td>
21</tr>
22<tr><th><b>PA2</b></th>
23 <td><b>/CS6 Out</b></td><td>ATA registers</td>
24 <td><b>/CS6 Out</b></td><td>ATA registers</td>
25 <td><b>/CS6 Out</b></td><td>ATA registers</td>
26</tr>
27<tr><th><b>PA3</b></th>
28 <td><b>/WAIT In</b></td><td>Bus handshake</td>
29 <td><b>/WAIT In</b></td><td>Bus handshake</td>
30 <td><b>/WAIT In</b></td><td>Bus handshake</td>
31</tr>
32<tr><th><b>PA4</b></th>
33 <td><b>/WR Out</b></td><td>Bus write signal</td>
34 <td><b>/WR Out</b></td><td>Bus write signal</td>
35 <td><b>/WR Out</b></td><td>Bus write signal</td>
36</tr>
37<tr><th><b>PA5</b></th>
38 <td><b>GP In</b></td><td>ON key (0=pressed)</td>
39 <td><b>GP Out</b></td><td>ATA power control (1=on)</td>
40 <td><b>GP Out</b></td><td>ATA/LED power control (1=on)</td>
41</tr>
42<tr><th><b>PA6</b></th>
43 <td><b>/RD Out</b></td><td>Bus read signal</td>
44 <td><b>/RD Out</b></td><td>Bus read signal</td>
45 <td><b>/RD Out</b></td><td>Bus read signal</td>
46</tr>
47<tr><th><b>PA7</b></th>
48 <td><b>GP Out</b></td><td>ATA buffer control (0=active)</td>
49 <td><b>GP Out</b></td><td>ATA buffer control (0=active)</td>
50 <td><b>GP Out</b></td><td>ATA buffer control (0=active)</td>
51</tr>
52<tr><th><b>PA8</b></th>
53 <td><b>&nbsp;</b></td><td>&nbsp;</td>
54 <td><b>GP Out</b></td><td>MAS POR Reset (polarity varies)</td>
55 <td><b>GP Out</b></td><td>MAS POR Reset (polarity varies)</td>
56</tr>
57<tr><th><b>PA9</b></th>
58 <td><b>GP Out</b></td><td>ATA Reset (0=reset)</td>
59 <td><b>GP Out</b></td><td>ATA Reset (0=reset)</td>
60 <td><b>GP Out</b></td><td>ATA Reset (0=reset)</td>
61</tr>
62<tr><th><b>PA10</b></th>
63 <td><b>GP Out</b></td><td>USB Enable (0=enable)</td>
64 <td><b>GP Out</b></td><td>USB Enable (polarity varies)</td>
65 <td><b>GP Out</b></td><td>USB Enable (polarity varies)</td>
66</tr>
67<tr><th><b>PA11</b></th>
68 <td><b>GP In</b></td><td>STOP key (0=pressed)</td>
69 <td><b>GP Out</b></td><td>MAS PR DMA Request (polarity varies)</td>
70 <td><b>GP Out</b></td><td>MAS PR DMA Request (polarity varies)</td>
71</tr>
72<tr><th><b>PA12</b></th>
73 <td><b>/IRQ0</b></td><td>ATA INTRQ (not used)</td>
74 <td><b>/IRQ0</b></td><td>ATA INTRQ (not used)</td>
75 <td><b>/IRQ0</b></td><td>ATA INTRQ (not used)</td>
76</tr>
77<tr><th><b>PA13</b></th>
78 <td><b>&nbsp;</b></td><td>&nbsp;</td>
79 <td><b>/IRQ1</b></td><td>RTC IRQ</td>
80 <td><b>&nbsp;</b></td><td>&nbsp;</td>
81</tr>
82<tr><th><b>PA14</b></th>
83 <td><b>GP Out</b></td><td>Backlight (1=on)</td>
84 <td><b>GP In</b></td><td>Not used</td>
85 <td><b>&nbsp;</b></td><td>&nbsp;</td>
86</tr>
87<tr><th><b>PA15</b></th>
88 <td><b>GP In</b></td><td>USB cable detect (0=inserted)</td>
89 <td><b>/IRQ3</b></td><td>MAS Demand IRQ</td>
90 <td><b>/IRQ3</b></td><td>MAS Demand IRQ</td>
91</tr>
92</table>
93
94#include "foot.t"
generated by cgit v1.2.3 (git 2.39.1) at 2024-09-24 08:35:16 +0000