diff options
Diffstat (limited to 'utils')
-rw-r--r-- | utils/hwstub/tools/lua/atj.lua | 3 | ||||
-rw-r--r-- | utils/hwstub/tools/lua/atj/gpio.lua | 65 | ||||
-rw-r--r-- | utils/hwstub/tools/lua/atj/lcm.lua | 31 | ||||
-rw-r--r-- | utils/hwstub/tools/lua/irivere150.lua | 116 | ||||
-rw-r--r-- | utils/regtools/desc/regs-atj213x.xml | 62 |
5 files changed, 275 insertions, 2 deletions
diff --git a/utils/hwstub/tools/lua/atj.lua b/utils/hwstub/tools/lua/atj.lua index de725f4a5d..1f59a141fc 100644 --- a/utils/hwstub/tools/lua/atj.lua +++ b/utils/hwstub/tools/lua/atj.lua | |||
@@ -5,4 +5,5 @@ | |||
5 | ATJ = {} | 5 | ATJ = {} |
6 | 6 | ||
7 | hwstub.soc:select("atj213x") | 7 | hwstub.soc:select("atj213x") |
8 | 8 | require "atj/gpio" | |
9 | require "atj/lcm" | ||
diff --git a/utils/hwstub/tools/lua/atj/gpio.lua b/utils/hwstub/tools/lua/atj/gpio.lua new file mode 100644 index 0000000000..970d271187 --- /dev/null +++ b/utils/hwstub/tools/lua/atj/gpio.lua | |||
@@ -0,0 +1,65 @@ | |||
1 | ATJ.gpio = {} | ||
2 | |||
3 | function ATJ.gpio.muxsel(dev) | ||
4 | if type(dev) == "string" then | ||
5 | if dev == "LCM" then dev = 0 | ||
6 | elseif dev == "SD" then dev = 1 | ||
7 | elseif dev == "NAND" then dev = 2 | ||
8 | else error("Invalid mux string " .. dev) | ||
9 | end | ||
10 | end | ||
11 | |||
12 | local mfctl0 = HW.GPIO.MFCTL0.read() | ||
13 | if dev == 0 then | ||
14 | -- LCM (taken from WELCOME.BIN) | ||
15 | mfctl0 = bit32.band(mfctl0, 0xfe3f3f00) | ||
16 | mfctl0 = bit32.bor(mfctl0, 0x00808092) | ||
17 | elseif dev == 1 then | ||
18 | -- SD (taken from CARD.DRV) | ||
19 | mfctl0 = bit32.band(mfctl0, 0xff3ffffc) | ||
20 | mfctl0 = bit32.bor(mfctl0, 0x01300004) | ||
21 | elseif dev == 2 then | ||
22 | -- NAND (taken from BROM dump) | ||
23 | mfctl0 = bit32.band(mfctl0, 0xfe3ff300) | ||
24 | mfctl0 = bit32.bor(mfctl0, 0x00400449) | ||
25 | end | ||
26 | |||
27 | -- enable multifunction mux | ||
28 | HW.GPIO.MFCTL1.write(0x80000000) | ||
29 | |||
30 | -- write multifunction mux selection | ||
31 | HW.GPIO.MFCTL0.write(mfctl0) | ||
32 | end | ||
33 | |||
34 | function ATJ.gpio.outen(port, pin, en) | ||
35 | if type(port) == "string" then | ||
36 | if port == "PORTA" then | ||
37 | HW.GPIO.AOUTEN.write(bit32.replace(HW.GPIO.AOUTEN.read(), en, pin, 1)) | ||
38 | elseif port == "PORTB" then | ||
39 | HW.GPIO.BOUTEN.write(bit32.replace(HW.GPIO.BOUTEN.read(), en, pin, 1)) | ||
40 | else error("Invalid port string " .. port) | ||
41 | end | ||
42 | end | ||
43 | end | ||
44 | |||
45 | function ATJ.gpio.inen(port, pin) | ||
46 | if type(port) == "string" then | ||
47 | if port == "PORTA" then | ||
48 | HW.GPIO.AINEN.write(bit32.replace(HW.GPIO.AINEN.read(), en, pin, 1)) | ||
49 | elseif port == "PORTB" then | ||
50 | HW.GPIO.BINEN.write(bit32.replace(HW.GPIO.BINEN.read(), en, pin, 1)) | ||
51 | else error("Invalid port string " .. port) | ||
52 | end | ||
53 | end | ||
54 | end | ||
55 | |||
56 | function ATJ.gpio.set(port, pin, val) | ||
57 | if type(port) == "string" then | ||
58 | if port == "PORTA" then | ||
59 | HW.GPIO.ADAT.write(bit32.replace(HW.GPIO.ADAT.read(), val, pin, 1)) | ||
60 | elseif port == "PORTB" then | ||
61 | HW.GPIO.BDAT.write(bit32.replace(HW.GPIO.BDAT.read(), val, pin, 1)) | ||
62 | else error("Invalid port string " .. port) | ||
63 | end | ||
64 | end | ||
65 | end | ||
diff --git a/utils/hwstub/tools/lua/atj/lcm.lua b/utils/hwstub/tools/lua/atj/lcm.lua new file mode 100644 index 0000000000..feaa8b7158 --- /dev/null +++ b/utils/hwstub/tools/lua/atj/lcm.lua | |||
@@ -0,0 +1,31 @@ | |||
1 | ATJ.lcm = {} | ||
2 | |||
3 | function ATJ.lcm.wait_fifo_empty() | ||
4 | while (bit32.band(HW.YUV2RGB.CTL.read(), 0x04) == 0) do | ||
5 | end | ||
6 | end | ||
7 | |||
8 | function ATJ.lcm.rs_command() | ||
9 | ATJ.lcm.wait_fifo_empty() | ||
10 | HW.YUV2RGB.CTL.write(0x802ae) | ||
11 | end | ||
12 | |||
13 | function ATJ.lcm.rs_data() | ||
14 | ATJ.lcm.wait_fifo_empty() | ||
15 | HW.YUV2RGB.CTL.write(0x902ae) | ||
16 | end | ||
17 | |||
18 | function ATJ.lcm.fb_data() | ||
19 | ATJ.lcm.rs_command() | ||
20 | HW.YUV2RGB.FIFODATA.write(0x22) | ||
21 | HW.YUV2RGB.CTL.write(0xa02ae) | ||
22 | end | ||
23 | |||
24 | function ATJ.lcm.init() | ||
25 | HW.CMU.DEVCLKEN.write(bit32.bor(HW.CMU.DEVCLKEN.read(), 0x102)) | ||
26 | ATJ.gpio.muxsel("LCM") | ||
27 | hwstub.udelay(1) | ||
28 | ATJ.lcm.rs_command() | ||
29 | HW.YUV2RGB.CLKCTL.write(0x102) | ||
30 | end | ||
31 | |||
diff --git a/utils/hwstub/tools/lua/irivere150.lua b/utils/hwstub/tools/lua/irivere150.lua new file mode 100644 index 0000000000..e5a0d26686 --- /dev/null +++ b/utils/hwstub/tools/lua/irivere150.lua | |||
@@ -0,0 +1,116 @@ | |||
1 | E150 = {} | ||
2 | |||
3 | function E150.lcd_reg_write(reg, val) | ||
4 | ATJ.lcm.rs_command() | ||
5 | HW.YUV2RGB.FIFODATA.write(reg) | ||
6 | ATJ.lcm.rs_data() | ||
7 | HW.YUV2RGB.FIFODATA.write(val) | ||
8 | end | ||
9 | |||
10 | function E150.lcd_init() | ||
11 | ATJ.lcm.init() | ||
12 | |||
13 | ATJ.gpio.outen("PORTA", 16, 1) | ||
14 | ATJ.gpio.set("PORTA", 16 , 1) | ||
15 | hwstub.mdelay(10) | ||
16 | ATJ.gpio.set("PORTA", 16, 0) | ||
17 | hwstub.mdelay(10) | ||
18 | ATJ.gpio.set("PORTA", 16, 1) | ||
19 | hwstub.mdelay(10) | ||
20 | |||
21 | -- lcd controller init sequence matching HX8347-D | ||
22 | E150.lcd_reg_write(0xea, 0x00) | ||
23 | E150.lcd_reg_write(0xeb, 0x20) | ||
24 | E150.lcd_reg_write(0xec, 0x0f) | ||
25 | E150.lcd_reg_write(0xed, 0xc4) | ||
26 | E150.lcd_reg_write(0xe8, 0xc4) | ||
27 | E150.lcd_reg_write(0xe9, 0xc4) | ||
28 | E150.lcd_reg_write(0xf1, 0xc4) | ||
29 | E150.lcd_reg_write(0xf2, 0xc4) | ||
30 | E150.lcd_reg_write(0x27, 0xc4) | ||
31 | E150.lcd_reg_write(0x40, 0x00) -- gamma block start | ||
32 | E150.lcd_reg_write(0x41, 0x00) | ||
33 | E150.lcd_reg_write(0x42, 0x01) | ||
34 | E150.lcd_reg_write(0x43, 0x13) | ||
35 | E150.lcd_reg_write(0x44, 0x10) | ||
36 | E150.lcd_reg_write(0x45, 0x26) | ||
37 | E150.lcd_reg_write(0x46, 0x08) | ||
38 | E150.lcd_reg_write(0x47, 0x51) | ||
39 | E150.lcd_reg_write(0x48, 0x02) | ||
40 | E150.lcd_reg_write(0x49, 0x12) | ||
41 | E150.lcd_reg_write(0x4a, 0x18) | ||
42 | E150.lcd_reg_write(0x4b, 0x19) | ||
43 | E150.lcd_reg_write(0x4c, 0x14) | ||
44 | E150.lcd_reg_write(0x50, 0x19) | ||
45 | E150.lcd_reg_write(0x51, 0x2f) | ||
46 | E150.lcd_reg_write(0x52, 0x2c) | ||
47 | E150.lcd_reg_write(0x53, 0x3e) | ||
48 | E150.lcd_reg_write(0x54, 0x3f) | ||
49 | E150.lcd_reg_write(0x55, 0x3f) | ||
50 | E150.lcd_reg_write(0x56, 0x2e) | ||
51 | E150.lcd_reg_write(0x57, 0x77) | ||
52 | E150.lcd_reg_write(0x58, 0x0b) | ||
53 | E150.lcd_reg_write(0x59, 0x06) | ||
54 | E150.lcd_reg_write(0x5a, 0x07) | ||
55 | E150.lcd_reg_write(0x5b, 0x0d) | ||
56 | E150.lcd_reg_write(0x5c, 0x1d) | ||
57 | E150.lcd_reg_write(0x5d, 0xcc) -- gamma block end | ||
58 | E150.lcd_reg_write(0x1b, 0x1b) | ||
59 | E150.lcd_reg_write(0x1a, 0x01) | ||
60 | E150.lcd_reg_write(0x24, 0x2f) | ||
61 | E150.lcd_reg_write(0x25, 0x57) | ||
62 | E150.lcd_reg_write(0x23, 0x86) | ||
63 | E150.lcd_reg_write(0x18, 0x36) -- 70Hz framerate | ||
64 | E150.lcd_reg_write(0x19, 0x01) -- osc enable | ||
65 | E150.lcd_reg_write(0x01, 0x00) | ||
66 | E150.lcd_reg_write(0x1f, 0x88) | ||
67 | hwstub.mdelay(5) | ||
68 | E150.lcd_reg_write(0x1f, 0x80) | ||
69 | hwstub.mdelay(5) | ||
70 | E150.lcd_reg_write(0x1f, 0x90) | ||
71 | hwstub.mdelay(5) | ||
72 | E150.lcd_reg_write(0x1f, 0xd0) | ||
73 | hwstub.mdelay(5) | ||
74 | E150.lcd_reg_write(0x17, 0x05) -- 16bpp | ||
75 | E150.lcd_reg_write(0x36, 0x00) | ||
76 | E150.lcd_reg_write(0x28, 0x38) | ||
77 | hwstub.mdelay(40) | ||
78 | E150.lcd_reg_write(0x28, 0x3c) | ||
79 | |||
80 | E150.lcd_reg_write(0x02, 0x00) -- column start MSB | ||
81 | E150.lcd_reg_write(0x03, 0x00) -- column start LSB | ||
82 | E150.lcd_reg_write(0x04, 0x00) -- column end MSB | ||
83 | E150.lcd_reg_write(0x05, 0xef) -- column end LSB | ||
84 | E150.lcd_reg_write(0x06, 0x00) -- row start MSB | ||
85 | E150.lcd_reg_write(0x07, 0x00) -- row start LSB | ||
86 | E150.lcd_reg_write(0x08, 0x01) -- row end MSB | ||
87 | E150.lcd_reg_write(0x09, 0x3f) -- row end LSB | ||
88 | |||
89 | ATJ.lcm.fb_data() -- prepare for write to fifo | ||
90 | |||
91 | -- clear lcd gram | ||
92 | for y=0, 319 do | ||
93 | for x=0, 239/2 do | ||
94 | HW.YUV2RGB.FIFODATA.write(0) | ||
95 | end | ||
96 | end | ||
97 | |||
98 | end | ||
99 | |||
100 | function E150.set_backlight(val) | ||
101 | local fmclk = HW.CMU.FMCLK.read() | ||
102 | fmclk = bit32.band(fmclk, bit32.bnot(0x1c)) | ||
103 | fmclk = bit32.bor(fmclk, 0x22) | ||
104 | HW.CMU.FMCLK.write(fmclk) | ||
105 | |||
106 | HW.PMU.CTL.write(bit32.bor(HW.PMU.CTL.read(), 0x8000)) | ||
107 | local chg = HW.PMU.CHG.read() | ||
108 | chg = bit32.band(chg, bit32.bnot(0x1f00)) | ||
109 | chg = bit32.bor(chg, bit32.bor(0xc000, bit32.lshift(val, 8))) | ||
110 | HW.PMU.CHG.write(chg) | ||
111 | end | ||
112 | |||
113 | function E150.init() | ||
114 | E150.lcd_init() | ||
115 | E150.set_backlight(24); | ||
116 | end | ||
diff --git a/utils/regtools/desc/regs-atj213x.xml b/utils/regtools/desc/regs-atj213x.xml index 77e757d834..f43c6287bd 100644 --- a/utils/regtools/desc/regs-atj213x.xml +++ b/utils/regtools/desc/regs-atj213x.xml | |||
@@ -302,10 +302,70 @@ | |||
302 | <addr name="BDAT" addr="0x14"/> | 302 | <addr name="BDAT" addr="0x14"/> |
303 | </reg> | 303 | </reg> |
304 | <reg name="MFCTL0" desc=""> | 304 | <reg name="MFCTL0" desc=""> |
305 | <addr name="MFCTLO" addr="0x18"/> | 305 | <addr name="MFCTL0" addr="0x18"/> |
306 | <field name="RESERVED31_25" desc="" bitrange="31:25"/> | ||
307 | <field name="GPIOA2_0" desc="" bitrange="24:22"> | ||
308 | <value name="NAND_CLE_RB_ALE" value="0x1" desc=""/> | ||
309 | <value name="LCD_RS_WD9_WD0" value="0x2" desc=""/> | ||
310 | <value name="SD_CMD" value="0x4" desc=""/> | ||
311 | </field> | ||
312 | <field name="CEB6" desc="" bitrange="21:20"> | ||
313 | <value name="LCD_CE" value="0x2" desc=""/> | ||
314 | <value name="SD_CLK" value="0x3" desc=""/> | ||
315 | </field> | ||
316 | <field name="RESERVED19_16" desc="" bitrange="19:16"/> | ||
317 | <field name="CEB3" desc="" bitrange="15:14"> | ||
318 | <value name="NAND_CEB3" value="0x1" desc=""/> | ||
319 | <value name="LCD_CE" value="0x2" desc=""/> | ||
320 | </field> | ||
321 | <field name="CEB2" desc="" bitrange="13:12"> | ||
322 | <value name="NAND_CEB2" value="0x1" desc=""/> | ||
323 | <value name="LCD_CE" value="0x2" desc=""/> | ||
324 | </field> | ||
325 | <field name="CEB1" desc="" bitrange="11:10"> | ||
326 | <value name="NAND_CEB1" value="0x1" desc=""/> | ||
327 | <value name="LCD_CE" value="0x2" desc=""/> | ||
328 | </field> | ||
329 | <field name="CEB0" desc="" bitrange="9:8"> | ||
330 | <value name="NAND_CEB0" value="0x1" desc=""/> | ||
331 | <value name="LCD_CE" value="0x2" desc=""/> | ||
332 | </field> | ||
333 | <field name="WRRD" desc="" bitrange="7:6"> | ||
334 | <value name="NAND_WR_RD" value="0x1" desc=""/> | ||
335 | <value name="LCD_WRB_RDB" value="0x2" desc=""/> | ||
336 | </field> | ||
337 | <field name="NAND_D7_0" desc="" bitrange="5:3"> | ||
338 | <value name="NAND_D7_0" value="0x1" desc=""/> | ||
339 | <value name="LCD_WD17_10" value="0x2" desc=""/> | ||
340 | </field> | ||
341 | <field name="NAND_D15_8" desc="" bitrange="2:0"> | ||
342 | <value name="NAND_D15_8" value="0x1" desc=""/> | ||
343 | <value name="LCD_WD8_1" value="0x2" desc=""/> | ||
344 | <value name="SDR_D7_0" value="0x4" desc=""/> | ||
345 | </field> | ||
306 | </reg> | 346 | </reg> |
307 | <reg name="MFCTL1" desc=""> | 347 | <reg name="MFCTL1" desc=""> |
308 | <addr name="MFCTL1" addr="0x1c"/> | 348 | <addr name="MFCTL1" addr="0x1c"/> |
349 | <field name="MFEN" desc="" bitrange="31:31"/> | ||
350 | <field name="RESERVED30_18" desc="" bitrange="30:18"/> | ||
351 | <field name="SD2E" desc="" bitrange="17:17"/> | ||
352 | <field name="RBS" desc="" bitrange="16:16"/> | ||
353 | <field name="RESERVED15_12" desc="" bitrange="15:12"/> | ||
354 | <field name="SIR0" desc="" bitrange="11:11"/> | ||
355 | <field name="SPTR" desc="" bitrange="10:9"> | ||
356 | <value name="I2C1_SCL_ADA" value="0x1" desc=""/> | ||
357 | <value name="UART2_TX_RX" value="0x2" desc=""/> | ||
358 | </field> | ||
359 | <field name="U2TR" desc="" bitrange="8:8"> | ||
360 | <value name="UART2_TX_RX" value="0x0" desc=""/> | ||
361 | <value name="I2C2_SCL_SDA" value="0x1" desc=""/> | ||
362 | </field> | ||
363 | <field name="RESERVED7_6" desc="" bitrange="7:6"/> | ||
364 | <field name="I2C1SS" desc="" bitrange="5:4"> | ||
365 | <value name="I2C1_SCL_SDA" value="0x0" desc=""/> | ||
366 | <value name="UART2_TX_RX" value="0x1" desc=""/> | ||
367 | </field> | ||
368 | <field name="RESERVED3_0" desc="" bitrange="3:0"/> | ||
309 | </reg> | 369 | </reg> |
310 | </dev> | 370 | </dev> |
311 | <dev name="I2C" long_name="" desc="" version="1.0"> | 371 | <dev name="I2C" long_name="" desc="" version="1.0"> |