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-rw-r--r--utils/regtools/include/soc_desc.hpp27
1 files changed, 23 insertions, 4 deletions
diff --git a/utils/regtools/include/soc_desc.hpp b/utils/regtools/include/soc_desc.hpp
index 66562f80d9..99f8706789 100644
--- a/utils/regtools/include/soc_desc.hpp
+++ b/utils/regtools/include/soc_desc.hpp
@@ -77,6 +77,21 @@ protected:
77 * Bare representation of the format 77 * Bare representation of the format
78 */ 78 */
79 79
80/** Register access type and rules
81 *
82 * Access can be specified on registers and register variants. When left
83 * unspecified (aka DEFAULT), a register variant inherit the access from
84 * the register, and a register defaults to read-write if unspecified.
85 * When specified, the register variant access takes precedence over the register
86 * access. */
87enum access_t
88{
89 UNSPECIFIED = 0, /** Register: read-write, fields: inherit from register */
90 READ_ONLY, /** Read-only */
91 READ_WRITE, /** Read-write */
92 WRITE_ONLY, /** Write-only */
93};
94
80/** Enumerated value (aka named value), represents a special value for a field */ 95/** Enumerated value (aka named value), represents a special value for a field */
81struct enum_t 96struct enum_t
82{ 97{
@@ -137,33 +152,37 @@ struct field_t
137/** Register variant information 152/** Register variant information
138 * 153 *
139 * A register variant provides an alternative access to the register, potentially 154 * A register variant provides an alternative access to the register, potentially
140 * we special semantics. Although there are no constraints on the type string, 155 * with special semantics. Although there are no constraints on the type string,
141 * the following types have well-defined semantics: 156 * the following types have well-defined semantics:
142 * - alias: the same register at another address 157 * - alias: the same register at another address
143 * - set: writing to this register will set the 1s bits and ignore the 0s 158 * - set: writing to this register will set the 1s bits and ignore the 0s
144 * - clr: writing to this register will clear the 1s bits and ignore the 0s 159 * - clr: writing to this register will clear the 1s bits and ignore the 0s
145 * - tog: writing to this register will toggle the 1s bits and ignore the 0s 160 * - tog: writing to this register will toggle the 1s bits and ignore the 0s
161 * Note that by default, variants inherit the access type of the register but
162 * can override it.
146 */ 163 */
147struct variant_t 164struct variant_t
148{ 165{
149 soc_id_t id; /** ID (must be unique among register variants) */ 166 soc_id_t id; /** ID (must be unique among register variants) */
150 std::string type; /** type of the variant */ 167 std::string type; /** type of the variant */
151 soc_addr_t offset; /** offset of the variant */ 168 soc_addr_t offset; /** offset of the variant */
169 access_t access; /** Access type */
152 170
153 /** Default constructor: default ID, offset is 0 */ 171 /** Default constructor: default ID, offset is 0, access is unspecified */
154 variant_t():id(DEFAULT_ID), offset(0) {} 172 variant_t():id(DEFAULT_ID), offset(0), access(UNSPECIFIED) {}
155}; 173};
156 174
157/** Register information */ 175/** Register information */
158struct register_t 176struct register_t
159{ 177{
160 size_t width; /** Size in bits */ 178 size_t width; /** Size in bits */
179 access_t access; /** Access type */
161 std::string desc; /** Optional description of the register */ 180 std::string desc; /** Optional description of the register */
162 std::vector< field_t > field; /** List of fields */ 181 std::vector< field_t > field; /** List of fields */
163 std::vector< variant_t > variant; /** List of variants */ 182 std::vector< variant_t > variant; /** List of variants */
164 183
165 /** Default constructor: width is 32 */ 184 /** Default constructor: width is 32 */
166 register_t():width(32) {} 185 register_t():width(32), access(UNSPECIFIED) {}
167}; 186};
168 187
169/** Node address range information */ 188/** Node address range information */