diff options
Diffstat (limited to 'utils/regtools/desc/regs-rk27xx.xml')
-rw-r--r-- | utils/regtools/desc/regs-rk27xx.xml | 4344 |
1 files changed, 2416 insertions, 1928 deletions
diff --git a/utils/regtools/desc/regs-rk27xx.xml b/utils/regtools/desc/regs-rk27xx.xml index e4f47071a3..fc866bc8bc 100644 --- a/utils/regtools/desc/regs-rk27xx.xml +++ b/utils/regtools/desc/regs-rk27xx.xml | |||
@@ -1,1995 +1,2483 @@ | |||
1 | <?xml version="1.0"?> | 1 | <?xml version="1.0"?> |
2 | <!-- | ||
3 | __________ __ ___. | ||
4 | Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
5 | Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
6 | Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
7 | Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
8 | \/ \/ \/ \/ \/ | ||
9 | Copyright (C) 2013 by Marcin Bukat | ||
10 | |||
11 | This program is free software; you can redistribute it and/or | ||
12 | modify it under the terms of the GNU General Public License | ||
13 | as published by the Free Software Foundation; either version 2 | ||
14 | of the License, or (at your option) any later version. | ||
15 | |||
16 | This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
17 | KIND, either express or implied. | ||
18 | --> | ||
19 | <soc name="rk27xx" desc="Rockchip rk27xx"> | 2 | <soc name="rk27xx" desc="Rockchip rk27xx"> |
20 | <dev name="TIMER" long_name="TIMER" desc="Timer module" version="1.0"> | 3 | <dev name="A2A_DMA" long_name="AHB-to-AHB bridge" desc="AHB-to-AHB bridge with DMA" version="1.0"> |
21 | <addr name="TIMER0" addr="0x18000000" /> | 4 | <addr name="A2A_DMA" addr="0x18094000"/> |
22 | <addr name="TIMER1" addr="0x18000010" /> | 5 | <reg name="CON0" desc=""> |
23 | <addr name="TIMER2" addr="0x18000020" /> | 6 | <addr name="CON0" addr="0x0"/> |
24 | <reg name="TMRnLR"> | 7 | </reg> |
25 | <formula string="n*0x10" /> | 8 | <reg name="ISRC0" desc=""> |
26 | <addr name="LR" addr="0x00" /> | 9 | <addr name="ISRC0" addr="0x4"/> |
27 | </reg> | 10 | </reg> |
28 | <reg name="TMRnCVR"> | 11 | <reg name="IDST0" desc=""> |
29 | <formula string="0x04+n*0x10" /> | 12 | <addr name="IDST0" addr="0x8"/> |
30 | <addr name="CVR" addr="0x04" /> | 13 | </reg> |
31 | </reg> | 14 | <reg name="ICNT0" desc=""> |
32 | <reg name="TMRnCON"> | 15 | <addr name="ICNT0" addr="0xc"/> |
33 | <formula string="0x08+n*0x10" /> | 16 | </reg> |
34 | <addr name="CON" addr="0x08" /> | 17 | <reg name="CSRC0" desc=""> |
35 | </reg> | 18 | <addr name="CSRC0" addr="0x10"/> |
19 | </reg> | ||
20 | <reg name="CDST0" desc=""> | ||
21 | <addr name="CDST0" addr="0x14"/> | ||
22 | </reg> | ||
23 | <reg name="CCNT0" desc=""> | ||
24 | <addr name="CCNT0" addr="0x18"/> | ||
25 | </reg> | ||
26 | <reg name="CON1" desc=""> | ||
27 | <addr name="CON1" addr="0x1c"/> | ||
28 | </reg> | ||
29 | <reg name="ISRC1" desc=""> | ||
30 | <addr name="ISRC1" addr="0x20"/> | ||
31 | </reg> | ||
32 | <reg name="IDST1" desc=""> | ||
33 | <addr name="IDST1" addr="0x24"/> | ||
34 | </reg> | ||
35 | <reg name="ICNT1" desc=""> | ||
36 | <addr name="ICNT1" addr="0x28"/> | ||
37 | </reg> | ||
38 | <reg name="CSRC1" desc=""> | ||
39 | <addr name="CSRC1" addr="0x2c"/> | ||
40 | </reg> | ||
41 | <reg name="CDST1" desc=""> | ||
42 | <addr name="CDST1" addr="0x30"/> | ||
43 | </reg> | ||
44 | <reg name="CCNT1" desc=""> | ||
45 | <addr name="CCNT1" addr="0x34"/> | ||
46 | </reg> | ||
47 | <reg name="INT_STS" desc=""> | ||
48 | <addr name="INT_STS" addr="0x38"/> | ||
49 | </reg> | ||
50 | <reg name="DMA_STS" desc=""> | ||
51 | <addr name="DMA_STS" addr="0x3c"/> | ||
52 | </reg> | ||
53 | <reg name="ERR_ADR0" desc=""> | ||
54 | <addr name="ERR_ADR0" addr="0x40"/> | ||
55 | </reg> | ||
56 | <reg name="ERR_OP0" desc=""> | ||
57 | <addr name="ERR_OP0" addr="0x44"/> | ||
58 | </reg> | ||
59 | <reg name="ERR_ADR1" desc=""> | ||
60 | <addr name="ERR_ADR1" addr="0x48"/> | ||
61 | </reg> | ||
62 | <reg name="ERR_OP1" desc=""> | ||
63 | <addr name="ERR_OP1" addr="0x4c"/> | ||
64 | </reg> | ||
65 | <reg name="LCNT0" desc=""> | ||
66 | <addr name="LCNT0" addr="0x50"/> | ||
67 | </reg> | ||
68 | <reg name="LCNT1" desc=""> | ||
69 | <addr name="LCNT1" addr="0x54"/> | ||
70 | </reg> | ||
71 | <reg name="DOMAIN" desc=""> | ||
72 | <addr name="DOMAIN" addr="0x58"/> | ||
73 | </reg> | ||
36 | </dev> | 74 | </dev> |
37 | <dev name="UART" long_name="UART" desc="UART" version="1.0"> | 75 | <dev name="ADC" long_name="ADC" desc="4 channels 10-bit SAR A/D converter" version="1.0"> |
38 | <addr name="UART0" addr="0x18004000" /> | 76 | <addr name="ADC" addr="0x18030000"/> |
39 | <addr name="UART1" addr="0x18008000" /> | 77 | <reg name="DATA" desc=""> |
40 | <reg name="UARTn_RBR" addr="0x00"> | 78 | <addr name="DATA" addr="0x0"/> |
41 | <formula string="n*0x4000" /> | 79 | </reg> |
42 | <addr name="RBR" addr="0x00" /> | 80 | <reg name="STAT" desc=""> |
43 | </reg> | 81 | <addr name="STAT" addr="0x4"/> |
44 | <reg name="UARTn_THR" addr="0x00"> | 82 | </reg> |
45 | <formula string="n*0x4000" /> | 83 | <reg name="CTRL" desc=""> |
46 | <addr name="THR" addr="0x00" /> | 84 | <addr name="CTRL" addr="0x8"/> |
47 | </reg> | 85 | </reg> |
48 | <reg name="UARTn_DLL" addr="0x00"> | 86 | </dev> |
49 | <formula string="n*0x4000" /> | 87 | <dev name="ARB" long_name="AHB bus arbiter" desc="AHB bus arbiter" version="1.0"> |
50 | <addr name="DLL" addr="0x00" /> | 88 | <addr name="ARB" addr="0x18084000"/> |
51 | </reg> | 89 | <reg name="MODE" desc=""> |
52 | <reg name="UARTn_DLH" addr="0x04"> | 90 | <addr name="MODE" addr="0x0"/> |
53 | <formula string="0x04+n*0x4000" /> | 91 | </reg> |
54 | <addr name="DLH" addr="0x04" /> | 92 | <reg name="PRIOn" desc=""> |
55 | </reg> | 93 | <formula string="n*0x04 + 0x04"/> |
56 | <reg name="UARTn_IER" addr="0x04"> | 94 | <addr name="PRIO1" addr="0x4"/> |
57 | <formula string="0x04+n*0x4000" /> | 95 | <addr name="PRIO2" addr="0x8"/> |
58 | <addr name="IER" addr="0x04" /> | 96 | <addr name="PRIO3" addr="0xc"/> |
59 | </reg> | 97 | <addr name="PRIO4" addr="0x10"/> |
60 | <reg name="UARTn_IIR" addr="0x08"> | 98 | <addr name="PRIO5" addr="0x14"/> |
61 | <formula string="0x08+n*0x4000" /> | 99 | <addr name="PRIO6" addr="0x18"/> |
62 | <addr name="IIR" addr="0x08" /> | 100 | <addr name="PRIO7" addr="0x1c"/> |
63 | </reg> | 101 | <addr name="PRIO8" addr="0x20"/> |
64 | <reg name="UARTn_FCR" addr="0x08"> | 102 | <addr name="PRIO9" addr="0x24"/> |
65 | <formula string="0x08+n*0x4000" /> | 103 | <addr name="PRIO10" addr="0x28"/> |
66 | <addr name="FCR" addr="0x08" /> | 104 | <addr name="PRIO11" addr="0x2c"/> |
67 | </reg> | 105 | <addr name="PRIO12" addr="0x30"/> |
68 | <reg name="UARTn_LCR" addr="0x0c"> | 106 | <addr name="PRIO13" addr="0x34"/> |
69 | <formula string="0x0c+n*0x4000" /> | 107 | <addr name="PRIO14" addr="0x38"/> |
70 | <addr name="LCR" addr="0x0c" /> | 108 | <addr name="PRIO15" addr="0x3c"/> |
71 | </reg> | 109 | </reg> |
72 | <reg name="UARTn_MCR" addr="0x10"> | 110 | </dev> |
73 | <formula string="0x10+n*0x4000" /> | 111 | <dev name="CACHE" long_name="CACHE Controller" desc="CACHE Controller" version="1.0"> |
74 | <addr name="MCR" addr="0x10" /> | 112 | <addr name="CACHE" addr="0xefff0000"/> |
75 | </reg> | 113 | <reg name="DEVID" desc=""> |
76 | <reg name="UARTn_LSR" addr="0x14"> | 114 | <addr name="DEVID" addr="0x0"/> |
77 | <formula string="0x14+n*0x4000" /> | 115 | <field name="CACHE_EN" desc="" bitrange="31:31"/> |
78 | <addr name="LSR" addr="0x14" /> | 116 | </reg> |
79 | </reg> | 117 | <reg name="CACHEOP" desc=""> |
80 | <reg name="UARTn_MSR" addr="0x18"> | 118 | <addr name="CACHEOP" addr="0x4"/> |
81 | <formula string="0x18+n*0x4000" /> | 119 | <field name="ADDRESS" desc="" bitrange="31:2"/> |
82 | <addr name="MSR" addr="0x18" /> | 120 | <field name="OPCODE" desc="" bitrange="1:0"> |
83 | </reg> | 121 | <value name="NOP" value="0x0" desc=""/> |
122 | <value name="INVALIDATE_SINGLE_ENTRY" value="0x1" desc=""/> | ||
123 | <value name="INVALIDATE_WAY" value="0x2" desc=""/> | ||
124 | </field> | ||
125 | </reg> | ||
126 | <reg name="CACHELKDN" desc=""> | ||
127 | <addr name="CACHELKDN" addr="0x8"/> | ||
128 | <field name="RESERVED" desc="" bitrange="31:2"/> | ||
129 | <field name="WAY_SELECT" desc="" bitrange="1:0"> | ||
130 | <value name="LOCK_NONE" value="0x0" desc=""/> | ||
131 | <value name="LOCK_WAY0" value="0x1" desc=""/> | ||
132 | <value name="LOCK_WAY1" value="0x2" desc=""/> | ||
133 | </field> | ||
134 | </reg> | ||
135 | <reg name="MEMMAPA" desc=""> | ||
136 | <addr name="MEMMAPA" addr="0x10"/> | ||
137 | <field name="MEMBASE" desc="" bitrange="31:25"/> | ||
138 | <field name="MAPSIZE" desc="" bitrange="7:0"> | ||
139 | <value name="MAP_128MB" value="0xf8" desc=""/> | ||
140 | <value name="MAP_64MB" value="0xfc" desc=""/> | ||
141 | <value name="MAP_32MB" value="0xfe" desc=""/> | ||
142 | </field> | ||
143 | </reg> | ||
144 | <reg name="MEMMAPB" desc=""> | ||
145 | <addr name="MEMMAPB" addr="0x14"/> | ||
146 | <field name="MEMBASE" desc="" bitrange="31:25"/> | ||
147 | <field name="MAPSIZE" desc="" bitrange="7:0"> | ||
148 | <value name="MAP_128MB" value="0xf8" desc=""/> | ||
149 | <value name="MAP_64MB" value="0xfc" desc=""/> | ||
150 | <value name="MAP_32MB" value="0xfe" desc=""/> | ||
151 | </field> | ||
152 | </reg> | ||
153 | <reg name="MEMMAPC" desc=""> | ||
154 | <addr name="MEMMAPC" addr="0x18"/> | ||
155 | <field name="MEMBASE" desc="" bitrange="31:25"/> | ||
156 | <field name="MAPSIZE" desc="" bitrange="7:0"> | ||
157 | <value name="MAP_128MB" value="0xf8" desc=""/> | ||
158 | <value name="MAP_64MB" value="0xfc" desc=""/> | ||
159 | <value name="MAP_32MB" value="0xfe" desc=""/> | ||
160 | </field> | ||
161 | </reg> | ||
162 | <reg name="MEMMAPD" desc=""> | ||
163 | <addr name="MEMMAPD" addr="0x1c"/> | ||
164 | <field name="MEMBASE" desc="" bitrange="31:25"/> | ||
165 | <field name="MAPSIZE" desc="" bitrange="7:0"> | ||
166 | <value name="MAP_128MB" value="0xf8" desc=""/> | ||
167 | <value name="MAP_64MB" value="0xfc" desc=""/> | ||
168 | <value name="MAP_32MB" value="0xfe" desc=""/> | ||
169 | </field> | ||
170 | </reg> | ||
171 | <reg name="PFCNTRA_CTRL" desc=""> | ||
172 | <addr name="PFCNTRA_CTRL" addr="0x20"/> | ||
173 | </reg> | ||
174 | <reg name="PFCNTRA" desc=""> | ||
175 | <addr name="PFCNTRA" addr="0x24"/> | ||
176 | </reg> | ||
177 | <reg name="PFCNTRB_CTRL" desc=""> | ||
178 | <addr name="PFCNTRB_CTRL" addr="0x28"/> | ||
179 | </reg> | ||
180 | <reg name="PFCNTRB" desc=""> | ||
181 | <addr name="PFCNTRB" addr="0x2c"/> | ||
182 | </reg> | ||
183 | </dev> | ||
184 | <dev name="DWDMA" long_name="DMA Controller" desc="DMA Controller" version="1.0"> | ||
185 | <addr name="DWDMA" addr="0x186f0000"/> | ||
186 | <reg name="DWDMA_SARn" desc=""> | ||
187 | <formula string="n*0x58+0x00"/> | ||
188 | <addr name="SAR0" addr="0x0"/> | ||
189 | <addr name="SAR1" addr="0x58"/> | ||
190 | <addr name="SAR2" addr="0xb0"/> | ||
191 | <addr name="SAR3" addr="0x108"/> | ||
192 | </reg> | ||
193 | <reg name="DWDMA_DARn" desc=""> | ||
194 | <formula string="n*0x58+0x08"/> | ||
195 | <addr name="DAR0" addr="0x8"/> | ||
196 | <addr name="DAR1" addr="0x60"/> | ||
197 | <addr name="DAR2" addr="0xb8"/> | ||
198 | <addr name="DAR3" addr="0x110"/> | ||
199 | </reg> | ||
200 | <reg name="DWDMA_LLPn" desc=""> | ||
201 | <formula string="n*0x58+0x10"/> | ||
202 | <addr name="LLP0" addr="0x10"/> | ||
203 | <addr name="LLP1" addr="0x68"/> | ||
204 | <addr name="LLP2" addr="0xc0"/> | ||
205 | <addr name="LLP3" addr="0x118"/> | ||
206 | </reg> | ||
207 | <reg name="DWDMA_CTL_Ln" desc=""> | ||
208 | <formula string="n*0x58+0x18"/> | ||
209 | <addr name="CTL_L0" addr="0x18"/> | ||
210 | <addr name="CTL_L1" addr="0x70"/> | ||
211 | <addr name="CTL_L2" addr="0xc8"/> | ||
212 | <addr name="CTL_L3" addr="0x120"/> | ||
213 | </reg> | ||
214 | <reg name="DWDMA_CTL_Hn" desc=""> | ||
215 | <formula string="n*0x58+0x1c"/> | ||
216 | <addr name="CTL_H0" addr="0x1c"/> | ||
217 | <addr name="CTL_H1" addr="0x74"/> | ||
218 | <addr name="CTL_H2" addr="0xcc"/> | ||
219 | <addr name="CTL_H3" addr="0x124"/> | ||
220 | </reg> | ||
221 | <reg name="DWDMA_SSTATn" desc=""> | ||
222 | <formula string="n*0x58+0x20"/> | ||
223 | <addr name="SSTAT0" addr="0x20"/> | ||
224 | <addr name="SSTAT1" addr="0x78"/> | ||
225 | <addr name="SSTAT2" addr="0xd0"/> | ||
226 | <addr name="SSTAT3" addr="0x128"/> | ||
227 | </reg> | ||
228 | <reg name="DWDMA_DSTATn" desc=""> | ||
229 | <formula string="n*0x58+0x28"/> | ||
230 | <addr name="DSTAT0" addr="0x28"/> | ||
231 | <addr name="DSTAT1" addr="0x80"/> | ||
232 | <addr name="DSTAT2" addr="0xd8"/> | ||
233 | <addr name="DSTAT3" addr="0x130"/> | ||
234 | </reg> | ||
235 | <reg name="DWDMA_SSTATARn" desc=""> | ||
236 | <formula string="n*0x58+0x30"/> | ||
237 | <addr name="SSTATAR0" addr="0x30"/> | ||
238 | <addr name="SSTATAR1" addr="0x88"/> | ||
239 | <addr name="SSTATAR2" addr="0xe0"/> | ||
240 | <addr name="SSTATAR3" addr="0x138"/> | ||
241 | </reg> | ||
242 | <reg name="DWDMA_DSTATARn" desc=""> | ||
243 | <formula string="n*0x58+0x38"/> | ||
244 | <addr name="DSTATAR0" addr="0x38"/> | ||
245 | <addr name="DSTATAR1" addr="0x90"/> | ||
246 | <addr name="DSTATAR2" addr="0xe8"/> | ||
247 | <addr name="DSTATAR3" addr="0x140"/> | ||
248 | </reg> | ||
249 | <reg name="DWDMA_CFG_Ln" desc=""> | ||
250 | <formula string="n*0x58+0x40"/> | ||
251 | <addr name="CFG_L0" addr="0x40"/> | ||
252 | <addr name="CFG_L1" addr="0x98"/> | ||
253 | <addr name="CFG_L2" addr="0xf0"/> | ||
254 | <addr name="CFG_L3" addr="0x148"/> | ||
255 | </reg> | ||
256 | <reg name="DWDMA_CFG_Hn" desc=""> | ||
257 | <formula string="n*0x58+0x44"/> | ||
258 | <addr name="CFG_H0" addr="0x44"/> | ||
259 | <addr name="CFG_H1" addr="0x9c"/> | ||
260 | <addr name="CFG_H2" addr="0xf4"/> | ||
261 | <addr name="CFG_H3" addr="0x14c"/> | ||
262 | </reg> | ||
263 | <reg name="DWDMA_SGRn" desc=""> | ||
264 | <formula string="n*0x58+0x48"/> | ||
265 | <addr name="SGR0" addr="0x48"/> | ||
266 | <addr name="SGR1" addr="0xa0"/> | ||
267 | <addr name="SGR2" addr="0xf8"/> | ||
268 | <addr name="SGR3" addr="0x150"/> | ||
269 | </reg> | ||
270 | <reg name="DWDMA_DSRn" desc=""> | ||
271 | <formula string="n*0x58+0x50"/> | ||
272 | <addr name="DSR0" addr="0x50"/> | ||
273 | <addr name="DSR1" addr="0xa8"/> | ||
274 | <addr name="DSR2" addr="0x100"/> | ||
275 | <addr name="DSR3" addr="0x158"/> | ||
276 | </reg> | ||
277 | <reg name="RAW_TFR" desc=""> | ||
278 | <addr name="RAW_TFR" addr="0x2c0"/> | ||
279 | </reg> | ||
280 | <reg name="RAW_BLOCK" desc=""> | ||
281 | <addr name="RAW_BLOCK" addr="0x2c8"/> | ||
282 | </reg> | ||
283 | <reg name="RAW_SRCTRAN" desc=""> | ||
284 | <addr name="RAW_SRCTRAN" addr="0x2d0"/> | ||
285 | </reg> | ||
286 | <reg name="RAW_DSTTRAN" desc=""> | ||
287 | <addr name="RAW_DSTTRAN" addr="0x2d8"/> | ||
288 | </reg> | ||
289 | <reg name="RAW_ERR" desc=""> | ||
290 | <addr name="RAW_ERR" addr="0x2e0"/> | ||
291 | </reg> | ||
292 | <reg name="STATUS_TFR" desc=""> | ||
293 | <addr name="STATUS_TFR" addr="0x2e8"/> | ||
294 | </reg> | ||
295 | <reg name="STATUS_BLOCK" desc=""> | ||
296 | <addr name="STATUS_BLOCK" addr="0x2f0"/> | ||
297 | </reg> | ||
298 | <reg name="STATUS_SRCTRAN" desc=""> | ||
299 | <addr name="STATUS_SRCTRAN" addr="0x2f8"/> | ||
300 | </reg> | ||
301 | <reg name="STATUS_DSTTRAN" desc=""> | ||
302 | <addr name="STATUS_DSTTRAN" addr="0x300"/> | ||
303 | </reg> | ||
304 | <reg name="STATUS_ERR" desc=""> | ||
305 | <addr name="STATUS_ERR" addr="0x308"/> | ||
306 | </reg> | ||
307 | <reg name="MASK_TFR" desc=""> | ||
308 | <addr name="MASK_TFR" addr="0x310"/> | ||
309 | </reg> | ||
310 | <reg name="MASK_BLOCK" desc=""> | ||
311 | <addr name="MASK_BLOCK" addr="0x318"/> | ||
312 | </reg> | ||
313 | <reg name="MASK_SRCTRAN" desc=""> | ||
314 | <addr name="MASK_SRCTRAN" addr="0x320"/> | ||
315 | </reg> | ||
316 | <reg name="MASK_DSTTRAN" desc=""> | ||
317 | <addr name="MASK_DSTTRAN" addr="0x328"/> | ||
318 | </reg> | ||
319 | <reg name="MASK_ERR" desc=""> | ||
320 | <addr name="MASK_ERR" addr="0x330"/> | ||
321 | </reg> | ||
322 | <reg name="CLEAR_TFR" desc=""> | ||
323 | <addr name="CLEAR_TFR" addr="0x338"/> | ||
324 | </reg> | ||
325 | <reg name="CLEAR_BLOCK" desc=""> | ||
326 | <addr name="CLEAR_BLOCK" addr="0x340"/> | ||
327 | </reg> | ||
328 | <reg name="CLEAR_SRCTRAN" desc=""> | ||
329 | <addr name="CLEAR_SRCTRAN" addr="0x348"/> | ||
330 | </reg> | ||
331 | <reg name="CLEAR_DSTTRAN" desc=""> | ||
332 | <addr name="CLEAR_DSTTRAN" addr="0x350"/> | ||
333 | </reg> | ||
334 | <reg name="CLEAR_ERR" desc=""> | ||
335 | <addr name="CLEAR_ERR" addr="0x358"/> | ||
336 | </reg> | ||
337 | <reg name="STATUS_INT" desc=""> | ||
338 | <addr name="STATUS_INT" addr="0x360"/> | ||
339 | </reg> | ||
340 | <reg name="REQ_SRC" desc=""> | ||
341 | <addr name="REQ_SRC" addr="0x368"/> | ||
342 | </reg> | ||
343 | <reg name="REQ_DST" desc=""> | ||
344 | <addr name="REQ_DST" addr="0x370"/> | ||
345 | </reg> | ||
346 | <reg name="S_REQ_SRC" desc=""> | ||
347 | <addr name="S_REQ_SRC" addr="0x378"/> | ||
348 | </reg> | ||
349 | <reg name="S_REQ_DST" desc=""> | ||
350 | <addr name="S_REQ_DST" addr="0x380"/> | ||
351 | </reg> | ||
352 | <reg name="L_REQ_SRC" desc=""> | ||
353 | <addr name="L_REQ_SRC" addr="0x388"/> | ||
354 | </reg> | ||
355 | <reg name="L_REQ_DST" desc=""> | ||
356 | <addr name="L_REQ_DST" addr="0x390"/> | ||
357 | </reg> | ||
358 | <reg name="DMA_CFG" desc=""> | ||
359 | <addr name="DMA_CFG" addr="0x398"/> | ||
360 | </reg> | ||
361 | <reg name="DMA_CHEN" desc=""> | ||
362 | <addr name="DMA_CHEN" addr="0x3a0"/> | ||
363 | </reg> | ||
364 | </dev> | ||
365 | <dev name="GPIO" long_name="GPIO" desc="GPIO" version="1.0"> | ||
366 | <addr name="GPIO0" addr="0x1800c000"/> | ||
367 | <reg name="PADR" desc=""> | ||
368 | <addr name="PADR" addr="0x0"/> | ||
369 | </reg> | ||
370 | <reg name="PACON" desc=""> | ||
371 | <addr name="PACON" addr="0x4"/> | ||
372 | </reg> | ||
373 | <reg name="PBDR" desc=""> | ||
374 | <addr name="PBDR" addr="0x8"/> | ||
375 | </reg> | ||
376 | <reg name="PBCON" desc=""> | ||
377 | <addr name="PBCON" addr="0xc"/> | ||
378 | </reg> | ||
379 | <reg name="PCDR" desc=""> | ||
380 | <addr name="PCDR" addr="0x10"/> | ||
381 | </reg> | ||
382 | <reg name="PCCON" desc=""> | ||
383 | <addr name="PCCON" addr="0x14"/> | ||
384 | </reg> | ||
385 | <reg name="PDDR" desc=""> | ||
386 | <addr name="PDDR" addr="0x18"/> | ||
387 | </reg> | ||
388 | <reg name="PDCON" desc=""> | ||
389 | <addr name="PDCON" addr="0x1c"/> | ||
390 | </reg> | ||
391 | <reg name="TEST" desc=""> | ||
392 | <addr name="TEST" addr="0x20"/> | ||
393 | </reg> | ||
394 | <reg name="IEA" desc=""> | ||
395 | <addr name="IEA" addr="0x24"/> | ||
396 | </reg> | ||
397 | <reg name="IEB" desc=""> | ||
398 | <addr name="IEB" addr="0x28"/> | ||
399 | </reg> | ||
400 | <reg name="IEC" desc=""> | ||
401 | <addr name="IEC" addr="0x2c"/> | ||
402 | </reg> | ||
403 | <reg name="IED" desc=""> | ||
404 | <addr name="IED" addr="0x30"/> | ||
405 | </reg> | ||
406 | <reg name="ISA" desc=""> | ||
407 | <addr name="ISA" addr="0x34"/> | ||
408 | </reg> | ||
409 | <reg name="ISB" desc=""> | ||
410 | <addr name="ISB" addr="0x38"/> | ||
411 | </reg> | ||
412 | <reg name="ISC" desc=""> | ||
413 | <addr name="ISC" addr="0x3c"/> | ||
414 | </reg> | ||
415 | <reg name="ISD" desc=""> | ||
416 | <addr name="ISD" addr="0x40"/> | ||
417 | </reg> | ||
418 | <reg name="IBEA" desc=""> | ||
419 | <addr name="IBEA" addr="0x44"/> | ||
420 | </reg> | ||
421 | <reg name="IBEB" desc=""> | ||
422 | <addr name="IBEB" addr="0x48"/> | ||
423 | </reg> | ||
424 | <reg name="IBEC" desc=""> | ||
425 | <addr name="IBEC" addr="0x4c"/> | ||
426 | </reg> | ||
427 | <reg name="IBED" desc=""> | ||
428 | <addr name="IBED" addr="0x50"/> | ||
429 | </reg> | ||
430 | <reg name="IEVA" desc=""> | ||
431 | <addr name="IEVA" addr="0x54"/> | ||
432 | </reg> | ||
433 | <reg name="IEVB" desc=""> | ||
434 | <addr name="IEVB" addr="0x58"/> | ||
435 | </reg> | ||
436 | <reg name="IEVC" desc=""> | ||
437 | <addr name="IEVC" addr="0x5c"/> | ||
438 | </reg> | ||
439 | <reg name="IEVD" desc=""> | ||
440 | <addr name="IEVD" addr="0x60"/> | ||
441 | </reg> | ||
442 | <reg name="ICA" desc=""> | ||
443 | <addr name="ICA" addr="0x64"/> | ||
444 | </reg> | ||
445 | <reg name="ICB" desc=""> | ||
446 | <addr name="ICB" addr="0x68"/> | ||
447 | </reg> | ||
448 | <reg name="ICC" desc=""> | ||
449 | <addr name="ICC" addr="0x6c"/> | ||
450 | </reg> | ||
451 | <reg name="ICD" desc=""> | ||
452 | <addr name="ICD" addr="0x70"/> | ||
453 | </reg> | ||
454 | <reg name="ISR" desc=""> | ||
455 | <addr name="ISR" addr="0x74"/> | ||
456 | </reg> | ||
84 | </dev> | 457 | </dev> |
85 | <dev name="GPIO" long_name="GPIO" desc="GPIO" version="1.0"> | 458 | <dev name="GPIO" long_name="GPIO" desc="GPIO" version="1.0"> |
86 | <addr name="GPIO0" addr="0x1800c000" /> | 459 | <addr name="GPIO1" addr="0x18038000"/> |
87 | <reg name="PADR" addr="0x00"></reg> | 460 | <reg name="PEDR" desc=""> |
88 | <reg name="PACON" addr="0x04"></reg> | 461 | <addr name="PEDR" addr="0x0"/> |
89 | <reg name="PBDR" addr="0x08"></reg> | 462 | </reg> |
90 | <reg name="PBCON" addr="0x0c"></reg> | 463 | <reg name="PECON" desc=""> |
91 | <reg name="PCDR" addr="0x10"></reg> | 464 | <addr name="PECON" addr="0x4"/> |
92 | <reg name="PCCON" addr="0x14"></reg> | 465 | </reg> |
93 | <reg name="PDDR" addr="0x18"></reg> | 466 | <reg name="PFDR" desc=""> |
94 | <reg name="PDCON" addr="0x1c"></reg> | 467 | <addr name="PFDR" addr="0x8"/> |
95 | <reg name="TEST" addr="0x20"></reg> | 468 | </reg> |
96 | <reg name="IEA" addr="0x24"></reg> | 469 | <reg name="PFCON" desc=""> |
97 | <reg name="IEB" addr="0x28"></reg> | 470 | <addr name="PFCON" addr="0xc"/> |
98 | <reg name="IEC" addr="0x2c"></reg> | 471 | </reg> |
99 | <reg name="IED" addr="0x30"></reg> | 472 | <reg name="_TEST" desc=""> |
100 | <reg name="ISA" addr="0x34"></reg> | 473 | <addr name="_TEST" addr="0x20"/> |
101 | <reg name="ISB" addr="0x38"></reg> | 474 | </reg> |
102 | <reg name="ISC" addr="0x3c"></reg> | 475 | <reg name="IEE" desc=""> |
103 | <reg name="ISD" addr="0x40"></reg> | 476 | <addr name="IEE" addr="0x24"/> |
104 | <reg name="IBEA" addr="0x44"></reg> | 477 | </reg> |
105 | <reg name="IBEB" addr="0x48"></reg> | 478 | <reg name="IEF" desc=""> |
106 | <reg name="IBEC" addr="0x4c"></reg> | 479 | <addr name="IEF" addr="0x28"/> |
107 | <reg name="IBED" addr="0x50"></reg> | 480 | </reg> |
108 | <reg name="IEVA" addr="0x54"></reg> | 481 | <reg name="ISE" desc=""> |
109 | <reg name="IEVB" addr="0x58"></reg> | 482 | <addr name="ISE" addr="0x34"/> |
110 | <reg name="IEVC" addr="0x5c"></reg> | 483 | </reg> |
111 | <reg name="IEVD" addr="0x60"></reg> | 484 | <reg name="ISF" desc=""> |
112 | <reg name="ICA" addr="0x64"></reg> | 485 | <addr name="ISF" addr="0x38"/> |
113 | <reg name="ICB" addr="0x68"></reg> | 486 | </reg> |
114 | <reg name="ICC" addr="0x6c"></reg> | 487 | <reg name="IBEE" desc=""> |
115 | <reg name="ICD" addr="0x70"></reg> | 488 | <addr name="IBEE" addr="0x44"/> |
116 | <reg name="ISR" addr="0x74"></reg> | 489 | </reg> |
490 | <reg name="IBEF" desc=""> | ||
491 | <addr name="IBEF" addr="0x48"/> | ||
492 | </reg> | ||
493 | <reg name="IEVE" desc=""> | ||
494 | <addr name="IEVE" addr="0x54"/> | ||
495 | </reg> | ||
496 | <reg name="IEVF" desc=""> | ||
497 | <addr name="IEVF" addr="0x58"/> | ||
498 | </reg> | ||
499 | <reg name="ICE" desc=""> | ||
500 | <addr name="ICE" addr="0x64"/> | ||
501 | </reg> | ||
502 | <reg name="ICF" desc=""> | ||
503 | <addr name="ICF" addr="0x68"/> | ||
504 | </reg> | ||
505 | <reg name="ISR" desc=""> | ||
506 | <addr name="ISR" addr="0x74"/> | ||
507 | </reg> | ||
117 | </dev> | 508 | </dev> |
118 | <dev name="WDT" long_name="Watchdog" desc="Watchdog" version="1.0"> | 509 | <dev name="HDMA" long_name="AHB DMA" desc="AHB DMA" version="1.0"> |
119 | <addr name="WDT" addr="0x18010000" /> | 510 | <addr name="HDMA" addr="0x18090000"/> |
120 | <reg name="LR" addr="0x00"></reg> | 511 | <reg name="CON0" desc=""> |
121 | <reg name="CVR" addr="0x04"></reg> | 512 | <addr name="CON0" addr="0x0"/> |
122 | <reg name="CON" addr="0x08"></reg> | 513 | </reg> |
514 | <reg name="CON1" desc=""> | ||
515 | <addr name="CON1" addr="0x4"/> | ||
516 | </reg> | ||
517 | <reg name="ISRC0" desc=""> | ||
518 | <addr name="ISRC0" addr="0x8"/> | ||
519 | </reg> | ||
520 | <reg name="IDST0" desc=""> | ||
521 | <addr name="IDST0" addr="0xc"/> | ||
522 | </reg> | ||
523 | <reg name="ICNT0" desc=""> | ||
524 | <addr name="ICNT0" addr="0x10"/> | ||
525 | </reg> | ||
526 | <reg name="ISRC1" desc=""> | ||
527 | <addr name="ISRC1" addr="0x14"/> | ||
528 | </reg> | ||
529 | <reg name="IDST1" desc=""> | ||
530 | <addr name="IDST1" addr="0x18"/> | ||
531 | </reg> | ||
532 | <reg name="ICNT1" desc=""> | ||
533 | <addr name="ICNT1" addr="0x1c"/> | ||
534 | </reg> | ||
535 | <reg name="CSRC0" desc=""> | ||
536 | <addr name="CSRC0" addr="0x20"/> | ||
537 | </reg> | ||
538 | <reg name="CDST0" desc=""> | ||
539 | <addr name="CDST0" addr="0x24"/> | ||
540 | </reg> | ||
541 | <reg name="CCNT0" desc=""> | ||
542 | <addr name="CCNT0" addr="0x28"/> | ||
543 | </reg> | ||
544 | <reg name="CSRC1" desc=""> | ||
545 | <addr name="CSRC1" addr="0x2c"/> | ||
546 | </reg> | ||
547 | <reg name="CDST1" desc=""> | ||
548 | <addr name="CDST1" addr="0x30"/> | ||
549 | </reg> | ||
550 | <reg name="CCNT1" desc=""> | ||
551 | <addr name="CCNT1" addr="0x34"/> | ||
552 | </reg> | ||
553 | <reg name="ISR" desc=""> | ||
554 | <addr name="ISR" addr="0x38"/> | ||
555 | </reg> | ||
556 | <reg name="DSR" desc=""> | ||
557 | <addr name="DSR" addr="0x3c"/> | ||
558 | </reg> | ||
559 | <reg name="ISCNT0" desc=""> | ||
560 | <addr name="ISCNT0" addr="0x40"/> | ||
561 | </reg> | ||
562 | <reg name="IPNCNTD0" desc=""> | ||
563 | <addr name="IPNCNTD0" addr="0x44"/> | ||
564 | </reg> | ||
565 | <reg name="IADDR_BS0" desc=""> | ||
566 | <addr name="IADDR_BS0" addr="0x48"/> | ||
567 | </reg> | ||
568 | <reg name="ISCNT1" desc=""> | ||
569 | <addr name="ISCNT1" addr="0x4c"/> | ||
570 | </reg> | ||
571 | <reg name="IPNCNTD1" desc=""> | ||
572 | <addr name="IPNCNTD1" addr="0x50"/> | ||
573 | </reg> | ||
574 | <reg name="IADDR_BS1" desc=""> | ||
575 | <addr name="IADDR_BS1" addr="0x54"/> | ||
576 | </reg> | ||
577 | <reg name="CSCNT0" desc=""> | ||
578 | <addr name="CSCNT0" addr="0x58"/> | ||
579 | </reg> | ||
580 | <reg name="CPNCNTD0" desc=""> | ||
581 | <addr name="CPNCNTD0" addr="0x5c"/> | ||
582 | </reg> | ||
583 | <reg name="CADDR_BS0" desc=""> | ||
584 | <addr name="CADDR_BS0" addr="0x60"/> | ||
585 | </reg> | ||
586 | <reg name="CSCNT1" desc=""> | ||
587 | <addr name="CSCNT1" addr="0x64"/> | ||
588 | </reg> | ||
589 | <reg name="CPNCNTD1" desc=""> | ||
590 | <addr name="CPNCNTD1" addr="0x68"/> | ||
591 | </reg> | ||
592 | <reg name="CADDR_BS1" desc=""> | ||
593 | <addr name="CADDR_BS1" addr="0x6c"/> | ||
594 | </reg> | ||
595 | <reg name="PACNT0" desc=""> | ||
596 | <addr name="PACNT0" addr="0x70"/> | ||
597 | </reg> | ||
598 | <reg name="PACNT1" desc=""> | ||
599 | <addr name="PACNT1" addr="0x74"/> | ||
600 | </reg> | ||
123 | </dev> | 601 | </dev> |
124 | <dev name="RTC" long_name="Real time clock" desc="Real time clock" version="1.0"> | 602 | <dev name="HSADC" long_name="High Speed ADC" desc="High Speed ADC" version="1.0"> |
125 | <addr name="RTC" addr="0x18014000" /> | 603 | <addr name="HSADC" addr="0x186ec000"/> |
126 | <reg name="TIME" addr="0x00"></reg> | 604 | <reg name="DATA" desc=""> |
127 | <reg name="DATE" addr="0x04"></reg> | 605 | <addr name="DATA" addr="0x0"/> |
128 | <reg name="TALARM" addr="0x08"></reg> | 606 | </reg> |
129 | <reg name="DALARM" addr="0x0c"></reg> | 607 | <reg name="CTRL" desc=""> |
130 | <reg name="CTRL" addr="0x10"></reg> | 608 | <addr name="CTRL" addr="0x4"/> |
131 | <reg name="RESET" addr="0x14"></reg> | 609 | </reg> |
132 | <reg name="PWOFF" addr="0x18"></reg> | 610 | <reg name="IER" desc=""> |
133 | <reg name="PWFAIL" addr="0x1c"></reg> | 611 | <addr name="IER" addr="0x8"/> |
612 | </reg> | ||
613 | <reg name="ISR" desc=""> | ||
614 | <addr name="ISR" addr="0xc"/> | ||
615 | </reg> | ||
134 | </dev> | 616 | </dev> |
135 | <dev name="SPI" long_name="Serial peripherial interface" desc="Serial peripherial interface" version="1.0"> | 617 | <dev name="I2C" long_name="I2C controller" desc="I2C controller" version="1.0"> |
136 | <addr name="SPI" addr="0x18018000" /> | 618 | <addr name="I2C" addr="0x18020000"/> |
137 | <reg name="TXR" addr="0x00"></reg> | 619 | <reg name="MTXR" desc=""> |
138 | <reg name="RXR" addr="0x00"></reg> | 620 | <addr name="MTXR" addr="0x0"/> |
139 | <reg name="IER" addr="0x04"></reg> | 621 | </reg> |
140 | <reg name="FCR" addr="0x08"></reg> | 622 | <reg name="MRXR" desc=""> |
141 | <reg name="FWCR" addr="0x0c"></reg> | 623 | <addr name="MRXR" addr="0x4"/> |
142 | <reg name="DLYCR" addr="0x10"></reg> | 624 | </reg> |
143 | <reg name="TXCR" addr="0x14"></reg> | 625 | <reg name="STXR" desc=""> |
144 | <reg name="RXCR" addr="0x18"></reg> | 626 | <addr name="STXR" addr="0x8"/> |
145 | <reg name="SSCR" addr="0x1c"></reg> | 627 | </reg> |
146 | <reg name="ISR" addr="0x20"></reg> | 628 | <reg name="SRXR" desc=""> |
629 | <addr name="SRXR" addr="0xc"/> | ||
630 | </reg> | ||
631 | <reg name="SADDR" desc=""> | ||
632 | <addr name="SADDR" addr="0x10"/> | ||
633 | </reg> | ||
634 | <reg name="IER" desc=""> | ||
635 | <addr name="IER" addr="0x14"/> | ||
636 | </reg> | ||
637 | <reg name="ISR" desc=""> | ||
638 | <addr name="ISR" addr="0x18"/> | ||
639 | </reg> | ||
640 | <reg name="LCMR" desc=""> | ||
641 | <addr name="LCMR" addr="0x1c"/> | ||
642 | </reg> | ||
643 | <reg name="LSR" desc=""> | ||
644 | <addr name="LSR" addr="0x20"/> | ||
645 | </reg> | ||
646 | <reg name="CONR" desc=""> | ||
647 | <addr name="CONR" addr="0x24"/> | ||
648 | </reg> | ||
649 | <reg name="OPR" desc=""> | ||
650 | <addr name="OPR" addr="0x28"/> | ||
651 | </reg> | ||
147 | </dev> | 652 | </dev> |
148 | <dev name="SCU" long_name="System control unit" desc="System control unit" version="1.0"> | 653 | <dev name="I2S" long_name="I2S controller" desc="I2S controller" version="1.0"> |
149 | <addr name="SCU" addr="0x1801c000" /> | 654 | <addr name="I2S" addr="0x18028000"/> |
150 | <reg name="ID" addr="0x00"> | 655 | <reg name="OPR" desc=""> |
151 | <field name="SOC_ID" bitrange="31:0"> | 656 | <addr name="OPR" addr="0x0"/> |
152 | <value name="REVISION_A" value="0xa1000604" /> | 657 | </reg> |
153 | <value name="REVISION_B" value="0xa100027b" /> | 658 | <reg name="TXR" desc=""> |
154 | </field> | 659 | <addr name="TXR" addr="0x4"/> |
155 | </reg> | 660 | </reg> |
156 | <reg name="REMAP" addr="0x04"> | 661 | <reg name="RXR" desc=""> |
157 | <field name="MEM_REMAP" bitrange="31:0"> | 662 | <addr name="RXR" addr="0x8"/> |
158 | <value name="IRAM_0x000000" value="0xdeadbeef" /> | 663 | </reg> |
159 | <value name="ROM_0x000000" value="0x00000000" /> | 664 | <reg name="TXCTL" desc=""> |
160 | </field> | 665 | <addr name="TXCTL" addr="0xc"/> |
161 | </reg> | 666 | </reg> |
162 | <reg name="PLLCON1" addr="0x08"> | 667 | <reg name="RXCTL" desc=""> |
163 | <field name="ARM_PLL_TEST_CONTROL" bitrange="25:25"> | 668 | <addr name="RXCTL" addr="0x10"/> |
164 | <value name="TEST" value="0x01" /> | 669 | </reg> |
165 | <value name="NORMAL" value="0x00" /> | 670 | <reg name="FIFOSTS" desc=""> |
166 | </field> | 671 | <addr name="FIFOSTS" addr="0x14"/> |
167 | <field name="ARM_PLL_SATURATION" bitrange="24:24"> | 672 | </reg> |
168 | <value name="ENABLE" value="0x01" /> | 673 | <reg name="IER" desc=""> |
169 | <value name="DISABLE" value="0x00" /> | 674 | <addr name="IER" addr="0x18"/> |
170 | </field> | 675 | </reg> |
171 | <field name="ARM_PLL_FAST_LOCK" bitrange="23:23"> | 676 | <reg name="ISR" desc=""> |
172 | <value name="ENABLE" value="0x01" /> | 677 | <addr name="ISR" addr="0x1c"/> |
173 | <value name="DISABLE" value="0x00" /> | 678 | </reg> |
174 | </field> | 679 | </dev> |
175 | <field name="ARM_PLL_POWERDOWN" bitrange="22:22"> | 680 | <dev name="INTC" long_name="Interrupt controller" desc="Interrupt controller" version="1.0"> |
176 | <value name="PLL_OFF" value="0x01" /> | 681 | <addr name="INTC" addr="0x18080000"/> |
177 | <value name="PLL_ON" value="0x00" /> | 682 | <reg name="INTC_SCRn" desc=""> |
178 | </field> | 683 | <formula string="n*0x04"/> |
179 | <field name="ARM_PLL_CLKR" bitrange="21:16"></field> | 684 | <addr name="SCR0" addr="0x0"/> |
180 | <field name="ARM_PLL_CLKF" bitrange="15:4"></field> | 685 | <addr name="SCR1" addr="0x4"/> |
181 | <field name="ARM_PLL_CLKOD" bitrange="3:1"></field> | 686 | <addr name="SCR2" addr="0x8"/> |
182 | <field name="ARM_PLL_BYPASS" bitrange="0:0"> | 687 | <addr name="SCR3" addr="0xc"/> |
183 | <value name="ENABLE" value="0x01" /> | 688 | <addr name="SCR4" addr="0x10"/> |
184 | <value name="DISABLE" value="0x00" /> | 689 | <addr name="SCR5" addr="0x14"/> |
185 | </field> | 690 | <addr name="SCR6" addr="0x18"/> |
186 | </reg> | 691 | <addr name="SCR7" addr="0x1c"/> |
187 | <reg name="PLLCON2" addr="0x0c"> | 692 | <addr name="SCR8" addr="0x20"/> |
188 | <field name="DSP_PLL_TEST_CONTROL" bitrange="25:25"> | 693 | <addr name="SCR9" addr="0x24"/> |
189 | <value name="TEST" value="0x01" /> | 694 | <addr name="SCR10" addr="0x28"/> |
190 | <value name="NORMAL" value="0x00" /> | 695 | <addr name="SCR11" addr="0x2c"/> |
191 | </field> | 696 | <addr name="SCR12" addr="0x30"/> |
192 | <field name="DSP_PLL_SATURATION" bitrange="24:24"> | 697 | <addr name="SCR13" addr="0x34"/> |
193 | <value name="ENABLE" value="0x01" /> | 698 | <addr name="SCR14" addr="0x38"/> |
194 | <value name="DISABLE" value="0x00" /> | 699 | <addr name="SCR15" addr="0x3c"/> |
195 | </field> | 700 | <addr name="SCR16" addr="0x40"/> |
196 | <field name="DSP_PLL_FAST_LOCK" bitrange="23:23"> | 701 | <addr name="SCR17" addr="0x44"/> |
197 | <value name="ENABLE" value="0x01" /> | 702 | <addr name="SCR18" addr="0x48"/> |
198 | <value name="DISABLE" value="0x00" /> | 703 | <addr name="SCR19" addr="0x4c"/> |
199 | </field> | 704 | <addr name="SCR20" addr="0x50"/> |
200 | <field name="DSP_PLL_POWERDOWN" bitrange="22:22"> | 705 | <addr name="SCR21" addr="0x54"/> |
201 | <value name="PLL_OFF" value="0x01" /> | 706 | <addr name="SCR22" addr="0x58"/> |
202 | <value name="PLL_ON" value="0x00" /> | 707 | <addr name="SCR23" addr="0x5c"/> |
203 | </field> | 708 | <addr name="SCR24" addr="0x60"/> |
204 | <field name="DSP_PLL_CLKR" bitrange="21:16"></field> | 709 | <addr name="SCR25" addr="0x64"/> |
205 | <field name="DSP_PLL_CLKF" bitrange="15:4"></field> | 710 | <addr name="SCR26" addr="0x68"/> |
206 | <field name="DSP_PLL_CLKOD" bitrange="3:1"></field> | 711 | <addr name="SCR27" addr="0x6c"/> |
207 | <field name="DSP_PLL_BYPASS" bitrange="0:0"> | 712 | <addr name="SCR28" addr="0x70"/> |
208 | <value name="ENABLE" value="0x01" /> | 713 | <addr name="SCR29" addr="0x74"/> |
209 | <value name="DISABLE" value="0x00" /> | 714 | <addr name="SCR30" addr="0x78"/> |
210 | </field> | 715 | <addr name="SCR31" addr="0x7c"/> |
211 | </reg> | 716 | </reg> |
212 | <reg name="PLLCON3" addr="0x10"> | 717 | <reg name="ISR" desc=""> |
213 | <field name="CODEC_PLL_TEST_CONTROL" bitrange="25:25"> | 718 | <addr name="ISR" addr="0x104"/> |
214 | <value name="TEST" value="0x01" /> | 719 | </reg> |
215 | <value name="NORMAL" value="0x00" /> | 720 | <reg name="IPR" desc=""> |
216 | </field> | 721 | <addr name="IPR" addr="0x108"/> |
217 | <field name="CODEC_PLL_SATURATION" bitrange="24:24"> | 722 | </reg> |
218 | <value name="ENABLE" value="0x01" /> | 723 | <reg name="IMR" desc=""> |
219 | <value name="DISABLE" value="0x00" /> | 724 | <addr name="IMR" addr="0x10c"/> |
220 | </field> | 725 | </reg> |
221 | <field name="CODEC_PLL_FAST_LOCK" bitrange="23:23"> | 726 | <reg name="IECR" desc=""> |
222 | <value name="ENABLE" value="0x01" /> | 727 | <addr name="IECR" addr="0x114"/> |
223 | <value name="DISABLE" value="0x00" /> | 728 | </reg> |
224 | </field> | 729 | <reg name="ICCR" desc=""> |
225 | <field name="CODEC_PLL_POWERDOWN" bitrange="22:22"> | 730 | <addr name="ICCR" addr="0x118"/> |
226 | <value name="PLL_OFF" value="0x01" /> | 731 | </reg> |
227 | <value name="PLL_ON" value="0x00" /> | 732 | <reg name="ISCR" desc=""> |
228 | </field> | 733 | <addr name="ISCR" addr="0x11c"/> |
229 | <field name="CODEC_PLL_CLKR" bitrange="21:16"></field> | 734 | </reg> |
230 | <field name="CODEC_PLL_CLKF" bitrange="15:4"></field> | 735 | <reg name="TEST" desc=""> |
231 | <field name="CODEC_PLL_CLKOD" bitrange="3:1"></field> | 736 | <addr name="TEST" addr="0x124"/> |
232 | <field name="CODEC_PLL_BYPASS" bitrange="0:0"> | 737 | </reg> |
233 | <value name="ENABLE" value="0x01" /> | 738 | </dev> |
234 | <value name="DISABLE" value="0x00" /> | 739 | <dev name="LCDC" long_name="LCD Interface Controller" desc="LCD Interface Controller" version="1.0"> |
235 | </field> | 740 | <addr name="LCDC" addr="0x186e8000"/> |
236 | </reg> | 741 | <reg name="LCDC_CTRL" desc=""> |
237 | <reg name="DIVCON1" addr="0x14"> | 742 | <addr name="LCDC_CTRL" addr="0x0"/> |
238 | <field name="USB_PHY_CLK" bitrange="31:31"> | 743 | <field name="RESERVED" desc="" bitrange="15:14"/> |
239 | <value name="12MHz" value="0x01" /> | 744 | <field name="ALPHA_24B" desc="" bitrange="13:13"/> |
240 | <value name="24MHz" value="0x00" /> | 745 | <field name="UVBUFEXCH" desc="" bitrange="12:12"/> |
241 | </field> | 746 | <field name="ALPHA" desc="" bitrange="11:9"/> |
242 | <field name="VIP_SENSOR_CLK" bitrange="30:29"> | 747 | <field name="YMIX" desc="" bitrange="8:8"/> |
243 | <value name="27MHz" value="0x02" /> | 748 | <field name="MCU" desc="" bitrange="7:7"/> |
244 | <value name="48MHz" value="0x01" /> | 749 | <field name="RGB24B" desc="" bitrange="6:6"/> |
245 | <value name="24MHz" value="0x00" /> | 750 | <field name="START_EVEN" desc="" bitrange="5:5"/> |
246 | </field> | 751 | <field name="EVEN_EN" desc="" bitrange="4:4"/> |
247 | <field name="LCDC_CLK" bitrange="28:28"> | 752 | <field name="RGB_DUMMY" desc="" bitrange="3:2"> |
248 | <value name="LCDC_CLK_DIV_OUT" value="0x01" /> | 753 | <value name="PARALLEL" value="0x0" desc=""/> |
249 | <value name="EXT_SOC_27MHz" value="0x00" /> | 754 | <value name="RESERVED" value="0x1" desc=""/> |
250 | </field> | 755 | <value name="SERIAL_UPS501" value="0x2" desc=""/> |
251 | <field name="LCDC_CLK_DIV" bitrange="27:20"></field> | 756 | <value name="SERIAL_UPS502" value="0x3" desc=""/> |
252 | <field name="LCDC_CLK_DIV_SRC" bitrange="19:18"> | ||
253 | <value name="CODEC_PLL" value="0x02" /> | ||
254 | <value name="DSP_PLL" value="0x01" /> | ||
255 | <value name="ARM_PLL" value="0x00" /> | ||
256 | </field> | ||
257 | <field name="LSADC_CLK_DIV" bitrange="17:10"></field> | ||
258 | <field name="CODEC_CLK_SRC" bitrange="9:9"> | ||
259 | <value name="12MHz_OSC" value="0x01" /> | ||
260 | <value name="CODEC_CLK_DIV_OUT" value="0x00" /> | ||
261 | </field> | ||
262 | <field name="CODEC_CLK_DIV" bitrange="8:5"></field> | ||
263 | <field name="PCLK_CLK_DIV" bitrange="4:3"> | ||
264 | <value name="HCLK/PCLK_4:1" value="0x02" /> | ||
265 | <value name="HCLK/PCLK_2:1" value="0x01" /> | ||
266 | <value name="HCLK/PCLK_1:1" value="0x00" /> | ||
267 | </field> | ||
268 | <field name="ARM_CLK_DIV" bitrange="2:2"> | ||
269 | <value name="ARMPLL/ARMCLK_2:1" value="0x01" /> | ||
270 | <value name="ARMPLL/ARMCLK_1:1" value="0x00" /> | ||
271 | </field> | ||
272 | <field name="DSP_SLOW_MODE" bitrange="1:1"> | ||
273 | <value name="ENABLE" value="0x01" /> | ||
274 | <value name="DISABLE" value="0x00" /> | ||
275 | </field> | ||
276 | <field name="ARM_SLOW_MODE" bitrange="0:0"> | ||
277 | <value name="ENABLE" value="0x01" /> | ||
278 | <value name="DISABLE" value="0x00" /> | ||
279 | </field> | ||
280 | </reg> | ||
281 | <reg name="CLKCFG" addr="0x18"> | ||
282 | <field name="WDT_PCLK" bitrange="31:31"> | ||
283 | <value name="GATE" value="0x01" /> | ||
284 | <value name="UNGATE" value="0x00" /> | ||
285 | </field> | ||
286 | <field name="RTC_PCLK" bitrange="30:30"> | ||
287 | <value name="GATE" value="0x01" /> | ||
288 | <value name="UNGATE" value="0x00" /> | ||
289 | </field> | ||
290 | <field name="PWM_PCLK" bitrange="29:29"> | ||
291 | <value name="GATE" value="0x01" /> | ||
292 | <value name="UNGATE" value="0x00" /> | ||
293 | </field> | ||
294 | <field name="TIMER_PCLK" bitrange="28:28"> | ||
295 | <value name="GATE" value="0x01" /> | ||
296 | <value name="UNGATE" value="0x00" /> | ||
297 | </field> | ||
298 | <field name="GPIO_PCLK" bitrange="27:27"> | ||
299 | <value name="GATE" value="0x01" /> | ||
300 | <value name="UNGATE" value="0x00" /> | ||
301 | </field> | ||
302 | <field name="HSADC_PCLK" bitrange="26:26"> | ||
303 | <value name="GATE" value="0x01" /> | ||
304 | <value name="UNGATE" value="0x00" /> | ||
305 | </field> | ||
306 | <field name="HSADC_HCLK" bitrange="25:25"> | ||
307 | <value name="GATE" value="0x01" /> | ||
308 | <value name="UNGATE" value="0x00" /> | ||
309 | </field> | ||
310 | <field name="LSADC_CLK" bitrange="24:24"> | ||
311 | <value name="GATE" value="0x01" /> | ||
312 | <value name="UNGATE" value="0x00" /> | ||
313 | </field> | ||
314 | <field name="LSADC_PCLK" bitrange="23:23"> | ||
315 | <value name="GATE" value="0x01" /> | ||
316 | <value name="UNGATE" value="0x00" /> | ||
317 | </field> | ||
318 | <field name="SD_CLK" bitrange="22:22"> | ||
319 | <value name="GATE" value="0x01" /> | ||
320 | <value name="UNGATE" value="0x00" /> | ||
321 | </field> | ||
322 | <field name="SPI_CLK" bitrange="21:21"> | ||
323 | <value name="GATE" value="0x01" /> | ||
324 | <value name="UNGATE" value="0x00" /> | ||
325 | </field> | ||
326 | <field name="I2C_CLK" bitrange="20:20"> | ||
327 | <value name="GATE" value="0x01" /> | ||
328 | <value name="UNGATE" value="0x00" /> | ||
329 | </field> | ||
330 | <field name="UART1_CLK" bitrange="19:19"> | ||
331 | <value name="GATE" value="0x01" /> | ||
332 | <value name="UNGATE" value="0x00" /> | ||
333 | </field> | ||
334 | <field name="UART0_CLK" bitrange="18:18"> | ||
335 | <value name="GATE" value="0x01" /> | ||
336 | <value name="UNGATE" value="0x00" /> | ||
337 | </field> | ||
338 | <field name="I2S_PCLK" bitrange="17:17"> | ||
339 | <value name="GATE" value="0x01" /> | ||
340 | <value name="UNGATE" value="0x00" /> | ||
341 | </field> | ||
342 | <field name="I2S_CLK" bitrange="16:16"> | ||
343 | <value name="GATE" value="0x01" /> | ||
344 | <value name="UNGATE" value="0x00" /> | ||
345 | </field> | ||
346 | <field name="VIP_CLK" bitrange="15:15"> | ||
347 | <value name="GATE" value="0x01" /> | ||
348 | <value name="UNGATE" value="0x00" /> | ||
349 | </field> | ||
350 | <field name="VIP_HCLK" bitrange="14:14"> | ||
351 | <value name="GATE" value="0x01" /> | ||
352 | <value name="UNGATE" value="0x00" /> | ||
353 | </field> | ||
354 | <field name="LCDC_CLK" bitrange="13:13"> | ||
355 | <value name="GATE" value="0x01" /> | ||
356 | <value name="UNGATE" value="0x00" /> | ||
357 | </field> | ||
358 | <field name="LCDC_HCLK" bitrange="12:12"> | ||
359 | <value name="GATE" value="0x01" /> | ||
360 | <value name="UNGATE" value="0x00" /> | ||
361 | </field> | ||
362 | <field name="IRAM_HCLK" bitrange="11:11"> | ||
363 | <value name="GATE" value="0x01" /> | ||
364 | <value name="UNGATE" value="0x00" /> | ||
365 | </field> | ||
366 | <field name="A2A_HCLK" bitrange="10:10"> | ||
367 | <value name="GATE" value="0x01" /> | ||
368 | <value name="UNGATE" value="0x00" /> | ||
369 | </field> | ||
370 | <field name="NANDC_HCLK" bitrange="9:9"> | ||
371 | <value name="GATE" value="0x01" /> | ||
372 | <value name="UNGATE" value="0x00" /> | ||
373 | </field> | ||
374 | <field name="UDC_CLK" bitrange="6:6"> | ||
375 | <value name="GATE" value="0x01" /> | ||
376 | <value name="UNGATE" value="0x00" /> | ||
377 | </field> | ||
378 | <field name="UHC_CLK" bitrange="5:5"> | ||
379 | <value name="GATE" value="0x01" /> | ||
380 | <value name="UNGATE" value="0x00" /> | ||
381 | </field> | ||
382 | <field name="DWDMA_CLK" bitrange="4:4"> | ||
383 | <value name="GATE" value="0x01" /> | ||
384 | <value name="UNGATE" value="0x00" /> | ||
385 | </field> | ||
386 | <field name="HDMA_CLK" bitrange="3:3"> | ||
387 | <value name="GATE" value="0x01" /> | ||
388 | <value name="UNGATE" value="0x00" /> | ||
389 | </field> | ||
390 | <field name="SDRAM_HCLK" bitrange="2:2"> | ||
391 | <value name="GATE" value="0x01" /> | ||
392 | <value name="UNGATE" value="0x00" /> | ||
393 | </field> | ||
394 | <field name="DSP_CLK" bitrange="1:1"> | ||
395 | <value name="GATE" value="0x01" /> | ||
396 | <value name="UNGATE" value="0x00" /> | ||
397 | </field> | ||
398 | <field name="OTP_CLK" bitrange="0:0"> | ||
399 | <value name="GATE" value="0x01" /> | ||
400 | <value name="UNGATE" value="0x00" /> | ||
401 | </field> | ||
402 | </reg> | ||
403 | <reg name="RSTCFG" addr="0x1c"> | ||
404 | <field name="ARM_RST" bitrange="12:12"> | ||
405 | <value name="ASSERT" value="0x01" /> | ||
406 | <value name="DEASSERT" value="0x00" /> | ||
407 | </field> | ||
408 | <field name="DUALCORE_ECT_RST" bitrange="11:11"> | ||
409 | <value name="ASSERT" value="0x01" /> | ||
410 | <value name="DEASSERT" value="0x00" /> | ||
411 | </field> | ||
412 | <field name="DUALCORE_MAILBOX_RST" bitrange="10:10"> | ||
413 | <value name="ASSERT" value="0x01" /> | ||
414 | <value name="DEASSERT" value="0x00" /> | ||
415 | </field> | ||
416 | <field name="SD_RST" bitrange="9:9"> | ||
417 | <value name="ASSERT" value="0x01" /> | ||
418 | <value name="DEASSERT" value="0x00" /> | ||
419 | </field> | ||
420 | <field name="HSADC_RST" bitrange="8:8"> | ||
421 | <value name="ASSERT" value="0x01" /> | ||
422 | <value name="DEASSERT" value="0x00" /> | ||
423 | </field> | ||
424 | <field name="LSADC_RST" bitrange="7:7"> | ||
425 | <value name="ASSERT" value="0x01" /> | ||
426 | <value name="DEASSERT" value="0x00" /> | ||
427 | </field> | ||
428 | <field name="CODEC_RST" bitrange="6:6"> | ||
429 | <value name="ASSERT" value="0x01" /> | ||
430 | <value name="DEASSERT" value="0x00" /> | ||
431 | </field> | ||
432 | <field name="DSP_PERIPHERAL_RST" bitrange="5:5"> | ||
433 | <value name="ASSERT" value="0x01" /> | ||
434 | <value name="DEASSERT" value="0x00" /> | ||
435 | </field> | ||
436 | <field name="DSP_CORE_RST" bitrange="4:4"> | ||
437 | <value name="ASSERT" value="0x01" /> | ||
438 | <value name="DEASSERT" value="0x00" /> | ||
439 | </field> | ||
440 | <field name="VIP_RST" bitrange="3:3"> | ||
441 | <value name="ASSERT" value="0x01" /> | ||
442 | <value name="DEASSERT" value="0x00" /> | ||
443 | </field> | ||
444 | <field name="LCDC_RST" bitrange="2:2"> | ||
445 | <value name="ASSERT" value="0x01" /> | ||
446 | <value name="DEASSERT" value="0x00" /> | ||
447 | </field> | ||
448 | <field name="UDC_RST" bitrange="1:1"> | ||
449 | <value name="ASSERT" value="0x01" /> | ||
450 | <value name="DEASSERT" value="0x00" /> | ||
451 | </field> | ||
452 | <field name="UHC_RST" bitrange="0:0"> | ||
453 | <value name="ASSERT" value="0x01" /> | ||
454 | <value name="DEASSERT" value="0x00" /> | ||
455 | </field> | ||
456 | </reg> | ||
457 | <reg name="PWM" addr="0x20"> | ||
458 | <field name="PLL_LOCK_PERIOD" bitrange="31:16"></field> | ||
459 | <field name="EXT_WAKEUP_PIN_POLARITY" bitrange="6:6"> | ||
460 | <value name="NEGATIVE" value="0x01" /> | ||
461 | <value name="POSITIVE" value="0x00" /> | ||
462 | </field> | ||
463 | <field name="RTC_ALARM_WAKEUP" bitrange="5:5"> | ||
464 | <value name="DISABLE" value="0x01" /> | ||
465 | <value name="ENABLE" value="0x00" /> | ||
466 | </field> | ||
467 | <field name="EXT_WAKEUP" bitrange="4:4"> | ||
468 | <value name="DISABLE" value="0x01" /> | ||
469 | <value name="ENABLE" value="0x00" /> | ||
470 | </field> | ||
471 | <field name="SCU_IRQ_CLEAR" bitrange="3:3"> | ||
472 | <value name="CLEAR" value="0x01" /> | ||
473 | <value name="PENDING" value="0x00" /> | ||
474 | </field> | ||
475 | <field name="POWERMANAGEMENT_MODE" bitrange="2:0"> | ||
476 | <value name="STOP" value="0x08" /> | ||
477 | <value name="NORMAL" value="0x00" /> | ||
478 | </field> | 757 | </field> |
758 | <field name="ENABLE" desc="" bitrange="1:1"> | ||
759 | <value name="DISABLE" value="0x0" desc=""/> | ||
760 | <value name="ENABLE" value="0x1" desc=""/> | ||
761 | </field> | ||
762 | <field name="STOP" desc="" bitrange="0:0"/> | ||
763 | </reg> | ||
764 | <reg name="MCU_CTRL" desc=""> | ||
765 | <addr name="MCU_CTRL" addr="0x4"/> | ||
766 | <field name="RESERVED2" desc="" bitrange="15:15"/> | ||
767 | <field name="ALPHA_BASE" desc="" bitrange="14:8"/> | ||
768 | <field name="RESERVED1" desc="" bitrange="7:7"/> | ||
769 | <field name="ALPHA_BUF_EN" desc="" bitrange="6:6"/> | ||
770 | <field name="LCD_RS" desc="" bitrange="5:5"/> | ||
771 | <field name="RESERVED0" desc="" bitrange="4:2"/> | ||
772 | <field name="BUFF_START" desc="" bitrange="1:1"/> | ||
773 | <field name="BYPASS" desc="" bitrange="0:0"/> | ||
774 | </reg> | ||
775 | <reg name="HOR_PERIOD" desc=""> | ||
776 | <addr name="HOR_PERIOD" addr="0x8"/> | ||
777 | </reg> | ||
778 | <reg name="VERT_PERIOD" desc=""> | ||
779 | <addr name="VERT_PERIOD" addr="0xc"/> | ||
780 | </reg> | ||
781 | <reg name="HOR_PW" desc=""> | ||
782 | <addr name="HOR_PW" addr="0x10"/> | ||
783 | </reg> | ||
784 | <reg name="VERT_PW" desc=""> | ||
785 | <addr name="VERT_PW" addr="0x14"/> | ||
786 | </reg> | ||
787 | <reg name="HOR_BP" desc=""> | ||
788 | <addr name="HOR_BP" addr="0x18"/> | ||
789 | </reg> | ||
790 | <reg name="VERT_BP" desc=""> | ||
791 | <addr name="VERT_BP" addr="0x1c"/> | ||
792 | </reg> | ||
793 | <reg name="HOR_ACT" desc=""> | ||
794 | <addr name="HOR_ACT" addr="0x20"/> | ||
795 | </reg> | ||
796 | <reg name="VERT_ACT" desc=""> | ||
797 | <addr name="VERT_ACT" addr="0x24"/> | ||
798 | </reg> | ||
799 | <reg name="LINE0_YADDR" desc=""> | ||
800 | <addr name="LINE0_YADDR" addr="0x28"/> | ||
801 | </reg> | ||
802 | <reg name="LINE0_UVADDR" desc=""> | ||
803 | <addr name="LINE0_UVADDR" addr="0x2c"/> | ||
804 | </reg> | ||
805 | <reg name="LINE1_YADDR" desc=""> | ||
806 | <addr name="LINE1_YADDR" addr="0x30"/> | ||
807 | </reg> | ||
808 | <reg name="LINE1_UVADDR" desc=""> | ||
809 | <addr name="LINE1_UVADDR" addr="0x34"/> | ||
810 | </reg> | ||
811 | <reg name="LINE2_YADDR" desc=""> | ||
812 | <addr name="LINE2_YADDR" addr="0x38"/> | ||
813 | </reg> | ||
814 | <reg name="LINE2_UVADDR" desc=""> | ||
815 | <addr name="LINE2_UVADDR" addr="0x3c"/> | ||
816 | </reg> | ||
817 | <reg name="LINE3_YADDR" desc=""> | ||
818 | <addr name="LINE3_YADDR" addr="0x40"/> | ||
819 | </reg> | ||
820 | <reg name="LINE3_UVADDR" desc=""> | ||
821 | <addr name="LINE3_UVADDR" addr="0x44"/> | ||
822 | </reg> | ||
823 | <reg name="START_X" desc=""> | ||
824 | <addr name="START_X" addr="0x48"/> | ||
825 | </reg> | ||
826 | <reg name="START_Y" desc=""> | ||
827 | <addr name="START_Y" addr="0x4c"/> | ||
828 | </reg> | ||
829 | <reg name="DELTA_X" desc=""> | ||
830 | <addr name="DELTA_X" addr="0x50"/> | ||
831 | </reg> | ||
832 | <reg name="DELTA_Y" desc=""> | ||
833 | <addr name="DELTA_Y" addr="0x54"/> | ||
834 | </reg> | ||
835 | <reg name="LCDC_INTR_MASK" desc=""> | ||
836 | <addr name="LCDC_INTR_MASK" addr="0x58"/> | ||
837 | </reg> | ||
838 | <reg name="ALPHA_ALX" desc=""> | ||
839 | <addr name="ALPHA_ALX" addr="0x5c"/> | ||
840 | </reg> | ||
841 | <reg name="ALPHA_ATY" desc=""> | ||
842 | <addr name="ALPHA_ATY" addr="0x60"/> | ||
843 | </reg> | ||
844 | <reg name="ALPHA_ARX" desc=""> | ||
845 | <addr name="ALPHA_ARX" addr="0x64"/> | ||
846 | </reg> | ||
847 | <reg name="ALPHA_ABY" desc=""> | ||
848 | <addr name="ALPHA_ABY" addr="0x68"/> | ||
849 | </reg> | ||
850 | <reg name="ALPHA_BLX" desc=""> | ||
851 | <addr name="ALPHA_BLX" addr="0x6c"/> | ||
852 | </reg> | ||
853 | <reg name="ALPHA_BTY" desc=""> | ||
854 | <addr name="ALPHA_BTY" addr="0x70"/> | ||
855 | </reg> | ||
856 | <reg name="ALPHA_BRX" desc=""> | ||
857 | <addr name="ALPHA_BRX" addr="0x74"/> | ||
858 | </reg> | ||
859 | <reg name="ALPHA_BBY" desc=""> | ||
860 | <addr name="ALPHA_BBY" addr="0x78"/> | ||
861 | </reg> | ||
862 | <reg name="LCDC_STA" desc=""> | ||
863 | <addr name="LCDC_STA" addr="0x7c"/> | ||
864 | </reg> | ||
865 | <reg name="LCD_COMMAND" desc=""> | ||
866 | <addr name="LCD_COMMAND" addr="0x1000"/> | ||
867 | </reg> | ||
868 | <reg name="LCD_DATA" desc=""> | ||
869 | <addr name="LCD_DATA" addr="0x1004"/> | ||
870 | </reg> | ||
871 | <reg name="LCD_BUFF" desc=""> | ||
872 | <addr name="LCD_BUFF" addr="0x2000"/> | ||
873 | </reg> | ||
874 | </dev> | ||
875 | <dev name="MAILBOX" long_name="CPU-DSP mailbox" desc="CPU-DSP mailbox" version="1.0"> | ||
876 | <addr name="MAILBOX" addr="0x18088000"/> | ||
877 | <reg name="MAILBOX_ID" desc=""> | ||
878 | <addr name="MAILBOX_ID" addr="0x0"/> | ||
879 | </reg> | ||
880 | <reg name="H2C_STA" desc=""> | ||
881 | <addr name="H2C_STA" addr="0x10"/> | ||
882 | </reg> | ||
883 | <reg name="H2Cn_DATA" desc=""> | ||
884 | <formula string="n*0x08 + 0x20"/> | ||
885 | <addr name="H2C0_DATA" addr="0x20"/> | ||
886 | <addr name="H2C1_DATA" addr="0x28"/> | ||
887 | <addr name="H2C2_DATA" addr="0x30"/> | ||
888 | <addr name="H2C3_DATA" addr="0x38"/> | ||
889 | </reg> | ||
890 | <reg name="H2Cn_CMD" desc=""> | ||
891 | <formula string="n*0x08 + 0x24"/> | ||
892 | <addr name="H2C0_CMD" addr="0x24"/> | ||
893 | <addr name="H2C1_CMD" addr="0x2c"/> | ||
894 | <addr name="H2C2_CMD" addr="0x34"/> | ||
895 | <addr name="H2C3_CMD" addr="0x3c"/> | ||
896 | </reg> | ||
897 | <reg name="C2H_STA" desc=""> | ||
898 | <addr name="C2H_STA" addr="0x40"/> | ||
899 | </reg> | ||
900 | <reg name="C2Hn_DATA" desc=""> | ||
901 | <formula string="n*0x08 + 0x50"/> | ||
902 | <addr name="C2H0_DATA" addr="0x50"/> | ||
903 | <addr name="C2H1_DATA" addr="0x58"/> | ||
904 | <addr name="C2H2_DATA" addr="0x60"/> | ||
905 | <addr name="C2H3_DATA" addr="0x68"/> | ||
906 | </reg> | ||
907 | <reg name="C2Hn_CMD" desc=""> | ||
908 | <formula string="n*0x08 + 0x54"/> | ||
909 | <addr name="C2H0_CMD" addr="0x54"/> | ||
910 | <addr name="C2H1_CMD" addr="0x5c"/> | ||
911 | <addr name="C2H2_CMD" addr="0x64"/> | ||
912 | <addr name="C2H3_CMD" addr="0x6c"/> | ||
913 | </reg> | ||
914 | </dev> | ||
915 | <dev name="NANDC" long_name="NAND Flash Controller" desc="NAND Flash Controller" version="1.0"> | ||
916 | <addr name="NANDC" addr="0x180e8000"/> | ||
917 | <reg name="FMCTL" desc=""> | ||
918 | <addr name="FMCTL" addr="0x0"/> | ||
919 | </reg> | ||
920 | <reg name="FMWAIT" desc=""> | ||
921 | <addr name="FMWAIT" addr="0x4"/> | ||
922 | </reg> | ||
923 | <reg name="FLCTL" desc=""> | ||
924 | <addr name="FLCTL" addr="0x8"/> | ||
925 | </reg> | ||
926 | <reg name="BCHCTL" desc=""> | ||
927 | <addr name="BCHCTL" addr="0xc"/> | ||
928 | </reg> | ||
929 | <reg name="BCHST" desc=""> | ||
930 | <addr name="BCHST" addr="0xd0"/> | ||
931 | </reg> | ||
932 | <reg name="FLASH_DATAn" desc=""> | ||
933 | <formula string="0x200*n+0x200"/> | ||
934 | <addr name="DATA0" addr="0x200"/> | ||
935 | <addr name="DATA1" addr="0x400"/> | ||
936 | <addr name="DATA2" addr="0x600"/> | ||
937 | <addr name="DATA3" addr="0x800"/> | ||
938 | </reg> | ||
939 | <reg name="ADDRn" desc=""> | ||
940 | <formula string="0x200*n+0x204"/> | ||
941 | <addr name="ADDR0" addr="0x204"/> | ||
942 | <addr name="ADDR1" addr="0x404"/> | ||
943 | <addr name="ADDR2" addr="0x604"/> | ||
944 | <addr name="ADDR3" addr="0x804"/> | ||
945 | </reg> | ||
946 | <reg name="FLASH_CMDn" desc=""> | ||
947 | <formula string="0x200*n+0x208"/> | ||
948 | <addr name="CMD0" addr="0x208"/> | ||
949 | <addr name="CMD1" addr="0x408"/> | ||
950 | <addr name="CMD2" addr="0x608"/> | ||
951 | <addr name="CMD3" addr="0x808"/> | ||
479 | </reg> | 952 | </reg> |
480 | <reg name="CPUPD" addr="0x24"></reg> | 953 | <reg name="PAGE_BUF" desc=""> |
481 | <reg name="CHIPCFG" addr="0x28"> | 954 | <addr name="PAGE_BUF" addr="0xa00"/> |
482 | <field name="NOR_FLASH_BUSWIDTH" bitrange="19:19"> | 955 | </reg> |
483 | <value name="8BIT" value="0x01" /> | 956 | <reg name="SPARE_BUF" desc=""> |
484 | <value name="16BIT" value="0x00" /> | 957 | <addr name="SPARE_BUF" addr="0x1200"/> |
958 | </reg> | ||
959 | </dev> | ||
960 | <dev name="PWM" long_name="PWM timer" desc="PWM timer" version="1.0"> | ||
961 | <addr name="PWM0" addr="0x1802c000"/> | ||
962 | <addr name="PWM1" addr="0x1802c010"/> | ||
963 | <addr name="PWM2" addr="0x1802c020"/> | ||
964 | <addr name="PWM3" addr="0x1802c030"/> | ||
965 | <reg name="PWMTn_CNTR" desc=""> | ||
966 | <formula string="n*0x10"/> | ||
967 | <addr name="CNTR" addr="0x0"/> | ||
968 | <field name="TC" desc="Main PWM counter. Range 0 - ((2^32)-1)" bitrange="31:0"/> | ||
969 | </reg> | ||
970 | <reg name="PWMTn_HRC" desc=""> | ||
971 | <formula string="n*0x10 + 0x04"/> | ||
972 | <addr name="HRC" addr="0x4"/> | ||
973 | <field name="HR" desc="Hight reference/capture register" bitrange="31:0"/> | ||
974 | </reg> | ||
975 | <reg name="PWMTn_LRC" desc=""> | ||
976 | <formula string="n*0x10 + 0x08"/> | ||
977 | <addr name="LRC" addr="0x8"/> | ||
978 | <field name="TR" desc="PWM total reference/capture register" bitrange="31:0"/> | ||
979 | </reg> | ||
980 | <reg name="PWMTn_CTRL" desc=""> | ||
981 | <formula string="n*0x10 + 0x0c"/> | ||
982 | <addr name="CTRL" addr="0xc"/> | ||
983 | <field name="RESERVED31_13" desc="" bitrange="31:13"/> | ||
984 | <field name="PRESCALE" desc="" bitrange="12:9"> | ||
985 | <value name="1/2" value="0x0" desc=""/> | ||
986 | <value name="1/4" value="0x1" desc=""/> | ||
987 | <value name="1/8" value="0x2" desc=""/> | ||
988 | <value name="1/16" value="0x3" desc=""/> | ||
989 | <value name="1/32" value="0x4" desc=""/> | ||
990 | <value name="1/64" value="0x5" desc=""/> | ||
991 | <value name="1/128" value="0x6" desc=""/> | ||
992 | <value name="1/256" value="0x7" desc=""/> | ||
993 | <value name="1/512" value="0x8" desc=""/> | ||
994 | <value name="1/1024" value="0x9" desc=""/> | ||
995 | <value name="1/2048" value="0xa" desc=""/> | ||
996 | <value name="1/4096" value="0xb" desc=""/> | ||
997 | <value name="1/8192" value="0xc" desc=""/> | ||
998 | <value name="1/16384" value="0xd" desc=""/> | ||
999 | <value name="1/32768" value="0xe" desc=""/> | ||
1000 | <value name="1/65536" value="0xf" desc=""/> | ||
1001 | </field> | ||
1002 | <field name="CAPTURE_EN" desc="Capture mode enable" bitrange="8:8"> | ||
1003 | <value name="DISABLE" value="0x0" desc=""/> | ||
1004 | <value name="ENABLE" value="0x1" desc=""/> | ||
1005 | </field> | ||
1006 | <field name="PWM_RST" desc="" bitrange="7:7"> | ||
1007 | <value name="RESET" value="0x1" desc=""/> | ||
1008 | </field> | ||
1009 | <field name="INT_STS" desc="Interrupt status and clear bit. Write 1 to clear interrupt flag." bitrange="6:6"/> | ||
1010 | <field name="INT_EN" desc="PWM timer interrupt enable/disable. PWM timer will assert an interrupt when PWMTx_CNTR value is equal to the value of PWMTx_LRC or PWMTx_HRC. " bitrange="5:5"> | ||
1011 | <value name="DISABLE" value="0x0" desc=""/> | ||
1012 | <value name="ENABLE" value="0x1" desc=""/> | ||
1013 | </field> | ||
1014 | <field name="SINGLE_MOD" desc="In single mode PWMTx_CNTR is not increased anymore after it reaches value equal to the PWMTx_LRC value. In periodic mode PWMTx_CNTR is restarted after it reaches value equal to the PWMTx_LRC value. " bitrange="4:4"> | ||
1015 | <value name="PERIODIC" value="0x0" desc=""/> | ||
1016 | <value name="SINGLE" value="0x1" desc=""/> | ||
1017 | </field> | ||
1018 | <field name="PWM_OUT_EN" desc="PWM output enable/disable." bitrange="4:4"> | ||
1019 | <value name="DISABLE" value="0x0" desc=""/> | ||
1020 | <value name="ENABLE" value="0x1" desc=""/> | ||
1021 | </field> | ||
1022 | <field name="RESERVED2_1" desc="" bitrange="2:1"/> | ||
1023 | <field name="PWM_EN" desc="PWM timer enable/disable." bitrange="0:0"> | ||
1024 | <value name="DISABLE" value="0x0" desc=""/> | ||
1025 | <value name="ENABLE" value="0x0" desc=""/> | ||
1026 | </field> | ||
1027 | </reg> | ||
1028 | </dev> | ||
1029 | <dev name="RTC" long_name="Real time clock" desc="Real time clock" version="1.0"> | ||
1030 | <addr name="RTC" addr="0x18014000"/> | ||
1031 | <reg name="TIME" desc=""> | ||
1032 | <addr name="TIME" addr="0x0"/> | ||
1033 | </reg> | ||
1034 | <reg name="DATE" desc=""> | ||
1035 | <addr name="DATE" addr="0x4"/> | ||
1036 | </reg> | ||
1037 | <reg name="TALARM" desc=""> | ||
1038 | <addr name="TALARM" addr="0x8"/> | ||
1039 | </reg> | ||
1040 | <reg name="DALARM" desc=""> | ||
1041 | <addr name="DALARM" addr="0xc"/> | ||
1042 | </reg> | ||
1043 | <reg name="CTRL" desc=""> | ||
1044 | <addr name="CTRL" addr="0x10"/> | ||
1045 | </reg> | ||
1046 | <reg name="RESET" desc=""> | ||
1047 | <addr name="RESET" addr="0x14"/> | ||
1048 | </reg> | ||
1049 | <reg name="PWOFF" desc=""> | ||
1050 | <addr name="PWOFF" addr="0x18"/> | ||
1051 | </reg> | ||
1052 | <reg name="PWFAIL" desc=""> | ||
1053 | <addr name="PWFAIL" addr="0x1c"/> | ||
1054 | </reg> | ||
1055 | </dev> | ||
1056 | <dev name="SCU" long_name="System control unit" desc="System control unit" version="1.0"> | ||
1057 | <addr name="SCU" addr="0x1801c000"/> | ||
1058 | <reg name="ID" desc=""> | ||
1059 | <addr name="ID" addr="0x0"/> | ||
1060 | <field name="SOC_ID" desc="" bitrange="31:0"> | ||
1061 | <value name="REVISION_B" value="0xa100027b" desc=""/> | ||
1062 | <value name="REVISION_A" value="0xa1000604" desc=""/> | ||
1063 | </field> | ||
1064 | </reg> | ||
1065 | <reg name="REMAP" desc=""> | ||
1066 | <addr name="REMAP" addr="0x4"/> | ||
1067 | <field name="MEM_REMAP" desc="" bitrange="31:0"> | ||
1068 | <value name="ROM_0x000000" value="0x0" desc=""/> | ||
1069 | <value name="IRAM_0x000000" value="0xdeadbeef" desc=""/> | ||
1070 | </field> | ||
1071 | </reg> | ||
1072 | <reg name="PLLCON1" desc=""> | ||
1073 | <addr name="PLLCON1" addr="0x8"/> | ||
1074 | <field name="ARM_PLL_TEST_CONTROL" desc="" bitrange="25:25"> | ||
1075 | <value name="NORMAL" value="0x0" desc=""/> | ||
1076 | <value name="TEST" value="0x1" desc=""/> | ||
1077 | </field> | ||
1078 | <field name="ARM_PLL_SATURATION" desc="" bitrange="24:24"> | ||
1079 | <value name="DISABLE" value="0x0" desc=""/> | ||
1080 | <value name="ENABLE" value="0x1" desc=""/> | ||
1081 | </field> | ||
1082 | <field name="ARM_PLL_FAST_LOCK" desc="" bitrange="23:23"> | ||
1083 | <value name="DISABLE" value="0x0" desc=""/> | ||
1084 | <value name="ENABLE" value="0x1" desc=""/> | ||
1085 | </field> | ||
1086 | <field name="ARM_PLL_POWERDOWN" desc="" bitrange="22:22"> | ||
1087 | <value name="PLL_ON" value="0x0" desc=""/> | ||
1088 | <value name="PLL_OFF" value="0x1" desc=""/> | ||
1089 | </field> | ||
1090 | <field name="ARM_PLL_CLKR" desc="" bitrange="21:16"/> | ||
1091 | <field name="ARM_PLL_CLKF" desc="" bitrange="15:4"/> | ||
1092 | <field name="ARM_PLL_CLKOD" desc="" bitrange="3:1"/> | ||
1093 | <field name="ARM_PLL_BYPASS" desc="" bitrange="0:0"> | ||
1094 | <value name="DISABLE" value="0x0" desc=""/> | ||
1095 | <value name="ENABLE" value="0x1" desc=""/> | ||
1096 | </field> | ||
1097 | </reg> | ||
1098 | <reg name="PLLCON2" desc=""> | ||
1099 | <addr name="PLLCON2" addr="0xc"/> | ||
1100 | <field name="DSP_PLL_TEST_CONTROL" desc="" bitrange="25:25"> | ||
1101 | <value name="NORMAL" value="0x0" desc=""/> | ||
1102 | <value name="TEST" value="0x1" desc=""/> | ||
1103 | </field> | ||
1104 | <field name="DSP_PLL_SATURATION" desc="" bitrange="24:24"> | ||
1105 | <value name="DISABLE" value="0x0" desc=""/> | ||
1106 | <value name="ENABLE" value="0x1" desc=""/> | ||
1107 | </field> | ||
1108 | <field name="DSP_PLL_FAST_LOCK" desc="" bitrange="23:23"> | ||
1109 | <value name="DISABLE" value="0x0" desc=""/> | ||
1110 | <value name="ENABLE" value="0x1" desc=""/> | ||
1111 | </field> | ||
1112 | <field name="DSP_PLL_POWERDOWN" desc="" bitrange="22:22"> | ||
1113 | <value name="PLL_ON" value="0x0" desc=""/> | ||
1114 | <value name="PLL_OFF" value="0x1" desc=""/> | ||
1115 | </field> | ||
1116 | <field name="DSP_PLL_CLKR" desc="" bitrange="21:16"/> | ||
1117 | <field name="DSP_PLL_CLKF" desc="" bitrange="15:4"/> | ||
1118 | <field name="DSP_PLL_CLKOD" desc="" bitrange="3:1"/> | ||
1119 | <field name="DSP_PLL_BYPASS" desc="" bitrange="0:0"> | ||
1120 | <value name="DISABLE" value="0x0" desc=""/> | ||
1121 | <value name="ENABLE" value="0x1" desc=""/> | ||
1122 | </field> | ||
1123 | </reg> | ||
1124 | <reg name="PLLCON3" desc=""> | ||
1125 | <addr name="PLLCON3" addr="0x10"/> | ||
1126 | <field name="CODEC_PLL_TEST_CONTROL" desc="" bitrange="25:25"> | ||
1127 | <value name="NORMAL" value="0x0" desc=""/> | ||
1128 | <value name="TEST" value="0x1" desc=""/> | ||
1129 | </field> | ||
1130 | <field name="CODEC_PLL_SATURATION" desc="" bitrange="24:24"> | ||
1131 | <value name="DISABLE" value="0x0" desc=""/> | ||
1132 | <value name="ENABLE" value="0x1" desc=""/> | ||
1133 | </field> | ||
1134 | <field name="CODEC_PLL_FAST_LOCK" desc="" bitrange="23:23"> | ||
1135 | <value name="DISABLE" value="0x0" desc=""/> | ||
1136 | <value name="ENABLE" value="0x1" desc=""/> | ||
1137 | </field> | ||
1138 | <field name="CODEC_PLL_POWERDOWN" desc="" bitrange="22:22"> | ||
1139 | <value name="PLL_ON" value="0x0" desc=""/> | ||
1140 | <value name="PLL_OFF" value="0x1" desc=""/> | ||
1141 | </field> | ||
1142 | <field name="CODEC_PLL_CLKR" desc="" bitrange="21:16"/> | ||
1143 | <field name="CODEC_PLL_CLKF" desc="" bitrange="15:4"/> | ||
1144 | <field name="CODEC_PLL_CLKOD" desc="" bitrange="3:1"/> | ||
1145 | <field name="CODEC_PLL_BYPASS" desc="" bitrange="0:0"> | ||
1146 | <value name="DISABLE" value="0x0" desc=""/> | ||
1147 | <value name="ENABLE" value="0x1" desc=""/> | ||
1148 | </field> | ||
1149 | </reg> | ||
1150 | <reg name="DIVCON1" desc=""> | ||
1151 | <addr name="DIVCON1" addr="0x14"/> | ||
1152 | <field name="USB_PHY_CLK" desc="" bitrange="31:31"> | ||
1153 | <value name="24MHz" value="0x0" desc=""/> | ||
1154 | <value name="12MHz" value="0x1" desc=""/> | ||
1155 | </field> | ||
1156 | <field name="VIP_SENSOR_CLK" desc="" bitrange="30:29"> | ||
1157 | <value name="24MHz" value="0x0" desc=""/> | ||
1158 | <value name="48MHz" value="0x1" desc=""/> | ||
1159 | <value name="27MHz" value="0x2" desc=""/> | ||
1160 | </field> | ||
1161 | <field name="LCDC_CLK" desc="" bitrange="28:28"> | ||
1162 | <value name="EXT_SOC_27MHz" value="0x0" desc=""/> | ||
1163 | <value name="LCDC_CLK_DIV_OUT" value="0x1" desc=""/> | ||
1164 | </field> | ||
1165 | <field name="LCDC_CLK_DIV" desc="" bitrange="27:20"/> | ||
1166 | <field name="LCDC_CLK_DIV_SRC" desc="" bitrange="19:18"> | ||
1167 | <value name="ARM_PLL" value="0x0" desc=""/> | ||
1168 | <value name="DSP_PLL" value="0x1" desc=""/> | ||
1169 | <value name="CODEC_PLL" value="0x2" desc=""/> | ||
1170 | </field> | ||
1171 | <field name="LSADC_CLK_DIV" desc="" bitrange="17:10"/> | ||
1172 | <field name="CODEC_CLK_SRC" desc="" bitrange="9:9"> | ||
1173 | <value name="CODEC_CLK_DIV_OUT" value="0x0" desc=""/> | ||
1174 | <value name="12MHz_OSC" value="0x1" desc=""/> | ||
1175 | </field> | ||
1176 | <field name="CODEC_CLK_DIV" desc="" bitrange="8:5"/> | ||
1177 | <field name="PCLK_CLK_DIV" desc="" bitrange="4:3"> | ||
1178 | <value name="HCLK/PCLK_1:1" value="0x0" desc=""/> | ||
1179 | <value name="HCLK/PCLK_2:1" value="0x1" desc=""/> | ||
1180 | <value name="HCLK/PCLK_4:1" value="0x2" desc=""/> | ||
1181 | </field> | ||
1182 | <field name="ARM_CLK_DIV" desc="" bitrange="2:2"> | ||
1183 | <value name="ARMPLL/ARMCLK_1:1" value="0x0" desc=""/> | ||
1184 | <value name="ARMPLL/ARMCLK_2:1" value="0x1" desc=""/> | ||
1185 | </field> | ||
1186 | <field name="DSP_SLOW_MODE" desc="" bitrange="1:1"> | ||
1187 | <value name="DISABLE" value="0x0" desc=""/> | ||
1188 | <value name="ENABLE" value="0x1" desc=""/> | ||
1189 | </field> | ||
1190 | <field name="ARM_SLOW_MODE" desc="" bitrange="0:0"> | ||
1191 | <value name="DISABLE" value="0x0" desc=""/> | ||
1192 | <value name="ENABLE" value="0x1" desc=""/> | ||
1193 | </field> | ||
1194 | </reg> | ||
1195 | <reg name="CLKCFG" desc=""> | ||
1196 | <addr name="CLKCFG" addr="0x18"/> | ||
1197 | <field name="WDT_PCLK" desc="" bitrange="31:31"> | ||
1198 | <value name="UNGATE" value="0x0" desc=""/> | ||
1199 | <value name="GATE" value="0x1" desc=""/> | ||
1200 | </field> | ||
1201 | <field name="RTC_PCLK" desc="" bitrange="30:30"> | ||
1202 | <value name="UNGATE" value="0x0" desc=""/> | ||
1203 | <value name="GATE" value="0x1" desc=""/> | ||
1204 | </field> | ||
1205 | <field name="PWM_PCLK" desc="" bitrange="29:29"> | ||
1206 | <value name="UNGATE" value="0x0" desc=""/> | ||
1207 | <value name="GATE" value="0x1" desc=""/> | ||
1208 | </field> | ||
1209 | <field name="TIMER_PCLK" desc="" bitrange="28:28"> | ||
1210 | <value name="UNGATE" value="0x0" desc=""/> | ||
1211 | <value name="GATE" value="0x1" desc=""/> | ||
1212 | </field> | ||
1213 | <field name="GPIO_PCLK" desc="" bitrange="27:27"> | ||
1214 | <value name="UNGATE" value="0x0" desc=""/> | ||
1215 | <value name="GATE" value="0x1" desc=""/> | ||
1216 | </field> | ||
1217 | <field name="HSADC_PCLK" desc="" bitrange="26:26"> | ||
1218 | <value name="UNGATE" value="0x0" desc=""/> | ||
1219 | <value name="GATE" value="0x1" desc=""/> | ||
1220 | </field> | ||
1221 | <field name="HSADC_HCLK" desc="" bitrange="25:25"> | ||
1222 | <value name="UNGATE" value="0x0" desc=""/> | ||
1223 | <value name="GATE" value="0x1" desc=""/> | ||
1224 | </field> | ||
1225 | <field name="LSADC_CLK" desc="" bitrange="24:24"> | ||
1226 | <value name="UNGATE" value="0x0" desc=""/> | ||
1227 | <value name="GATE" value="0x1" desc=""/> | ||
1228 | </field> | ||
1229 | <field name="LSADC_PCLK" desc="" bitrange="23:23"> | ||
1230 | <value name="UNGATE" value="0x0" desc=""/> | ||
1231 | <value name="GATE" value="0x1" desc=""/> | ||
1232 | </field> | ||
1233 | <field name="SD_CLK" desc="" bitrange="22:22"> | ||
1234 | <value name="UNGATE" value="0x0" desc=""/> | ||
1235 | <value name="GATE" value="0x1" desc=""/> | ||
1236 | </field> | ||
1237 | <field name="SPI_CLK" desc="" bitrange="21:21"> | ||
1238 | <value name="UNGATE" value="0x0" desc=""/> | ||
1239 | <value name="GATE" value="0x1" desc=""/> | ||
1240 | </field> | ||
1241 | <field name="I2C_CLK" desc="" bitrange="20:20"> | ||
1242 | <value name="UNGATE" value="0x0" desc=""/> | ||
1243 | <value name="GATE" value="0x1" desc=""/> | ||
1244 | </field> | ||
1245 | <field name="UART1_CLK" desc="" bitrange="19:19"> | ||
1246 | <value name="UNGATE" value="0x0" desc=""/> | ||
1247 | <value name="GATE" value="0x1" desc=""/> | ||
1248 | </field> | ||
1249 | <field name="UART0_CLK" desc="" bitrange="18:18"> | ||
1250 | <value name="UNGATE" value="0x0" desc=""/> | ||
1251 | <value name="GATE" value="0x1" desc=""/> | ||
1252 | </field> | ||
1253 | <field name="I2S_PCLK" desc="" bitrange="17:17"> | ||
1254 | <value name="UNGATE" value="0x0" desc=""/> | ||
1255 | <value name="GATE" value="0x1" desc=""/> | ||
1256 | </field> | ||
1257 | <field name="I2S_CLK" desc="" bitrange="16:16"> | ||
1258 | <value name="UNGATE" value="0x0" desc=""/> | ||
1259 | <value name="GATE" value="0x1" desc=""/> | ||
1260 | </field> | ||
1261 | <field name="VIP_CLK" desc="" bitrange="15:15"> | ||
1262 | <value name="UNGATE" value="0x0" desc=""/> | ||
1263 | <value name="GATE" value="0x1" desc=""/> | ||
1264 | </field> | ||
1265 | <field name="VIP_HCLK" desc="" bitrange="14:14"> | ||
1266 | <value name="UNGATE" value="0x0" desc=""/> | ||
1267 | <value name="GATE" value="0x1" desc=""/> | ||
1268 | </field> | ||
1269 | <field name="LCDC_CLK" desc="" bitrange="13:13"> | ||
1270 | <value name="UNGATE" value="0x0" desc=""/> | ||
1271 | <value name="GATE" value="0x1" desc=""/> | ||
1272 | </field> | ||
1273 | <field name="LCDC_HCLK" desc="" bitrange="12:12"> | ||
1274 | <value name="UNGATE" value="0x0" desc=""/> | ||
1275 | <value name="GATE" value="0x1" desc=""/> | ||
1276 | </field> | ||
1277 | <field name="IRAM_HCLK" desc="" bitrange="11:11"> | ||
1278 | <value name="UNGATE" value="0x0" desc=""/> | ||
1279 | <value name="GATE" value="0x1" desc=""/> | ||
485 | </field> | 1280 | </field> |
486 | <field name="DSP2ARM_IRQ" bitrange="17:17"></field> | 1281 | <field name="A2A_HCLK" desc="" bitrange="10:10"> |
487 | <field name="ARM2DSP_IRQ" bitrange="16:16"></field> | 1282 | <value name="UNGATE" value="0x0" desc=""/> |
488 | <field name="ARM_HIGHVECTOR" bitrange="3:3"></field> | 1283 | <value name="GATE" value="0x1" desc=""/> |
489 | <field name="UHC_DATABUS_WIDTH" bitrange="2:2"> | ||
490 | <value name="16BIT" value="0x01" /> | ||
491 | <value name="8BIT" value="0x00" /> | ||
492 | </field> | 1284 | </field> |
493 | <field name="USB_PHY_MUX" bitrange="1:1"> | 1285 | <field name="NANDC_HCLK" desc="" bitrange="9:9"> |
494 | <value name="USB_PHY_UHC" value="0x01" /> | 1286 | <value name="UNGATE" value="0x0" desc=""/> |
495 | <value name="USB_PHY_UDC" value="0x00" /> | 1287 | <value name="GATE" value="0x1" desc=""/> |
1288 | </field> | ||
1289 | <field name="UDC_CLK" desc="" bitrange="6:6"> | ||
1290 | <value name="UNGATE" value="0x0" desc=""/> | ||
1291 | <value name="GATE" value="0x1" desc=""/> | ||
1292 | </field> | ||
1293 | <field name="UHC_CLK" desc="" bitrange="5:5"> | ||
1294 | <value name="UNGATE" value="0x0" desc=""/> | ||
1295 | <value name="GATE" value="0x1" desc=""/> | ||
1296 | </field> | ||
1297 | <field name="DWDMA_CLK" desc="" bitrange="4:4"> | ||
1298 | <value name="UNGATE" value="0x0" desc=""/> | ||
1299 | <value name="GATE" value="0x1" desc=""/> | ||
1300 | </field> | ||
1301 | <field name="HDMA_CLK" desc="" bitrange="3:3"> | ||
1302 | <value name="UNGATE" value="0x0" desc=""/> | ||
1303 | <value name="GATE" value="0x1" desc=""/> | ||
1304 | </field> | ||
1305 | <field name="SDRAM_HCLK" desc="" bitrange="2:2"> | ||
1306 | <value name="UNGATE" value="0x0" desc=""/> | ||
1307 | <value name="GATE" value="0x1" desc=""/> | ||
1308 | </field> | ||
1309 | <field name="DSP_CLK" desc="" bitrange="1:1"> | ||
1310 | <value name="UNGATE" value="0x0" desc=""/> | ||
1311 | <value name="GATE" value="0x1" desc=""/> | ||
1312 | </field> | ||
1313 | <field name="OTP_CLK" desc="" bitrange="0:0"> | ||
1314 | <value name="UNGATE" value="0x0" desc=""/> | ||
1315 | <value name="GATE" value="0x1" desc=""/> | ||
496 | </field> | 1316 | </field> |
497 | </reg> | 1317 | </reg> |
498 | <reg name="STATUS" addr="0x2c"> | 1318 | <reg name="RSTCFG" desc=""> |
499 | <field name="DSPSYSCLKVALID" bitrange="4:4"> | 1319 | <addr name="RSTCFG" addr="0x1c"/> |
500 | <value name="VALID" value="0x01" /> | 1320 | <field name="ARM_RST" desc="" bitrange="12:12"> |
501 | <value name="UNSTABLE" value="0x00" /> | 1321 | <value name="DEASSERT" value="0x0" desc=""/> |
1322 | <value name="ASSERT" value="0x1" desc=""/> | ||
1323 | </field> | ||
1324 | <field name="DUALCORE_ECT_RST" desc="" bitrange="11:11"> | ||
1325 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1326 | <value name="ASSERT" value="0x1" desc=""/> | ||
1327 | </field> | ||
1328 | <field name="DUALCORE_MAILBOX_RST" desc="" bitrange="10:10"> | ||
1329 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1330 | <value name="ASSERT" value="0x1" desc=""/> | ||
1331 | </field> | ||
1332 | <field name="SD_RST" desc="" bitrange="9:9"> | ||
1333 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1334 | <value name="ASSERT" value="0x1" desc=""/> | ||
1335 | </field> | ||
1336 | <field name="HSADC_RST" desc="" bitrange="8:8"> | ||
1337 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1338 | <value name="ASSERT" value="0x1" desc=""/> | ||
1339 | </field> | ||
1340 | <field name="LSADC_RST" desc="" bitrange="7:7"> | ||
1341 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1342 | <value name="ASSERT" value="0x1" desc=""/> | ||
502 | </field> | 1343 | </field> |
503 | <field name="ARMSYSCLKVALID" bitrange="3:3"> | 1344 | <field name="CODEC_RST" desc="" bitrange="6:6"> |
504 | <value name="VALID" value="0x01" /> | 1345 | <value name="DEASSERT" value="0x0" desc=""/> |
505 | <value name="UNSTABLE" value="0x00" /> | 1346 | <value name="ASSERT" value="0x1" desc=""/> |
506 | </field> | 1347 | </field> |
507 | <field name="CODEC_PLL_LOCKED" bitrange="2:2"> | 1348 | <field name="DSP_PERIPHERAL_RST" desc="" bitrange="5:5"> |
508 | <value name="LOCKED" value="0x01" /> | 1349 | <value name="DEASSERT" value="0x0" desc=""/> |
509 | <value name="UNSTABLE" value="0x00" /> | 1350 | <value name="ASSERT" value="0x1" desc=""/> |
510 | </field> | 1351 | </field> |
511 | <field name="DSP_PLL_LOCKED" bitrange="1:1"> | 1352 | <field name="DSP_CORE_RST" desc="" bitrange="4:4"> |
512 | <value name="LOCKED" value="0x01" /> | 1353 | <value name="DEASSERT" value="0x0" desc=""/> |
513 | <value name="UNSTABLE" value="0x00" /> | 1354 | <value name="ASSERT" value="0x1" desc=""/> |
514 | </field> | 1355 | </field> |
515 | <field name="ARM_PLL_LOCKED" bitrange="0:0"> | 1356 | <field name="VIP_RST" desc="" bitrange="3:3"> |
516 | <value name="LOCKED" value="0x01" /> | 1357 | <value name="DEASSERT" value="0x0" desc=""/> |
517 | <value name="UNSTABLE" value="0x00" /> | 1358 | <value name="ASSERT" value="0x1" desc=""/> |
1359 | </field> | ||
1360 | <field name="LCDC_RST" desc="" bitrange="2:2"> | ||
1361 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1362 | <value name="ASSERT" value="0x1" desc=""/> | ||
1363 | </field> | ||
1364 | <field name="UDC_RST" desc="" bitrange="1:1"> | ||
1365 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1366 | <value name="ASSERT" value="0x1" desc=""/> | ||
1367 | </field> | ||
1368 | <field name="UHC_RST" desc="" bitrange="0:0"> | ||
1369 | <value name="DEASSERT" value="0x0" desc=""/> | ||
1370 | <value name="ASSERT" value="0x1" desc=""/> | ||
518 | </field> | 1371 | </field> |
519 | </reg> | 1372 | </reg> |
520 | <reg name="IOMUXA_CON" addr="0x30"> | 1373 | <reg name="PWM" desc=""> |
521 | <field name="I2S_CODEC_EXT_SEL" bitrange="19:19"> | 1374 | <addr name="PWM" addr="0x20"/> |
522 | <value name="PIN" value="0x01" /> | 1375 | <field name="PLL_LOCK_PERIOD" desc="" bitrange="31:16"/> |
523 | <value name="INTERNAL_CODEC" value="0x00" /> | 1376 | <field name="EXT_WAKEUP_PIN_POLARITY" desc="" bitrange="6:6"> |
524 | </field> | 1377 | <value name="POSITIVE" value="0x0" desc=""/> |
525 | <field name="I2C_CODEC_EXT_SEL" bitrange="18:18"> | 1378 | <value name="NEGATIVE" value="0x1" desc=""/> |
526 | <value name="PIN" value="0x01" /> | ||
527 | <value name="INTERNAL_CODEC" value="0x00" /> | ||
528 | </field> | ||
529 | <field name="I2C_FLASHCS3_GPIOB_SEL" bitrange="17:16"> | ||
530 | <value name="GPIOB7" value="0x02" /> | ||
531 | <value name="FLASH_CS3" value="0x01" /> | ||
532 | <value name="I2C_SDA" value="0x00" /> | ||
533 | </field> | 1379 | </field> |
534 | <field name="I2C_FLASHCS2_GPIOB_SEL" bitrange="15:14"> | 1380 | <field name="RTC_ALARM_WAKEUP" desc="" bitrange="5:5"> |
535 | <value name="GPIOB6" value="0x02" /> | 1381 | <value name="ENABLE" value="0x0" desc=""/> |
536 | <value name="FLASH_CS2" value="0x01" /> | 1382 | <value name="DISABLE" value="0x1" desc=""/> |
537 | <value name="I2C_SCL" value="0x00" /> | ||
538 | </field> | 1383 | </field> |
539 | <field name="GPIOB_SD_SPI_SEL" bitrange="13:12"> | 1384 | <field name="EXT_WAKEUP" desc="" bitrange="4:4"> |
540 | <value name="SPI" value="0x02" /> | 1385 | <value name="ENABLE" value="0x0" desc=""/> |
541 | <value name="SD" value="0x01" /> | 1386 | <value name="DISABLE" value="0x1" desc=""/> |
542 | <value name="GPIOB[0:5]" value="0x00" /> | 1387 | </field> |
1388 | <field name="SCU_IRQ_CLEAR" desc="" bitrange="3:3"> | ||
1389 | <value name="PENDING" value="0x0" desc=""/> | ||
1390 | <value name="CLEAR" value="0x1" desc=""/> | ||
1391 | </field> | ||
1392 | <field name="POWERMANAGEMENT_MODE" desc="" bitrange="2:0"> | ||
1393 | <value name="NORMAL" value="0x0" desc=""/> | ||
1394 | <value name="STOP" value="0x8" desc=""/> | ||
1395 | </field> | ||
1396 | </reg> | ||
1397 | <reg name="CPUPD" desc=""> | ||
1398 | <addr name="CPUPD" addr="0x24"/> | ||
1399 | </reg> | ||
1400 | <reg name="CHIPCFG" desc=""> | ||
1401 | <addr name="CHIPCFG" addr="0x28"/> | ||
1402 | <field name="NOR_FLASH_BUSWIDTH" desc="" bitrange="19:19"> | ||
1403 | <value name="16BIT" value="0x0" desc=""/> | ||
1404 | <value name="8BIT" value="0x1" desc=""/> | ||
1405 | </field> | ||
1406 | <field name="DSP2ARM_IRQ" desc="" bitrange="17:17"/> | ||
1407 | <field name="ARM2DSP_IRQ" desc="" bitrange="16:16"/> | ||
1408 | <field name="ARM_HIGHVECTOR" desc="" bitrange="3:3"/> | ||
1409 | <field name="UHC_DATABUS_WIDTH" desc="" bitrange="2:2"> | ||
1410 | <value name="8BIT" value="0x0" desc=""/> | ||
1411 | <value name="16BIT" value="0x1" desc=""/> | ||
543 | </field> | 1412 | </field> |
544 | <field name="GPIO_LCDVSYN_SEL" bitrange="11:11"> | 1413 | <field name="USB_PHY_MUX" desc="" bitrange="1:1"> |
545 | <value name="LCD_VSYN" value="0x01" /> | 1414 | <value name="USB_PHY_UDC" value="0x0" desc=""/> |
546 | <value name="GPIOA7" value="0x00" /> | 1415 | <value name="USB_PHY_UHC" value="0x1" desc=""/> |
547 | </field> | 1416 | </field> |
548 | <field name="GPIO_LCDEN_SEL" bitrange="10:10"> | 1417 | </reg> |
549 | <value name="LCD_DATA_ENABLE" value="0x01" /> | 1418 | <reg name="STATUS" desc=""> |
550 | <value name="GPIOA6" value="0x00" /> | 1419 | <addr name="STATUS" addr="0x2c"/> |
1420 | <field name="DSPSYSCLKVALID" desc="" bitrange="4:4"> | ||
1421 | <value name="UNSTABLE" value="0x0" desc=""/> | ||
1422 | <value name="VALID" value="0x1" desc=""/> | ||
1423 | </field> | ||
1424 | <field name="ARMSYSCLKVALID" desc="" bitrange="3:3"> | ||
1425 | <value name="UNSTABLE" value="0x0" desc=""/> | ||
1426 | <value name="VALID" value="0x1" desc=""/> | ||
1427 | </field> | ||
1428 | <field name="CODEC_PLL_LOCKED" desc="" bitrange="2:2"> | ||
1429 | <value name="UNSTABLE" value="0x0" desc=""/> | ||
1430 | <value name="LOCKED" value="0x1" desc=""/> | ||
1431 | </field> | ||
1432 | <field name="DSP_PLL_LOCKED" desc="" bitrange="1:1"> | ||
1433 | <value name="UNSTABLE" value="0x0" desc=""/> | ||
1434 | <value name="LOCKED" value="0x1" desc=""/> | ||
1435 | </field> | ||
1436 | <field name="ARM_PLL_LOCKED" desc="" bitrange="0:0"> | ||
1437 | <value name="UNSTABLE" value="0x0" desc=""/> | ||
1438 | <value name="LOCKED" value="0x1" desc=""/> | ||
1439 | </field> | ||
1440 | </reg> | ||
1441 | <reg name="IOMUXA_CON" desc=""> | ||
1442 | <addr name="IOMUXA_CON" addr="0x30"/> | ||
1443 | <field name="I2S_CODEC_EXT_SEL" desc="" bitrange="19:19"> | ||
1444 | <value name="INTERNAL_CODEC" value="0x0" desc=""/> | ||
1445 | <value name="PIN" value="0x1" desc=""/> | ||
1446 | </field> | ||
1447 | <field name="I2C_CODEC_EXT_SEL" desc="" bitrange="18:18"> | ||
1448 | <value name="INTERNAL_CODEC" value="0x0" desc=""/> | ||
1449 | <value name="PIN" value="0x1" desc=""/> | ||
1450 | </field> | ||
1451 | <field name="I2C_FLASHCS3_GPIOB_SEL" desc="" bitrange="17:16"> | ||
1452 | <value name="I2C_SDA" value="0x0" desc=""/> | ||
1453 | <value name="FLASH_CS3" value="0x1" desc=""/> | ||
1454 | <value name="GPIOB7" value="0x2" desc=""/> | ||
1455 | </field> | ||
1456 | <field name="I2C_FLASHCS2_GPIOB_SEL" desc="" bitrange="15:14"> | ||
1457 | <value name="I2C_SCL" value="0x0" desc=""/> | ||
1458 | <value name="FLASH_CS2" value="0x1" desc=""/> | ||
1459 | <value name="GPIOB6" value="0x2" desc=""/> | ||
1460 | </field> | ||
1461 | <field name="GPIOB_SD_SPI_SEL" desc="" bitrange="13:12"> | ||
1462 | <value name="GPIOB[0:5]" value="0x0" desc=""/> | ||
1463 | <value name="SD" value="0x1" desc=""/> | ||
1464 | <value name="SPI" value="0x2" desc=""/> | ||
1465 | </field> | ||
1466 | <field name="GPIO_LCDVSYN_SEL" desc="" bitrange="11:11"> | ||
1467 | <value name="GPIOA7" value="0x0" desc=""/> | ||
1468 | <value name="LCD_VSYN" value="0x1" desc=""/> | ||
1469 | </field> | ||
1470 | <field name="GPIO_LCDEN_SEL" desc="" bitrange="10:10"> | ||
1471 | <value name="GPIOA6" value="0x0" desc=""/> | ||
1472 | <value name="LCD_DATA_ENABLE" value="0x1" desc=""/> | ||
1473 | </field> | ||
1474 | <field name="GPIO_FLASHCS1_SEL" desc="" bitrange="9:9"> | ||
1475 | <value name="GPIOA5" value="0x0" desc=""/> | ||
1476 | <value name="FLASH_CS1" value="0x1" desc=""/> | ||
1477 | </field> | ||
1478 | <field name="GPIO_LCD22_SEL" desc="" bitrange="8:8"> | ||
1479 | <value name="GPIOA4" value="0x0" desc=""/> | ||
1480 | <value name="LCD_DATA22" value="0x1" desc=""/> | ||
1481 | </field> | ||
1482 | <field name="GPIOA_LCD20_NRTS0_SEL" desc="" bitrange="7:6"> | ||
1483 | <value name="GPIOA3" value="0x0" desc=""/> | ||
1484 | <value name="LCD_DATA20" value="0x1" desc=""/> | ||
1485 | <value name="UART0_NRTS" value="0x2" desc=""/> | ||
1486 | </field> | ||
1487 | <field name="GPIOA_LCD18_NCTS0_SEL" desc="" bitrange="5:4"> | ||
1488 | <value name="GPIOA2" value="0x0" desc=""/> | ||
1489 | <value name="LCD_DATA18" value="0x1" desc=""/> | ||
1490 | <value name="UART0_NCTS" value="0x2" desc=""/> | ||
551 | </field> | 1491 | </field> |
552 | <field name="GPIO_FLASHCS1_SEL" bitrange="9:9"> | 1492 | <field name="GPIOA_LCD17_TXD0_SEL" desc="" bitrange="3:2"> |
553 | <value name="FLASH_CS1" value="0x01" /> | 1493 | <value name="GPIOA1" value="0x0" desc=""/> |
554 | <value name="GPIOA5" value="0x00" /> | 1494 | <value name="LCD_DATA17" value="0x1" desc=""/> |
1495 | <value name="UART0_TXD" value="0x2" desc=""/> | ||
1496 | </field> | ||
1497 | <field name="GPIOA_LCD16_RXD0_SEL" desc="" bitrange="1:0"> | ||
1498 | <value name="GPIOA0" value="0x0" desc=""/> | ||
1499 | <value name="LCD_DATA16" value="0x1" desc=""/> | ||
1500 | <value name="UART0_RXD" value="0x2" desc=""/> | ||
1501 | </field> | ||
1502 | </reg> | ||
1503 | <reg name="IOMUXB_CON" desc=""> | ||
1504 | <addr name="IOMUXB_CON" addr="0x34"/> | ||
1505 | <field name="VIP_HSADC_SEL" desc="" bitrange="22:22"> | ||
1506 | <value name="VIP" value="0x0" desc=""/> | ||
1507 | <value name="HSADC" value="0x1" desc=""/> | ||
555 | </field> | 1508 | </field> |
556 | <field name="GPIO_LCD22_SEL" bitrange="8:8"> | 1509 | <field name="GPIOD_SDCKE_SEL" desc="" bitrange="21:21"> |
557 | <value name="LCD_DATA22" value="0x01" /> | 1510 | <value name="GPIOD3" value="0x0" desc=""/> |
558 | <value name="GPIOA4" value="0x00" /> | 1511 | <value name="SDRAM_CKE" value="0x1" desc=""/> |
559 | </field> | ||
560 | <field name="GPIOA_LCD20_NRTS0_SEL" bitrange="7:6"> | ||
561 | <value name="UART0_NRTS" value="0x02" /> | ||
562 | <value name="LCD_DATA20" value="0x01" /> | ||
563 | <value name="GPIOA3" value="0x00" /> | ||
564 | </field> | ||
565 | <field name="GPIOA_LCD18_NCTS0_SEL" bitrange="5:4"> | ||
566 | <value name="UART0_NCTS" value="0x02" /> | ||
567 | <value name="LCD_DATA18" value="0x01" /> | ||
568 | <value name="GPIOA2" value="0x00" /> | ||
569 | </field> | 1512 | </field> |
570 | <field name="GPIOA_LCD17_TXD0_SEL" bitrange="3:2"> | 1513 | <field name="GPIOF_UHCVBUS_SEL" desc="" bitrange="20:20"> |
571 | <value name="UART0_TXD" value="0x02" /> | 1514 | <value name="GPIOF4" value="0x0" desc=""/> |
572 | <value name="LCD_DATA17" value="0x01" /> | 1515 | <value name="UHC_VBUS" value="0x1" desc=""/> |
573 | <value name="GPIOA1" value="0x00" /> | ||
574 | </field> | 1516 | </field> |
575 | <field name="GPIOA_LCD16_RXD0_SEL" bitrange="1:0"> | 1517 | <field name="GPIOF_UHCOCUR_SEL" desc="" bitrange="19:19"> |
576 | <value name="UART0_RXD" value="0x02" /> | 1518 | <value name="GPIOF3" value="0x0" desc=""/> |
577 | <value name="LCD_DATA16" value="0x01" /> | 1519 | <value name="UHC_OCUR" value="0x1" desc=""/> |
578 | <value name="GPIOA0" value="0x00" /> | ||
579 | </field> | ||
580 | </reg> | ||
581 | <reg name="IOMUXB_CON" addr="0x34"> | ||
582 | <field name="VIP_HSADC_SEL" bitrange="22:22"> | ||
583 | <value name="HSADC" value="0x01" /> | ||
584 | <value name="VIP" value="0x00" /> | ||
585 | </field> | 1520 | </field> |
586 | <field name="GPIOD_SDCKE_SEL" bitrange="21:21"> | 1521 | <field name="SDTADDR12_GPIOF_SEL" desc="" bitrange="18:18"> |
587 | <value name="SDRAM_CKE" value="0x01" /> | 1522 | <value name="SDT_ADDR12" value="0x0" desc=""/> |
588 | <value name="GPIOD3" value="0x00" /> | 1523 | <value name="GPIOF2" value="0x1" desc=""/> |
589 | </field> | 1524 | </field> |
590 | <field name="GPIOF_UHCVBUS_SEL" bitrange="20:20"> | 1525 | <field name="SDTADDR11_GPIOF_SEL" desc="" bitrange="17:17"> |
591 | <value name="UHC_VBUS" value="0x01" /> | 1526 | <value name="SDT_ADDR11" value="0x0" desc=""/> |
592 | <value name="GPIOF4" value="0x00" /> | 1527 | <value name="GPIOF1" value="0x1" desc=""/> |
593 | </field> | 1528 | </field> |
594 | <field name="GPIOF_UHCOCUR_SEL" bitrange="19:19"> | 1529 | <field name="GPIOF_VIPCLK_SEL" desc="" bitrange="16:16"> |
595 | <value name="UHC_OCUR" value="0x01" /> | 1530 | <value name="GPIOF0" value="0x0" desc=""/> |
596 | <value name="GPIOF3" value="0x00" /> | 1531 | <value name="VIP_CLK" value="0x1" desc=""/> |
597 | </field> | 1532 | </field> |
598 | <field name="SDTADDR12_GPIOF_SEL" bitrange="18:18"> | 1533 | <field name="GPIOE_LCD_SEL" desc="" bitrange="15:15"> |
599 | <value name="GPIOF2" value="0x01" /> | 1534 | <value name="GPIOE[0:7]" value="0x0" desc=""/> |
600 | <value name="SDT_ADDR12" value="0x00" /> | 1535 | <value name="LCD_DATA[8:15]" value="0x1" desc=""/> |
601 | </field> | 1536 | </field> |
602 | <field name="SDTADDR11_GPIOF_SEL" bitrange="17:17"> | 1537 | <field name="GPIOD_PWM3_SEL" desc="" bitrange="14:14"> |
603 | <value name="GPIOF1" value="0x01" /> | 1538 | <value name="GPIOD7" value="0x0" desc=""/> |
604 | <value name="SDT_ADDR11" value="0x00" /> | 1539 | <value name="PWM3" value="0x1" desc=""/> |
605 | </field> | 1540 | </field> |
606 | <field name="GPIOF_VIPCLK_SEL" bitrange="16:16"> | 1541 | <field name="GPIOD_PWM2_SEL" desc="" bitrange="13:13"> |
607 | <value name="VIP_CLK" value="0x01" /> | 1542 | <value name="GPIOD6" value="0x0" desc=""/> |
608 | <value name="GPIOF0" value="0x00" /> | 1543 | <value name="PWM2" value="0x1" desc=""/> |
609 | </field> | 1544 | </field> |
610 | <field name="GPIOE_LCD_SEL" bitrange="15:15"> | 1545 | <field name="GPIOD_PWM1_SEL" desc="" bitrange="12:12"> |
611 | <value name="LCD_DATA[8:15]" value="0x01" /> | 1546 | <value name="GPIOD5" value="0x0" desc=""/> |
612 | <value name="GPIOE[0:7]" value="0x00" /> | 1547 | <value name="PWM1" value="0x1" desc=""/> |
613 | </field> | 1548 | </field> |
614 | <field name="GPIOD_PWM3_SEL" bitrange="14:14"> | 1549 | <field name="GPIOD_PWM0_SEL" desc="" bitrange="11:11"> |
615 | <value name="PWM3" value="0x01" /> | 1550 | <value name="GPIOD4" value="0x0" desc=""/> |
616 | <value name="GPIOD7" value="0x00" /> | 1551 | <value name="PWM0" value="0x1" desc=""/> |
617 | </field> | 1552 | </field> |
618 | <field name="GPIOD_PWM2_SEL" bitrange="13:13"> | 1553 | <field name="GPIOD_SDWPA_SEL" desc="" bitrange="10:10"> |
619 | <value name="PWM2" value="0x01" /> | 1554 | <value name="GPIOD2" value="0x0" desc=""/> |
620 | <value name="GPIOD6" value="0x00" /> | 1555 | <value name="SD_WPA" value="0x1" desc=""/> |
621 | </field> | ||
622 | <field name="GPIOD_PWM1_SEL" bitrange="12:12"> | ||
623 | <value name="PWM1" value="0x01" /> | ||
624 | <value name="GPIOD5" value="0x00" /> | ||
625 | </field> | ||
626 | <field name="GPIOD_PWM0_SEL" bitrange="11:11"> | ||
627 | <value name="PWM0" value="0x01" /> | ||
628 | <value name="GPIOD4" value="0x00" /> | ||
629 | </field> | ||
630 | <field name="GPIOD_SDWPA_SEL" bitrange="10:10"> | ||
631 | <value name="SD_WPA" value="0x01" /> | ||
632 | <value name="GPIOD2" value="0x00" /> | ||
633 | </field> | 1556 | </field> |
634 | <field name="GPIOD_SDCDA_RXD1_SEL" bitrange="9:8"> | 1557 | <field name="GPIOD_SDCDA_RXD1_SEL" desc="" bitrange="9:8"> |
635 | <value name="UART1_RXD" value="0x02" /> | 1558 | <value name="GPIOD1" value="0x0" desc=""/> |
636 | <value name="SD_CDA" value="0x01" /> | 1559 | <value name="SD_CDA" value="0x1" desc=""/> |
637 | <value name="GPIOD1" value="0x00" /> | 1560 | <value name="UART1_RXD" value="0x2" desc=""/> |
638 | </field> | 1561 | </field> |
639 | <field name="GPIOD_SDPCA_TXD1_SEL" bitrange="7:6"> | 1562 | <field name="GPIOD_SDPCA_TXD1_SEL" desc="" bitrange="7:6"> |
640 | <value name="UART1_RXD" value="0x02" /> | 1563 | <value name="GPIOD0" value="0x0" desc=""/> |
641 | <value name="SD_PCA" value="0x01" /> | 1564 | <value name="SD_PCA" value="0x1" desc=""/> |
642 | <value name="GPIOD0" value="0x00" /> | 1565 | <value name="UART1_RXD" value="0x2" desc=""/> |
643 | </field> | 1566 | </field> |
644 | <field name="GPIOC_STCS1_SEL" bitrange="5:5"> | 1567 | <field name="GPIOC_STCS1_SEL" desc="" bitrange="5:5"> |
645 | <value name="ST_CS1" value="0x01" /> | 1568 | <value name="GPIOC7" value="0x0" desc=""/> |
646 | <value name="GPIOC7" value="0x00" /> | 1569 | <value name="ST_CS1" value="0x1" desc=""/> |
647 | </field> | 1570 | </field> |
648 | <field name="GPIOC_I2SCLK1_SEL" bitrange="4:4"> | 1571 | <field name="GPIOC_I2SCLK1_SEL" desc="" bitrange="4:4"> |
649 | <value name="I2S_CLK" value="0x01" /> | 1572 | <value name="GPIOC6" value="0x0" desc=""/> |
650 | <value name="GPIOC6" value="0x00" /> | 1573 | <value name="I2S_CLK" value="0x1" desc=""/> |
651 | </field> | 1574 | </field> |
652 | <field name="GPIOC_I2SSDO_SEL" bitrange="3:3"> | 1575 | <field name="GPIOC_I2SSDO_SEL" desc="" bitrange="3:3"> |
653 | <value name="I2S_SDO" value="0x01" /> | 1576 | <value name="GPIOC5" value="0x0" desc=""/> |
654 | <value name="GPIOC5" value="0x00" /> | 1577 | <value name="I2S_SDO" value="0x1" desc=""/> |
655 | </field> | 1578 | </field> |
656 | <field name="GPIOC_I2SSDI_SEL" bitrange="2:2"> | 1579 | <field name="GPIOC_I2SSDI_SEL" desc="" bitrange="2:2"> |
657 | <value name="I2S_SDI" value="0x01" /> | 1580 | <value name="GPIOC4" value="0x0" desc=""/> |
658 | <value name="GPIOC4" value="0x00" /> | 1581 | <value name="I2S_SDI" value="0x1" desc=""/> |
659 | </field> | 1582 | </field> |
660 | <field name="GPIOC_I2SLRCK_SEL" bitrange="1:1"> | 1583 | <field name="GPIOC_I2SLRCK_SEL" desc="" bitrange="1:1"> |
661 | <value name="I2S_LRCK" value="0x01" /> | 1584 | <value name="GPIOC3" value="0x0" desc=""/> |
662 | <value name="GPIOC3" value="0x00" /> | 1585 | <value name="I2S_LRCK" value="0x1" desc=""/> |
663 | </field> | 1586 | </field> |
664 | <field name="GPIOC_I2SSCLK_SEL" bitrange="0:0"> | 1587 | <field name="GPIOC_I2SSCLK_SEL" desc="" bitrange="0:0"> |
665 | <value name="I2S_SCLK" value="0x01" /> | 1588 | <value name="GPIOC2" value="0x0" desc=""/> |
666 | <value name="GPIOC2" value="0x00" /> | 1589 | <value name="I2S_SCLK" value="0x1" desc=""/> |
667 | </field> | 1590 | </field> |
668 | </reg> | 1591 | </reg> |
669 | <reg name="SCU_GPIOUPCON" addr="0x38"></reg> | 1592 | <reg name="SCU_GPIOUPCON" desc=""> |
670 | <reg name="SCU_DIVCON2" addr="0x3c"></reg> | 1593 | <addr name="SCU_GPIOUPCON" addr="0x38"/> |
671 | </dev> | 1594 | </reg> |
672 | <dev name="I2C" long_name="I2C controller" desc="I2C controller" version="1.0"> | 1595 | <reg name="SCU_DIVCON2" desc=""> |
673 | <addr name="I2C" addr="0x18020000" /> | 1596 | <addr name="SCU_DIVCON2" addr="0x3c"/> |
674 | <reg name="MTXR" addr="0x00"></reg> | 1597 | </reg> |
675 | <reg name="MRXR" addr="0x04"></reg> | ||
676 | <reg name="STXR" addr="0x08"></reg> | ||
677 | <reg name="SRXR" addr="0x0c"></reg> | ||
678 | <reg name="SADDR" addr="0x10"></reg> | ||
679 | <reg name="IER" addr="0x14"></reg> | ||
680 | <reg name="ISR" addr="0x18"></reg> | ||
681 | <reg name="LCMR" addr="0x1c"></reg> | ||
682 | <reg name="LSR" addr="0x20"></reg> | ||
683 | <reg name="CONR" addr="0x24"></reg> | ||
684 | <reg name="OPR" addr="0x28"></reg> | ||
685 | </dev> | 1598 | </dev> |
686 | <dev name="SD" long_name="SD controller" desc="SD controller" version="1.0"> | 1599 | <dev name="SD" long_name="SD controller" desc="SD controller" version="1.0"> |
687 | <addr name="SD" addr="0x18024000" /> | 1600 | <addr name="SD" addr="0x18024000"/> |
688 | <reg name="MMU_CTRL" addr="0x00"></reg> | 1601 | <reg name="MMU_CTRL" desc=""> |
689 | <reg name="MMU_PNRI" addr="0x04"></reg> | 1602 | <addr name="MMU_CTRL" addr="0x0"/> |
690 | <reg name="CUR_PNRI" addr="0x08"></reg> | 1603 | <field name="RESERVED31_13" desc="" bitrange="31:13"/> |
691 | <reg name="MMU_PNRII" addr="0x0c"></reg> | 1604 | <field name="ENDIANEESE" desc="Endian control when CPU access to data buffer." bitrange="12:12"> |
692 | <reg name="CUR_PNRII" addr="0x10"></reg> | 1605 | <value name="LITTLE_ENDIAN" value="0x0" desc=""/> |
693 | <reg name="MMU_ADDR" addr="0x14"></reg> | 1606 | <value name="BIG_ENDIAN" value="0x1" desc=""/> |
694 | <reg name="CUR_ADDR" addr="0x18"></reg> | 1607 | </field> |
695 | <reg name="MMU_DATA" addr="0x1c"></reg> | 1608 | <field name="MMU_DMA_XFER" desc="" bitrange="11:11"/> |
696 | <reg name="CTRL" addr="0x20"></reg> | 1609 | <field name="MMU_DMA_DIR" desc="" bitrange="10:10"> |
697 | <reg name="INT" addr="0x24"></reg> | 1610 | <value name="READ" value="0x0" desc=""/> |
698 | <reg name="CARD" addr="0x28"></reg> | 1611 | <value name="WRITE" value="0x1" desc=""/> |
699 | <reg name="CMDREST" addr="0x30"></reg> | 1612 | </field> |
700 | <reg name="CMDRES" addr="0x34"></reg> | 1613 | <field name="MMU_BUF_PTR" desc="" bitrange="9:9"> |
701 | <reg name="DATAT" addr="0x3c"></reg> | 1614 | <value name="BUF1" value="0x0" desc=""/> |
702 | <reg name="CMD" addr="0x40"></reg> | 1615 | <value name="BUF2" value="0x1" desc=""/> |
703 | <reg name="RES3" addr="0x44"></reg> | 1616 | </field> |
704 | <reg name="RES2" addr="0x48"></reg> | 1617 | <field name="CPU_BUF_PTR" desc="" bitrange="8:8"> |
705 | <reg name="RES1" addr="0x4c"></reg> | 1618 | <value name="BUF1" value="0x0" desc=""/> |
706 | <reg name="RES0" addr="0x50"></reg> | 1619 | <value name="BUF2" value="0x1" desc=""/> |
707 | </dev> | 1620 | </field> |
708 | <dev name="I2S" long_name="I2S controller" desc="I2S controller" version="1.0"> | 1621 | <field name="BUF2_RST" desc="" bitrange="7:7"/> |
709 | <addr name="I2S" addr="0x18028000" /> | 1622 | <field name="BUF2_END_SIGNAL" desc="" bitrange="6:6"/> |
710 | <reg name="OPR" addr="0x00"></reg> | 1623 | <field name="BUF2_XFER_WIDTH" desc="" bitrange="5:4"> |
711 | <reg name="TXR" addr="0x04"></reg> | 1624 | <value name="BYTE" value="0x0" desc=""/> |
712 | <reg name="RXR" addr="0x08"></reg> | 1625 | <value name="HALFWORD" value="0x1" desc=""/> |
713 | <reg name="TXCTL" addr="0x0c"></reg> | 1626 | <value name="RESERVED" value="0x2" desc=""/> |
714 | <reg name="RXCTL" addr="0x10"></reg> | 1627 | <value name="WORD" value="0x3" desc=""/> |
715 | <reg name="FIFOSTS" addr="0x14"></reg> | 1628 | </field> |
716 | <reg name="IER" addr="0x18"></reg> | 1629 | <field name="BUF1_RST" desc="" bitrange="3:3"/> |
717 | <reg name="ISR" addr="0x1c"></reg> | 1630 | <field name="BUF1_END_SIGNAL" desc="" bitrange="2:2"/> |
718 | </dev> | 1631 | <field name="BUF1_XFER_WIDTH" desc="" bitrange="1:0"> |
719 | <dev name="PWM" long_name="PWM timer" desc="PWM timer" version="1.0"> | 1632 | <value name="BYTE" value="0x0" desc=""/> |
720 | <addr name="PWM0" addr="0x1802c000" /> | 1633 | <value name="HALFWORD" value="0x1" desc=""/> |
721 | <addr name="PWM1" addr="0x1802c010" /> | 1634 | <value name="RESERVED" value="0x2" desc=""/> |
722 | <addr name="PWM2" addr="0x1802c020" /> | 1635 | <value name="WORD" value="0x3" desc=""/> |
723 | <addr name="PWM3" addr="0x1802c030" /> | 1636 | </field> |
724 | <reg name="PWMTn_CNTR"> | 1637 | </reg> |
725 | <formula string="n*0x10" /> | 1638 | <reg name="MMU_PNRI" desc=""> |
726 | <addr name="CNTR" addr="0x00" /> | 1639 | <addr name="MMU_PNRI" addr="0x4"/> |
727 | </reg> | 1640 | <field name="RESERVED31_11" desc="" bitrange="31:11"/> |
728 | <reg name="PWMTn_HRC"> | 1641 | <field name="BUF1_PTR" desc="" bitrange="10:0"/> |
729 | <formula string="n*0x10 + 0x04" /> | 1642 | </reg> |
730 | <addr name="HRC" addr="0x04" /> | 1643 | <reg name="CUR_PNRI" desc=""> |
731 | </reg> | 1644 | <addr name="CUR_PNRI" addr="0x8"/> |
732 | <reg name="PWMTn_LRC"> | 1645 | <field name="RESERVED31_11" desc="" bitrange="31:11"/> |
733 | <formula string="n*0x10 + 0x08" /> | 1646 | <field name="BUF1_PTR" desc="" bitrange="10:0"/> |
734 | <addr name="LRC" addr="0x08" /> | 1647 | </reg> |
735 | </reg> | 1648 | <reg name="MMU_PNRII" desc=""> |
736 | <reg name="PWMTn_CTRL"> | 1649 | <addr name="MMU_PNRII" addr="0xc"/> |
737 | <formula string="n*0x10 + 0x0c" /> | 1650 | <field name="RESERVED31_11" desc="" bitrange="31:11"/> |
738 | <addr name="CTRL" addr="0x0c" /> | 1651 | <field name="BUF2_PTR" desc="" bitrange="10:0"/> |
1652 | </reg> | ||
1653 | <reg name="CUR_PNRII" desc=""> | ||
1654 | <addr name="CUR_PNRII" addr="0x10"/> | ||
1655 | <field name="RESERVED31_11" desc="" bitrange="31:11"/> | ||
1656 | <field name="BUF2_PTR" desc="" bitrange="10:0"/> | ||
1657 | </reg> | ||
1658 | <reg name="MMU_ADDR" desc=""> | ||
1659 | <addr name="MMU_ADDR" addr="0x14"/> | ||
1660 | <field name="RESERVED31_24" desc="" bitrange="31:24"/> | ||
1661 | <field name="ADDR" desc="" bitrange="23:0"/> | ||
1662 | </reg> | ||
1663 | <reg name="CUR_ADDR" desc=""> | ||
1664 | <addr name="CUR_ADDR" addr="0x18"/> | ||
1665 | <field name="RESERVED31_24" desc="" bitrange="31:24"/> | ||
1666 | <field name="ADDR" desc="" bitrange="23:0"/> | ||
1667 | </reg> | ||
1668 | <reg name="MMU_DATA" desc=""> | ||
1669 | <addr name="MMU_DATA" addr="0x1c"/> | ||
1670 | </reg> | ||
1671 | <reg name="CTRL" desc=""> | ||
1672 | <addr name="CTRL" addr="0x20"/> | ||
1673 | <field name="RESERVED31_14" desc="" bitrange="31:14"/> | ||
1674 | <field name="PWR_CTRL" desc="Power control type for SD/MMC cards" bitrange="13:13"> | ||
1675 | <value name="CPU" value="0x0" desc="The SD/MMC card power is controlled by CPU "/> | ||
1676 | <value name="CD" value="0x1" desc="The SD/MMC card power is controlled by CD/DAT3"/> | ||
1677 | </field> | ||
1678 | <field name="DETECT_CTRL" desc="Card detect type for SD cards" bitrange="12:12"> | ||
1679 | <value name="SWITCH" value="0x0" desc="The card detect function is used by mechanism"/> | ||
1680 | <value name="CD" value="0x1" desc="The card detect function is used by CD/DAT3"/> | ||
1681 | </field> | ||
1682 | <field name="STOP" desc="" bitrange="11:11"> | ||
1683 | <value name="SD_CLK_EN" value="0x0" desc="Run the SD/MMC Card clock"/> | ||
1684 | <value name="SD_CLK_DIS" value="0x1" desc="Stop the SD/MMC Card clock"/> | ||
1685 | </field> | ||
1686 | <field name="DIVIDER" desc="" bitrange="10:0"/> | ||
1687 | </reg> | ||
1688 | <reg name="INT" desc=""> | ||
1689 | <addr name="INT" addr="0x24"/> | ||
1690 | <field name="RESERVED31_7" desc="" bitrange="31:7"/> | ||
1691 | <field name="CMD_RSP_STS" desc="Command and response transfer interrupt status" bitrange="6:6"> | ||
1692 | <value name="NO" value="0x0" desc=""/> | ||
1693 | <value name="YES" value="0x1" desc=""/> | ||
1694 | </field> | ||
1695 | <field name="DATA_STS" desc="Data transfer interrupt status" bitrange="5:5"> | ||
1696 | <value name="NO" value="0x0" desc=""/> | ||
1697 | <value name="YES" value="0x1" desc=""/> | ||
1698 | </field> | ||
1699 | <field name="CARD_DETECT_STS" desc="Card detect interrupt status" bitrange="4:4"> | ||
1700 | <value name="NO" value="0x0" desc=""/> | ||
1701 | <value name="YES" value="0x1" desc=""/> | ||
1702 | </field> | ||
1703 | <field name="RESERVED3" desc="" bitrange="3:3"/> | ||
1704 | <field name="CMD_RSP_INT_EN" desc="Command and response transfer interrupt enable" bitrange="2:2"> | ||
1705 | <value name="DISABLE" value="0x0" desc=""/> | ||
1706 | <value name="ENABLE" value="0x1" desc=""/> | ||
1707 | </field> | ||
1708 | <field name="DATA_INT_EN" desc="Data transfer interrupt enable" bitrange="1:1"> | ||
1709 | <value name="DISABLE" value="0x0" desc=""/> | ||
1710 | <value name="ENABLE" value="0x1" desc=""/> | ||
1711 | </field> | ||
1712 | <field name="CARD_DETECT_INT_EN" desc="Card detect interrupt enable" bitrange="0:0"> | ||
1713 | <value name="DISABLE" value="0x0" desc=""/> | ||
1714 | <value name="ENABLE" value="0x1" desc=""/> | ||
1715 | </field> | ||
1716 | </reg> | ||
1717 | <reg name="CARD" desc=""> | ||
1718 | <addr name="CARD" addr="0x28"/> | ||
1719 | <field name="RESERVED31_7" desc="" bitrange="31:7"/> | ||
1720 | <field name="SELECT" desc="" bitrange="6:6"> | ||
1721 | <value name="NO" value="0x0" desc=""/> | ||
1722 | <value name="YES" value="0x1" desc=""/> | ||
1723 | </field> | ||
1724 | <field name="PWR_CTRL" desc="" bitrange="5:5"> | ||
1725 | <value name="NO" value="0x0" desc=""/> | ||
1726 | <value name="YES" value="0x1" desc=""/> | ||
1727 | </field> | ||
1728 | <field name="DETECT_INT_EN" desc="" bitrange="4:4"> | ||
1729 | <value name="NO" value="0x0" desc=""/> | ||
1730 | <value name="YES" value="0x1" desc=""/> | ||
1731 | </field> | ||
1732 | <field name="RESERVED3" desc="" bitrange="3:3"/> | ||
1733 | <field name="BUSY" desc="" bitrange="2:2"/> | ||
1734 | <field name="WR_PROTECT" desc="" bitrange="1:1"/> | ||
1735 | <field name="CARD_DETECT" desc="" bitrange="0:0"/> | ||
1736 | </reg> | ||
1737 | <reg name="CMDREST" desc="SD/MMC command and response transfer register"> | ||
1738 | <addr name="CMDREST" addr="0x30"/> | ||
1739 | <field name="RESERVED31_14" desc="" bitrange="31:14"/> | ||
1740 | <field name="CMD_XFER" desc="Command transfer signal" bitrange="13:13"> | ||
1741 | <value name="END" value="0x0" desc=""/> | ||
1742 | <value name="BEGIN" value="0x1" desc=""/> | ||
1743 | </field> | ||
1744 | <field name="RSP_XFER" desc="Response transfer signal" bitrange="12:12"> | ||
1745 | <value name="END" value="0x0" desc=""/> | ||
1746 | <value name="BEGIN" value="0x1" desc=""/> | ||
1747 | </field> | ||
1748 | <field name="RSP_TYPE" desc="Response transfer type" bitrange="11:9"> | ||
1749 | <value name="R1" value="0x0" desc=""/> | ||
1750 | <value name="R1b" value="0x1" desc=""/> | ||
1751 | <value name="R2" value="0x2" desc=""/> | ||
1752 | <value name="R3" value="0x3" desc=""/> | ||
1753 | <value name="R6" value="0x6" desc=""/> | ||
1754 | </field> | ||
1755 | <field name="CMD_RSP_ERR_STS" desc="" bitrange="8:8"> | ||
1756 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1757 | <value name="ERROR" value="0x1" desc=""/> | ||
1758 | </field> | ||
1759 | <field name="RESERVED7_6" desc="" bitrange="7:6"/> | ||
1760 | <field name="CMD_INDEX" desc="" bitrange="5:0"/> | ||
1761 | </reg> | ||
1762 | <reg name="CMDRES" desc="SD/MMC command and response transfer status register"> | ||
1763 | <addr name="CMDRES" addr="0x34"/> | ||
1764 | <field name="RESERVED31_9" desc="" bitrange="31:9"/> | ||
1765 | <field name="CMD_RSP_BUS_ERR" desc="Card command and response bus conflict error" bitrange="31:0"> | ||
1766 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1767 | <value name="ERROR" value="0x1" desc=""/> | ||
1768 | </field> | ||
1769 | <field name="CMD_XFER" desc="" bitrange="8:8"> | ||
1770 | <value name="END" value="0x0" desc=""/> | ||
1771 | <value name="BEGIN" value="0x1" desc=""/> | ||
1772 | </field> | ||
1773 | <field name="RSP_XFER" desc="" bitrange="7:7"> | ||
1774 | <value name="END" value="0x0" desc=""/> | ||
1775 | <value name="BEGIN" value="0x1" desc=""/> | ||
1776 | </field> | ||
1777 | <field name="CMD_RSP_ERR" desc="Card command and response error status" bitrange="6:6"> | ||
1778 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1779 | <value name="ERROR" value="0x1" desc=""/> | ||
1780 | </field> | ||
1781 | <field name="RSP_TIMEOUT_ERR" desc="" bitrange="4:4"> | ||
1782 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1783 | <value name="ERROR" value="0x1" desc=""/> | ||
1784 | </field> | ||
1785 | <field name="RSP_BIT_ERR" desc="" bitrange="3:3"> | ||
1786 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1787 | <value name="ERROR" value="0x1" desc=""/> | ||
1788 | </field> | ||
1789 | <field name="RSP_INDEX_ERR" desc="" bitrange="2:2"> | ||
1790 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1791 | <value name="ERROR" value="0x1" desc=""/> | ||
1792 | </field> | ||
1793 | <field name="RSP_CRC_ERR" desc="" bitrange="1:1"> | ||
1794 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1795 | <value name="ERROR" value="0x1" desc=""/> | ||
1796 | </field> | ||
1797 | <field name="RSP_END_BIT_ERR" desc="" bitrange="0:0"> | ||
1798 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1799 | <value name="ERROR" value="0x1" desc=""/> | ||
1800 | </field> | ||
1801 | </reg> | ||
1802 | <reg name="DATAT" desc="SD/MMC data transfer register "> | ||
1803 | <addr name="DATAT" addr="0x3c"/> | ||
1804 | <field name="RESERVED_31_14" desc="" bitrange="31:14"/> | ||
1805 | <field name="DATA_XFER_BUS_ERR" desc="" bitrange="31:0"> | ||
1806 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1807 | <value name="ERROR" value="0x0" desc=""/> | ||
1808 | </field> | ||
1809 | <field name="DATA_XFER" desc="" bitrange="13:13"> | ||
1810 | <value name="END" value="0x0" desc=""/> | ||
1811 | <value name="BEGIN" value="0x1" desc=""/> | ||
1812 | </field> | ||
1813 | <field name="DATA_XFER_DIR" desc="" bitrange="12:12"> | ||
1814 | <value name="READ" value="0x0" desc=""/> | ||
1815 | <value name="WRITE" value="0x1" desc=""/> | ||
1816 | </field> | ||
1817 | <field name="DATA_BUS_WIDTH" desc="" bitrange="11:11"> | ||
1818 | <value name="1BIT" value="0x0" desc=""/> | ||
1819 | <value name="4BITS" value="0x1" desc=""/> | ||
1820 | </field> | ||
1821 | <field name="DMA_EN" desc="" bitrange="10:10"> | ||
1822 | <value name="DISABLE" value="0x0" desc=""/> | ||
1823 | <value name="ENABLE" value="0x1" desc=""/> | ||
1824 | </field> | ||
1825 | <field name="DATA_XFER_CYCLE" desc="" bitrange="9:9"> | ||
1826 | <value name="SINGLE_LAST" value="0x0" desc=""/> | ||
1827 | <value name="MULTIPLE" value="0x1" desc=""/> | ||
1828 | </field> | ||
1829 | <field name="DATA_XFER_ERR" desc="" bitrange="8:8"> | ||
1830 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1831 | <value name="ERROR" value="0x1" desc=""/> | ||
1832 | </field> | ||
1833 | <field name="DATA_XFER_TIMEOUT" desc="" bitrange="6:6"> | ||
1834 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1835 | <value name="ERROR" value="0x1" desc=""/> | ||
1836 | </field> | ||
1837 | <field name="DATA_XFER_CRC_ERR" desc="" bitrange="5:5"> | ||
1838 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1839 | <value name="ERROR" value="0x1" desc=""/> | ||
1840 | </field> | ||
1841 | <field name="RX_DATA_START_BIT_ERR" desc="" bitrange="4:4"> | ||
1842 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1843 | <value name="ERROR" value="0x1" desc=""/> | ||
1844 | </field> | ||
1845 | <field name="RX_DATA_END_BIT_ERR" desc="" bitrange="3:3"> | ||
1846 | <value name="NO_ERROR" value="0x0" desc=""/> | ||
1847 | <value name="ERROR" value="0x1" desc=""/> | ||
1848 | </field> | ||
1849 | <field name="DATA_XFER_CRC_STS" desc="" bitrange="2:0"> | ||
1850 | <value name="NO_ERROR" value="0x2" desc=""/> | ||
1851 | <value name="CRC_ERROR" value="0x5" desc=""/> | ||
1852 | <value name="NO_RSP" value="0x7" desc=""/> | ||
1853 | </field> | ||
1854 | </reg> | ||
1855 | <reg name="CMD" desc=""> | ||
1856 | <addr name="CMD" addr="0x40"/> | ||
1857 | </reg> | ||
1858 | <reg name="RES3" desc=""> | ||
1859 | <addr name="RES3" addr="0x44"/> | ||
1860 | </reg> | ||
1861 | <reg name="RES2" desc=""> | ||
1862 | <addr name="RES2" addr="0x48"/> | ||
1863 | </reg> | ||
1864 | <reg name="RES1" desc=""> | ||
1865 | <addr name="RES1" addr="0x4c"/> | ||
1866 | </reg> | ||
1867 | <reg name="RES0" desc=""> | ||
1868 | <addr name="RES0" addr="0x50"/> | ||
739 | </reg> | 1869 | </reg> |
740 | </dev> | 1870 | </dev> |
741 | <dev name="ADC" long_name="ADC" desc="4 channels 10-bit SAR A/D converter" version="1.0"> | 1871 | <dev name="SDRSTMC" long_name="SDRSTMC Static/SDRAM Memory Controller" desc="SDRSTMC Static/SDRAM Memory Controller" version="1.0"> |
742 | <addr name="ADC" addr="0x18030000" /> | 1872 | <addr name="SDRSTMC" addr="0x180b0000"/> |
743 | <reg name="DATA" addr="0x00"></reg> | 1873 | <reg name="MCSDR_MODE" desc=""> |
744 | <reg name="STAT" addr="0x04"></reg> | 1874 | <addr name="MCSDR_MODE" addr="0x100"/> |
745 | <reg name="CTRL" addr="0x08"></reg> | 1875 | </reg> |
746 | </dev> | 1876 | <reg name="MCSDR_ADDMAP" desc=""> |
747 | <dev name="GPIO" long_name="GPIO" desc="GPIO" version="1.0"> | 1877 | <addr name="MCSDR_ADDMAP" addr="0x104"/> |
748 | <addr name="GPIO1" addr="0x18038000" /> | 1878 | </reg> |
749 | <reg name="PEDR" addr="0x00"></reg> | 1879 | <reg name="MCSDR_ADDCFG" desc=""> |
750 | <reg name="PECON" addr="0x04"></reg> | 1880 | <addr name="MCSDR_ADDCFG" addr="0x108"/> |
751 | <reg name="PFDR" addr="0x08"></reg> | 1881 | </reg> |
752 | <reg name="PFCON" addr="0x0c"></reg> | 1882 | <reg name="MCSDR_BASIC" desc=""> |
753 | <reg name="_TEST" addr="0x20"></reg> | 1883 | <addr name="MCSDR_BASIC" addr="0x10c"/> |
754 | <reg name="IEE" addr="0x24"></reg> | 1884 | </reg> |
755 | <reg name="IEF" addr="0x28"></reg> | 1885 | <reg name="MCSDR_T_REF" desc=""> |
756 | <reg name="ISE" addr="0x34"></reg> | 1886 | <addr name="MCSDR_T_REF" addr="0x110"/> |
757 | <reg name="ISF" addr="0x38"></reg> | 1887 | </reg> |
758 | <reg name="IBEE" addr="0x44"></reg> | 1888 | <reg name="MCSDR_T_RFC" desc=""> |
759 | <reg name="IBEF" addr="0x48"></reg> | 1889 | <addr name="MCSDR_T_RFC" addr="0x114"/> |
760 | <reg name="IEVE" addr="0x54"></reg> | 1890 | </reg> |
761 | <reg name="IEVF" addr="0x58"></reg> | 1891 | <reg name="MCSDR_T_MRD" desc=""> |
762 | <reg name="ICE" addr="0x64"></reg> | 1892 | <addr name="MCSDR_T_MRD" addr="0x118"/> |
763 | <reg name="ICF" addr="0x68"></reg> | 1893 | </reg> |
764 | <reg name="ISR" addr="0x74"></reg> | 1894 | <reg name="MCSDR_T_RP" desc=""> |
765 | </dev> | 1895 | <addr name="MCSDR_T_RP" addr="0x120"/> |
766 | <dev name="INTC" long_name="Interrupt controller" desc="Interrupt controller" version="1.0"> | 1896 | </reg> |
767 | <addr name="INTC" addr="0x18080000" /> | 1897 | <reg name="MCSDR_T_RCD" desc=""> |
768 | <reg name="INTC_SCRn"> | 1898 | <addr name="MCSDR_T_RCD" addr="0x124"/> |
769 | <formula string="n*0x04" /> | 1899 | </reg> |
770 | <addr name="SCR0" addr="0x00" /> | 1900 | <reg name="MCST0_T_CEWD" desc=""> |
771 | <addr name="SCR1" addr="0x04" /> | 1901 | <addr name="MCST0_T_CEWD" addr="0x200"/> |
772 | <addr name="SCR2" addr="0x08" /> | 1902 | </reg> |
773 | <addr name="SCR3" addr="0x0c" /> | 1903 | <reg name="MCST0_T_CE2WE" desc=""> |
774 | <addr name="SCR4" addr="0x10" /> | 1904 | <addr name="MCST0_T_CE2WE" addr="0x204"/> |
775 | <addr name="SCR5" addr="0x14" /> | 1905 | </reg> |
776 | <addr name="SCR6" addr="0x18" /> | 1906 | <reg name="MCST0_WEWD" desc=""> |
777 | <addr name="SCR7" addr="0x1c" /> | 1907 | <addr name="MCST0_WEWD" addr="0x208"/> |
778 | <addr name="SCR8" addr="0x20" /> | 1908 | </reg> |
779 | <addr name="SCR9" addr="0x24" /> | 1909 | <reg name="MCST0_T_WE2CE" desc=""> |
780 | <addr name="SCR10" addr="0x28" /> | 1910 | <addr name="MCST0_T_WE2CE" addr="0x20c"/> |
781 | <addr name="SCR11" addr="0x2c" /> | 1911 | </reg> |
782 | <addr name="SCR12" addr="0x30" /> | 1912 | <reg name="MCST0_T_CEWDR" desc=""> |
783 | <addr name="SCR13" addr="0x34" /> | 1913 | <addr name="MCST0_T_CEWDR" addr="0x210"/> |
784 | <addr name="SCR14" addr="0x38" /> | 1914 | </reg> |
785 | <addr name="SCR15" addr="0x3c" /> | 1915 | <reg name="MCST0_T_CE2RD" desc=""> |
786 | <addr name="SCR16" addr="0x40" /> | 1916 | <addr name="MCST0_T_CE2RD" addr="0x214"/> |
787 | <addr name="SCR17" addr="0x44" /> | 1917 | </reg> |
788 | <addr name="SCR18" addr="0x48" /> | 1918 | <reg name="MCST0_T_RDWD" desc=""> |
789 | <addr name="SCR19" addr="0x4c" /> | 1919 | <addr name="MCST0_T_RDWD" addr="0x218"/> |
790 | <addr name="SCR20" addr="0x50" /> | 1920 | </reg> |
791 | <addr name="SCR21" addr="0x54" /> | 1921 | <reg name="MCST0_T_RD2CE" desc=""> |
792 | <addr name="SCR22" addr="0x58" /> | 1922 | <addr name="MCST0_T_RD2CE" addr="0x21c"/> |
793 | <addr name="SCR23" addr="0x5c" /> | 1923 | </reg> |
794 | <addr name="SCR24" addr="0x60" /> | 1924 | <reg name="MCST0_BASIC" desc=""> |
795 | <addr name="SCR25" addr="0x64" /> | 1925 | <addr name="MCST0_BASIC" addr="0x220"/> |
796 | <addr name="SCR26" addr="0x68" /> | 1926 | </reg> |
797 | <addr name="SCR27" addr="0x6c" /> | 1927 | <reg name="MCST1_T_CEWD" desc=""> |
798 | <addr name="SCR28" addr="0x70" /> | 1928 | <addr name="MCST1_T_CEWD" addr="0x300"/> |
799 | <addr name="SCR29" addr="0x74" /> | 1929 | </reg> |
800 | <addr name="SCR30" addr="0x78" /> | 1930 | <reg name="MCST1_T_CE2WE" desc=""> |
801 | <addr name="SCR31" addr="0x7c" /> | 1931 | <addr name="MCST1_T_CE2WE" addr="0x304"/> |
802 | </reg> | 1932 | </reg> |
803 | <reg name="ISR" addr="0x104"></reg> | 1933 | <reg name="MCST1_WEWD" desc=""> |
804 | <reg name="IPR" addr="0x108"></reg> | 1934 | <addr name="MCST1_WEWD" addr="0x308"/> |
805 | <reg name="IMR" addr="0x10c"></reg> | 1935 | </reg> |
806 | <reg name="IECR" addr="0x114"></reg> | 1936 | <reg name="MCST1_T_WE2CE" desc=""> |
807 | <reg name="ICCR" addr="0x118"></reg> | 1937 | <addr name="MCST1_T_WE2CE" addr="0x30c"/> |
808 | <reg name="ISCR" addr="0x11c"></reg> | 1938 | </reg> |
809 | <reg name="TEST" addr="0x124"></reg> | 1939 | <reg name="MCST1_T_CEWDR" desc=""> |
810 | </dev> | 1940 | <addr name="MCST1_T_CEWDR" addr="0x310"/> |
811 | <dev name="ARB" long_name="AHB bus arbiter" desc="AHB bus arbiter" version="1.0"> | 1941 | </reg> |
812 | <addr name="ARB" addr="0x18084000" /> | 1942 | <reg name="MCST1_T_CE2RD" desc=""> |
813 | <reg name="MODE" addr="0x00"></reg> | 1943 | <addr name="MCST1_T_CE2RD" addr="0x314"/> |
814 | <reg name="PRIOn"> | 1944 | </reg> |
815 | <formula string="n*0x04 + 0x04" /> | 1945 | <reg name="MCST1_T_RDWD" desc=""> |
816 | <addr name="PRIO1" addr="0x04" /> | 1946 | <addr name="MCST1_T_RDWD" addr="0x318"/> |
817 | <addr name="PRIO2" addr="0x08" /> | 1947 | </reg> |
818 | <addr name="PRIO3" addr="0x0c" /> | 1948 | <reg name="MCST1_T_RD2CE" desc=""> |
819 | <addr name="PRIO4" addr="0x10" /> | 1949 | <addr name="MCST1_T_RD2CE" addr="0x31c"/> |
820 | <addr name="PRIO5" addr="0x14" /> | 1950 | </reg> |
821 | <addr name="PRIO6" addr="0x18" /> | 1951 | <reg name="MCST1_BASIC" desc=""> |
822 | <addr name="PRIO7" addr="0x1c" /> | 1952 | <addr name="MCST1_BASIC" addr="0x320"/> |
823 | <addr name="PRIO8" addr="0x20" /> | ||
824 | <addr name="PRIO9" addr="0x24" /> | ||
825 | <addr name="PRIO10" addr="0x28" /> | ||
826 | <addr name="PRIO11" addr="0x2c" /> | ||
827 | <addr name="PRIO12" addr="0x30" /> | ||
828 | <addr name="PRIO13" addr="0x34" /> | ||
829 | <addr name="PRIO14" addr="0x38" /> | ||
830 | <addr name="PRIO15" addr="0x3c" /> | ||
831 | </reg> | 1953 | </reg> |
832 | </dev> | 1954 | </dev> |
833 | <dev name="MAILBOX" long_name="CPU-DSP mailbox" desc="CPU-DSP mailbox" version="1.0"> | 1955 | <dev name="SPI" long_name="Serial peripherial interface" desc="Serial peripherial interface" version="1.0"> |
834 | <addr name="MAILBOX" addr="0x18088000" /> | 1956 | <addr name="SPI" addr="0x18018000"/> |
835 | <reg name="MAILBOX_ID" addr="0x00"></reg> | 1957 | <reg name="TXR" desc=""> |
836 | <reg name="H2C_STA" addr="0x10"></reg> | 1958 | <addr name="TXR" addr="0x0"/> |
837 | <reg name="H2Cn_DATA"> | 1959 | </reg> |
838 | <formula string="n*0x08 + 0x20" /> | 1960 | <reg name="RXR" desc=""> |
839 | <addr name="H2C0_DATA" addr="0x20" /> | 1961 | <addr name="RXR" addr="0x0"/> |
840 | <addr name="H2C1_DATA" addr="0x28" /> | 1962 | </reg> |
841 | <addr name="H2C2_DATA" addr="0x30" /> | 1963 | <reg name="IER" desc=""> |
842 | <addr name="H2C3_DATA" addr="0x38" /> | 1964 | <addr name="IER" addr="0x4"/> |
843 | </reg> | 1965 | </reg> |
844 | <reg name="H2Cn_CMD"> | 1966 | <reg name="FCR" desc=""> |
845 | <formula string="n*0x08 + 0x24" /> | 1967 | <addr name="FCR" addr="0x8"/> |
846 | <addr name="H2C0_CMD" addr="0x24" /> | 1968 | </reg> |
847 | <addr name="H2C1_CMD" addr="0x2c" /> | 1969 | <reg name="FWCR" desc=""> |
848 | <addr name="H2C2_CMD" addr="0x34" /> | 1970 | <addr name="FWCR" addr="0xc"/> |
849 | <addr name="H2C3_CMD" addr="0x3c" /> | 1971 | </reg> |
850 | </reg> | 1972 | <reg name="DLYCR" desc=""> |
851 | <reg name="C2H_STA" addr="0x40"></reg> | 1973 | <addr name="DLYCR" addr="0x10"/> |
852 | <reg name="C2Hn_DATA"> | 1974 | </reg> |
853 | <formula string="n*0x08 + 0x50" /> | 1975 | <reg name="TXCR" desc=""> |
854 | <addr name="C2H0_DATA" addr="0x50" /> | 1976 | <addr name="TXCR" addr="0x14"/> |
855 | <addr name="C2H1_DATA" addr="0x58" /> | 1977 | </reg> |
856 | <addr name="C2H2_DATA" addr="0x60" /> | 1978 | <reg name="RXCR" desc=""> |
857 | <addr name="C2H3_DATA" addr="0x68" /> | 1979 | <addr name="RXCR" addr="0x18"/> |
858 | </reg> | 1980 | </reg> |
859 | <reg name="C2Hn_CMD"> | 1981 | <reg name="SSCR" desc=""> |
860 | <formula string="n*0x08 + 0x54" /> | 1982 | <addr name="SSCR" addr="0x1c"/> |
861 | <addr name="C2H0_CMD" addr="0x54" /> | 1983 | </reg> |
862 | <addr name="C2H1_CMD" addr="0x5c" /> | 1984 | <reg name="ISR" desc=""> |
863 | <addr name="C2H2_CMD" addr="0x64" /> | 1985 | <addr name="ISR" addr="0x20"/> |
864 | <addr name="C2H3_CMD" addr="0x6c" /> | ||
865 | </reg> | 1986 | </reg> |
866 | </dev> | 1987 | </dev> |
867 | <dev name="HDMA" long_name="AHB DMA" desc="AHB DMA" version="1.0"> | 1988 | <dev name="TIMER" long_name="TIMER" desc="Timer module" version="1.0"> |
868 | <addr name="HDMA" addr="0x18090000" /> | 1989 | <addr name="TIMER0" addr="0x18000000"/> |
869 | <reg name="CON0" addr="0x00"></reg> | 1990 | <addr name="TIMER1" addr="0x18000010"/> |
870 | <reg name="CON1" addr="0x04"></reg> | 1991 | <addr name="TIMER2" addr="0x18000020"/> |
871 | <reg name="ISRC0" addr="0x08"></reg> | 1992 | <reg name="TMRnLR" desc=""> |
872 | <reg name="IDST0" addr="0x0C"></reg> | 1993 | <formula string="n*0x10"/> |
873 | <reg name="ICNT0" addr="0x10"></reg> | 1994 | <addr name="LR" addr="0x0"/> |
874 | <reg name="ISRC1" addr="0x14"></reg> | 1995 | </reg> |
875 | <reg name="IDST1" addr="0x18"></reg> | 1996 | <reg name="TMRnCVR" desc=""> |
876 | <reg name="ICNT1" addr="0x1C"></reg> | 1997 | <formula string="0x04+n*0x10"/> |
877 | <reg name="CSRC0" addr="0x20"></reg> | 1998 | <addr name="CVR" addr="0x4"/> |
878 | <reg name="CDST0" addr="0x24"></reg> | 1999 | </reg> |
879 | <reg name="CCNT0" addr="0x28"></reg> | 2000 | <reg name="TMRnCON" desc=""> |
880 | <reg name="CSRC1" addr="0x2C"></reg> | 2001 | <formula string="0x08+n*0x10"/> |
881 | <reg name="CDST1" addr="0x30"></reg> | 2002 | <addr name="CON" addr="0x8"/> |
882 | <reg name="CCNT1" addr="0x34"></reg> | 2003 | </reg> |
883 | <reg name="ISR" addr="0x38"></reg> | ||
884 | <reg name="DSR" addr="0x3C"></reg> | ||
885 | <reg name="ISCNT0" addr="0x40"></reg> | ||
886 | <reg name="IPNCNTD0" addr="0x44"></reg> | ||
887 | <reg name="IADDR_BS0" addr="0x48"></reg> | ||
888 | <reg name="ISCNT1" addr="0x4C"></reg> | ||
889 | <reg name="IPNCNTD1" addr="0x50"></reg> | ||
890 | <reg name="IADDR_BS1" addr="0x54"></reg> | ||
891 | <reg name="CSCNT0" addr="0x58"></reg> | ||
892 | <reg name="CPNCNTD0" addr="0x5C"></reg> | ||
893 | <reg name="CADDR_BS0" addr="0x60"></reg> | ||
894 | <reg name="CSCNT1" addr="0x64"></reg> | ||
895 | <reg name="CPNCNTD1" addr="0x68"></reg> | ||
896 | <reg name="CADDR_BS1" addr="0x6C"></reg> | ||
897 | <reg name="PACNT0" addr="0x70"></reg> | ||
898 | <reg name="PACNT1" addr="0x74"></reg> | ||
899 | </dev> | 2004 | </dev> |
900 | <dev name="A2A_DMA" long_name="AHB-to-AHB bridge" desc="AHB-to-AHB bridge with DMA" version="1.0"> | 2005 | <dev name="UART" long_name="UART" desc="UART" version="1.0"> |
901 | <addr name="A2A_DMA" addr="0x18094000" /> | 2006 | <addr name="UART0" addr="0x18004000"/> |
902 | <reg name="CON0" addr="0x00"></reg> | 2007 | <addr name="UART1" addr="0x18008000"/> |
903 | <reg name="ISRC0" addr="0x04"></reg> | 2008 | <reg name="UARTn_RBR" desc=""> |
904 | <reg name="IDST0" addr="0x08"></reg> | 2009 | <formula string="n*0x4000"/> |
905 | <reg name="ICNT0" addr="0x0C"></reg> | 2010 | <addr name="UARTn_RBR" addr="0x0"/> |
906 | <reg name="CSRC0" addr="0x10"></reg> | 2011 | <addr name="RBR" addr="0x0"/> |
907 | <reg name="CDST0" addr="0x14"></reg> | 2012 | </reg> |
908 | <reg name="CCNT0" addr="0x18"></reg> | 2013 | <reg name="UARTn_THR" desc=""> |
909 | <reg name="CON1" addr="0x1C"></reg> | 2014 | <formula string="n*0x4000"/> |
910 | <reg name="ISRC1" addr="0x20"></reg> | 2015 | <addr name="UARTn_THR" addr="0x0"/> |
911 | <reg name="IDST1" addr="0x24"></reg> | 2016 | <addr name="THR" addr="0x0"/> |
912 | <reg name="ICNT1" addr="0x28"></reg> | 2017 | </reg> |
913 | <reg name="CSRC1" addr="0x2C"></reg> | 2018 | <reg name="UARTn_DLL" desc=""> |
914 | <reg name="CDST1" addr="0x30"></reg> | 2019 | <formula string="n*0x4000"/> |
915 | <reg name="CCNT1" addr="0x34"></reg> | 2020 | <addr name="UARTn_DLL" addr="0x0"/> |
916 | <reg name="INT_STS" addr="0x38"></reg> | 2021 | <addr name="DLL" addr="0x0"/> |
917 | <reg name="DMA_STS" addr="0x3C"></reg> | 2022 | </reg> |
918 | <reg name="ERR_ADR0" addr="0x40"></reg> | 2023 | <reg name="UARTn_DLH" desc=""> |
919 | <reg name="ERR_OP0" addr="0x44"></reg> | 2024 | <formula string="0x04+n*0x4000"/> |
920 | <reg name="ERR_ADR1" addr="0x48"></reg> | 2025 | <addr name="UARTn_DLH" addr="0x4"/> |
921 | <reg name="ERR_OP1" addr="0x4C"></reg> | 2026 | <addr name="DLH" addr="0x4"/> |
922 | <reg name="LCNT0" addr="0x50"></reg> | 2027 | </reg> |
923 | <reg name="LCNT1" addr="0x54"></reg> | 2028 | <reg name="UARTn_IER" desc=""> |
924 | <reg name="DOMAIN" addr="0x58"></reg> | 2029 | <formula string="0x04+n*0x4000"/> |
2030 | <addr name="UARTn_IER" addr="0x4"/> | ||
2031 | <addr name="IER" addr="0x4"/> | ||
2032 | </reg> | ||
2033 | <reg name="UARTn_IIR" desc=""> | ||
2034 | <formula string="0x08+n*0x4000"/> | ||
2035 | <addr name="UARTn_IIR" addr="0x8"/> | ||
2036 | <addr name="IIR" addr="0x8"/> | ||
2037 | </reg> | ||
2038 | <reg name="UARTn_FCR" desc=""> | ||
2039 | <formula string="0x08+n*0x4000"/> | ||
2040 | <addr name="UARTn_FCR" addr="0x8"/> | ||
2041 | <addr name="FCR" addr="0x8"/> | ||
2042 | </reg> | ||
2043 | <reg name="UARTn_LCR" desc=""> | ||
2044 | <formula string="0x0c+n*0x4000"/> | ||
2045 | <addr name="UARTn_LCR" addr="0xc"/> | ||
2046 | <addr name="LCR" addr="0xc"/> | ||
2047 | </reg> | ||
2048 | <reg name="UARTn_MCR" desc=""> | ||
2049 | <formula string="0x10+n*0x4000"/> | ||
2050 | <addr name="UARTn_MCR" addr="0x10"/> | ||
2051 | <addr name="MCR" addr="0x10"/> | ||
2052 | </reg> | ||
2053 | <reg name="UARTn_LSR" desc=""> | ||
2054 | <formula string="0x14+n*0x4000"/> | ||
2055 | <addr name="UARTn_LSR" addr="0x14"/> | ||
2056 | <addr name="LSR" addr="0x14"/> | ||
2057 | </reg> | ||
2058 | <reg name="UARTn_MSR" desc=""> | ||
2059 | <formula string="0x18+n*0x4000"/> | ||
2060 | <addr name="UARTn_MSR" addr="0x18"/> | ||
2061 | <addr name="MSR" addr="0x18"/> | ||
2062 | </reg> | ||
925 | </dev> | 2063 | </dev> |
926 | <dev name="UDC" long_name="USB 2.0 Device Controller" desc="USB 2.0 Device Controller" version="1.0"> | 2064 | <dev name="UDC" long_name="USB 2.0 Device Controller" desc="USB 2.0 Device Controller" version="1.0"> |
927 | <addr name="UDC" addr="0x180a0000" /> | 2065 | <addr name="UDC" addr="0x180a0000"/> |
928 | <reg name="DEV_CTL" addr="0x08"> | 2066 | <reg name="DEV_CTL" desc=""> |
929 | <field name="RESERVED" bitrange="31:10"/> | 2067 | <addr name="DEV_CTL" addr="0x8"/> |
930 | <field name="TEST_MODE" bitrange="9:9"/> | 2068 | <field name="RESERVED" desc="" bitrange="31:10"/> |
931 | <field name="CSR_DONE" bitrange="8:8"/> | 2069 | <field name="TEST_MODE" desc="" bitrange="9:9"/> |
932 | <field name="SOFT_POR" bitrange="7:7"/> | 2070 | <field name="CSR_DONE" desc="" bitrange="8:8"/> |
933 | <field name="DEV_PHYBUS16_8" bitrange="6:6"/> | 2071 | <field name="SOFT_POR" desc="" bitrange="7:7"/> |
934 | <field name="DEV_RESUME" bitrange="5:5"/> | 2072 | <field name="DEV_PHYBUS16_8" desc="" bitrange="6:6"/> |
935 | <field name="DEV_SOFT_CN" bitrange="4:4"/> | 2073 | <field name="DEV_RESUME" desc="" bitrange="5:5"/> |
936 | <field name="DEV_SELF_PWR" bitrange="3:3"/> | 2074 | <field name="DEV_SOFT_CN" desc="" bitrange="4:4"/> |
937 | <field name="DEV_RMTWKP" bitrange="2:2"/> | 2075 | <field name="DEV_SELF_PWR" desc="" bitrange="3:3"/> |
938 | <field name="DEV_SPEED" bitrange="1:0"> | 2076 | <field name="DEV_RMTWKP" desc="" bitrange="2:2"/> |
939 | <value name="HS" value="0x00" desc="High Speed"/> | 2077 | <field name="DEV_SPEED" desc="" bitrange="1:0"> |
940 | </field> | 2078 | <value name="HS" value="0x0" desc="High Speed"/> |
941 | </reg> | 2079 | </field> |
942 | <reg name="DEV_INFO" addr="0x10"> | 2080 | </reg> |
943 | <field name="RESERVED" bitrange="31:23"/> | 2081 | <reg name="DEV_INFO" desc=""> |
944 | <field name="DEV_SPEED" bitrange="22:21"> | 2082 | <addr name="DEV_INFO" addr="0x10"/> |
945 | <value name="HS" value="0x00" desc="High Speed"/> | 2083 | <field name="RESERVED" desc="" bitrange="31:23"/> |
946 | <value name="FS" value="0x03" desc="Full Speed"/> | 2084 | <field name="DEV_SPEED" desc="" bitrange="22:21"> |
947 | </field> | 2085 | <value name="HS" value="0x0" desc="High Speed"/> |
948 | <field name="VBUS_SYNC" bitrange="20:20"> | 2086 | <value name="FS" value="0x3" desc="Full Speed"/> |
949 | <value name="CONNECTION" value="0x01"/> | 2087 | </field> |
950 | <value name="DISCONNECTION" value="0x00"/> | 2088 | <field name="VBUS_SYNC" desc="" bitrange="20:20"> |
951 | </field> | 2089 | <value name="DISCONNECTION" value="0x0" desc=""/> |
952 | <field name="DEV_ALTINTF" bitrange="19:16"/> | 2090 | <value name="CONNECTION" value="0x1" desc=""/> |
953 | <field name="INTF_NUMBER" bitrange="15:12"/> | 2091 | </field> |
954 | <field name="CFG_NUMBER" bitrange="11:8"/> | 2092 | <field name="DEV_ALTINTF" desc="" bitrange="19:16"/> |
955 | <field name="DEV_EN" bitrange="7:7"/> | 2093 | <field name="INTF_NUMBER" desc="" bitrange="15:12"/> |
956 | <field name="DEV_ADDRESS" bitrange="6:0"/> | 2094 | <field name="CFG_NUMBER" desc="" bitrange="11:8"/> |
957 | </reg> | 2095 | <field name="DEV_EN" desc="" bitrange="7:7"/> |
958 | <reg name="EN_INT" addr="0x14"> | 2096 | <field name="DEV_ADDRESS" desc="" bitrange="6:0"/> |
959 | <field name="RESERVED" bitrange="31:27"/> | 2097 | </reg> |
960 | <field name="TEST_PKT" bitrange="26:26"/> | 2098 | <reg name="EN_INT" desc=""> |
961 | <field name="TEST_K" bitrange="25:25"/> | 2099 | <addr name="EN_INT" addr="0x14"/> |
962 | <field name="TEST_J" bitrange="24:24"/> | 2100 | <field name="RESERVED" desc="" bitrange="31:27"/> |
963 | <field name="TEST_SE0_NAK" bitrange="23:23"/> | 2101 | <field name="TEST_PKT" desc="" bitrange="26:26"/> |
964 | <field name="EN_IIN15_INTR" bitrange="22:22"/> | 2102 | <field name="TEST_K" desc="" bitrange="25:25"/> |
965 | <field name="EN_BIN14_INTR" bitrange="21:21"/> | 2103 | <field name="TEST_J" desc="" bitrange="24:24"/> |
966 | <field name="EN_BOUT13_INTR" bitrange="20:20"/> | 2104 | <field name="TEST_SE0_NAK" desc="" bitrange="23:23"/> |
967 | <field name="EN_IIN12_INTR" bitrange="19:19"/> | 2105 | <field name="EN_IIN15_INTR" desc="" bitrange="22:22"/> |
968 | <field name="EN_BIN11_INTR" bitrange="18:18"/> | 2106 | <field name="EN_BIN14_INTR" desc="" bitrange="21:21"/> |
969 | <field name="EN_BOUT10_INTR" bitrange="17:17"/> | 2107 | <field name="EN_BOUT13_INTR" desc="" bitrange="20:20"/> |
970 | <field name="EN_IIN9_INTR" bitrange="16:16"/> | 2108 | <field name="EN_IIN12_INTR" desc="" bitrange="19:19"/> |
971 | <field name="EN_BIN8_INTR" bitrange="15:15"/> | 2109 | <field name="EN_BIN11_INTR" desc="" bitrange="18:18"/> |
972 | <field name="EN_BOUT7_INTR" bitrange="14:14"/> | 2110 | <field name="EN_BOUT10_INTR" desc="" bitrange="17:17"/> |
973 | <field name="EN_IIN6_INTR" bitrange="13:13"/> | 2111 | <field name="EN_IIN9_INTR" desc="" bitrange="16:16"/> |
974 | <field name="EN_BIN5_INTR" bitrange="12:12"/> | 2112 | <field name="EN_BIN8_INTR" desc="" bitrange="15:15"/> |
975 | <field name="EN_BOUT4_INTR" bitrange="11:11"/> | 2113 | <field name="EN_BOUT7_INTR" desc="" bitrange="14:14"/> |
976 | <field name="EN_IIN3_INTR" bitrange="10:10"/> | 2114 | <field name="EN_IIN6_INTR" desc="" bitrange="13:13"/> |
977 | <field name="EN_BIN2_INTR" bitrange="9:9"/> | 2115 | <field name="EN_BIN5_INTR" desc="" bitrange="12:12"/> |
978 | <field name="EN_BOUT1_INTR" bitrange="8:8"/> | 2116 | <field name="EN_BOUT4_INTR" desc="" bitrange="11:11"/> |
979 | <field name="RESERVED" bitrange="7:7"/> | 2117 | <field name="EN_IIN3_INTR" desc="" bitrange="10:10"/> |
980 | <field name="EN_SUSP_INTR" bitrange="6:6"/> | 2118 | <field name="EN_BIN2_INTR" desc="" bitrange="9:9"/> |
981 | <field name="EN_RSUME_INTR" bitrange="5:5"/> | 2119 | <field name="EN_BOUT1_INTR" desc="" bitrange="8:8"/> |
982 | <field name="EN_USBRST_INTR" bitrange="4:4"/> | 2120 | <field name="RESERVED" desc="" bitrange="7:7"/> |
983 | <field name="EN_OUT0_INTR" bitrange="3:3"/> | 2121 | <field name="EN_SUSP_INTR" desc="" bitrange="6:6"/> |
984 | <field name="EN_IN0_INTR" bitrange="2:2"/> | 2122 | <field name="EN_RSUME_INTR" desc="" bitrange="5:5"/> |
985 | <field name="EN_SETUP_INTR" bitrange="1:1"/> | 2123 | <field name="EN_USBRST_INTR" desc="" bitrange="4:4"/> |
986 | <field name="EN_SOF_INTR" bitrange="0:0"/> | 2124 | <field name="EN_OUT0_INTR" desc="" bitrange="3:3"/> |
987 | </reg> | 2125 | <field name="EN_IN0_INTR" desc="" bitrange="2:2"/> |
988 | <reg name="INT2FLAG" addr="0x18"> | 2126 | <field name="EN_SETUP_INTR" desc="" bitrange="1:1"/> |
989 | <field name="RESERVED31_27" bitrange="31:27"/> | 2127 | <field name="EN_SOF_INTR" desc="" bitrange="0:0"/> |
990 | <field name="TEST_PKT" bitrange="26:26"/> | 2128 | </reg> |
991 | <field name="TEST_K" bitrange="25:25"/> | 2129 | <reg name="INT2FLAG" desc=""> |
992 | <field name="TEST_J" bitrange="24:24"/> | 2130 | <addr name="INT2FLAG" addr="0x18"/> |
993 | <field name="TEST_SE0_NAK" bitrange="23:23"/> | 2131 | <field name="RESERVED31_27" desc="" bitrange="31:27"/> |
994 | <field name="IIN15_INTR" bitrange="22:22"/> | 2132 | <field name="TEST_PKT" desc="" bitrange="26:26"/> |
995 | <field name="BIN14_INTR" bitrange="21:21"/> | 2133 | <field name="TEST_K" desc="" bitrange="25:25"/> |
996 | <field name="BOUT13_INTR" bitrange="20:20"/> | 2134 | <field name="TEST_J" desc="" bitrange="24:24"/> |
997 | <field name="IIN12_INTR" bitrange="19:19"/> | 2135 | <field name="TEST_SE0_NAK" desc="" bitrange="23:23"/> |
998 | <field name="BIN11_INTR" bitrange="18:18"/> | 2136 | <field name="IIN15_INTR" desc="" bitrange="22:22"/> |
999 | <field name="BOUT10_INTR" bitrange="17:17"/> | 2137 | <field name="BIN14_INTR" desc="" bitrange="21:21"/> |
1000 | <field name="IIN9_INTR" bitrange="16:16"/> | 2138 | <field name="BOUT13_INTR" desc="" bitrange="20:20"/> |
1001 | <field name="BIN8_INTR" bitrange="15:15"/> | 2139 | <field name="IIN12_INTR" desc="" bitrange="19:19"/> |
1002 | <field name="BOUT7_INTR" bitrange="14:14"/> | 2140 | <field name="BIN11_INTR" desc="" bitrange="18:18"/> |
1003 | <field name="IIN6_INTR" bitrange="13:13"/> | 2141 | <field name="BOUT10_INTR" desc="" bitrange="17:17"/> |
1004 | <field name="BIN5_INTR" bitrange="12:12"/> | 2142 | <field name="IIN9_INTR" desc="" bitrange="16:16"/> |
1005 | <field name="BOUT4_INTR" bitrange="11:11"/> | 2143 | <field name="BIN8_INTR" desc="" bitrange="15:15"/> |
1006 | <field name="IIN3_INTR" bitrange="10:10"/> | 2144 | <field name="BOUT7_INTR" desc="" bitrange="14:14"/> |
1007 | <field name="BIN2_INTR" bitrange="9:9"/> | 2145 | <field name="IIN6_INTR" desc="" bitrange="13:13"/> |
1008 | <field name="BOUT1_INTR" bitrange="8:8"/> | 2146 | <field name="BIN5_INTR" desc="" bitrange="12:12"/> |
1009 | <field name="RESERVED7" bitrange="7:7"/> | 2147 | <field name="BOUT4_INTR" desc="" bitrange="11:11"/> |
1010 | <field name="SUSP_INTR" bitrange="6:6"/> | 2148 | <field name="IIN3_INTR" desc="" bitrange="10:10"/> |
1011 | <field name="RSUME_INTR" bitrange="5:5"/> | 2149 | <field name="BIN2_INTR" desc="" bitrange="9:9"/> |
1012 | <field name="USBRST_INTR" bitrange="4:4"/> | 2150 | <field name="BOUT1_INTR" desc="" bitrange="8:8"/> |
1013 | <field name="OUT0_INTR" bitrange="3:3"/> | 2151 | <field name="RESERVED7" desc="" bitrange="7:7"/> |
1014 | <field name="IN0_INTR" bitrange="2:2"/> | 2152 | <field name="SUSP_INTR" desc="" bitrange="6:6"/> |
1015 | <field name="SETUP_INTR" bitrange="1:1"/> | 2153 | <field name="RSUME_INTR" desc="" bitrange="5:5"/> |
1016 | <field name="SOF_INTR" bitrange="0:0"/> | 2154 | <field name="USBRST_INTR" desc="" bitrange="4:4"/> |
1017 | </reg> | 2155 | <field name="OUT0_INTR" desc="" bitrange="3:3"/> |
1018 | <reg name="INTCON" addr="0x1C"> | 2156 | <field name="IN0_INTR" desc="" bitrange="2:2"/> |
1019 | <field name="RESERVED" bitrange="31:3"/> | 2157 | <field name="SETUP_INTR" desc="" bitrange="1:1"/> |
1020 | <field name="INT0MODE" bitrange="2:2"> | 2158 | <field name="SOF_INTR" desc="" bitrange="0:0"/> |
1021 | <value name="ACTIVE_LOW" value="0x00"/> | 2159 | </reg> |
1022 | <value name="ACTIVE_HIGH" value="0x01"/> | 2160 | <reg name="INTCON" desc=""> |
1023 | </field> | 2161 | <addr name="INTCON" addr="0x1c"/> |
1024 | <field name="INT0TYPE" bitrange="1:1"> | 2162 | <field name="RESERVED" desc="" bitrange="31:3"/> |
1025 | <value name="LEVEL_TRIGGER" value="0x00"/> | 2163 | <field name="INT0MODE" desc="" bitrange="2:2"> |
1026 | <value name="EDGE_TRIGGER" value="0x01"/> | 2164 | <value name="ACTIVE_LOW" value="0x0" desc=""/> |
1027 | </field> | 2165 | <value name="ACTIVE_HIGH" value="0x1" desc=""/> |
1028 | <field name="INT0EN" bitrange="0:0"> | 2166 | </field> |
1029 | <value name="DISABLE" value="0x00"/> | 2167 | <field name="INT0TYPE" desc="" bitrange="1:1"> |
1030 | <value name="ENABLE" value="0x01"/> | 2168 | <value name="LEVEL_TRIGGER" value="0x0" desc=""/> |
1031 | </field> | 2169 | <value name="EDGE_TRIGGER" value="0x1" desc=""/> |
1032 | </reg> | 2170 | </field> |
1033 | <reg name="SETUP1" addr="0x20"> | 2171 | <field name="INT0EN" desc="" bitrange="0:0"> |
1034 | <field name="wValue" bitrange="31:16"/> | 2172 | <value name="DISABLE" value="0x0" desc=""/> |
1035 | <field name="bRequest" bitrange="15:8"> | 2173 | <value name="ENABLE" value="0x1" desc=""/> |
1036 | <value name="GetStatus" value="0x00"/> | 2174 | </field> |
1037 | <value name="ClearFeature" value="0x01"/> | 2175 | </reg> |
1038 | <value name="Reserved2" value="0x02"/> | 2176 | <reg name="SETUP1" desc=""> |
1039 | <value name="SetFeature" value="0x03"/> | 2177 | <addr name="SETUP1" addr="0x20"/> |
1040 | <value name="Reserved4" value="0x04"/> | 2178 | <field name="wValue" desc="" bitrange="31:16"/> |
1041 | <value name="SetAddress" value="0x05"/> | 2179 | <field name="bRequest" desc="" bitrange="15:8"> |
1042 | <value name="GetDescriptor" value="0x06"/> | 2180 | <value name="GetStatus" value="0x0" desc=""/> |
1043 | <value name="SetDescriptor" value="0x07"/> | 2181 | <value name="ClearFeature" value="0x1" desc=""/> |
1044 | <value name="GetConfiguration" value="0x08"/> | 2182 | <value name="Reserved2" value="0x2" desc=""/> |
1045 | <value name="SetConfiguration" value="0x09"/> | 2183 | <value name="SetFeature" value="0x3" desc=""/> |
1046 | <value name="GetInterface" value="0x0a"/> | 2184 | <value name="Reserved4" value="0x4" desc=""/> |
1047 | <value name="SetInterface" value="0x0b"/> | 2185 | <value name="SetAddress" value="0x5" desc=""/> |
1048 | <value name="SyncFrame" value="0x0c"/> | 2186 | <value name="GetDescriptor" value="0x6" desc=""/> |
1049 | </field> | 2187 | <value name="SetDescriptor" value="0x7" desc=""/> |
1050 | <field name="bmRequestTypeDir" bitrange="7:7"> | 2188 | <value name="GetConfiguration" value="0x8" desc=""/> |
1051 | <value name="Host2Device" value="0x00"/> | 2189 | <value name="SetConfiguration" value="0x9" desc=""/> |
1052 | <value name="Device2Host" value="0x01"/> | 2190 | <value name="GetInterface" value="0xa" desc=""/> |
1053 | </field> | 2191 | <value name="SetInterface" value="0xb" desc=""/> |
1054 | <field name="bmRequestType" bitrange="6:5"> | 2192 | <value name="SyncFrame" value="0xc" desc=""/> |
1055 | <value name="Standard" value="0x00"/> | 2193 | </field> |
1056 | <value name="Class" value="0x01"/> | 2194 | <field name="bmRequestTypeDir" desc="" bitrange="7:7"> |
1057 | <value name="Vendor" value="0x02"/> | 2195 | <value name="Host2Device" value="0x0" desc=""/> |
1058 | </field> | 2196 | <value name="Device2Host" value="0x1" desc=""/> |
1059 | <field name="bmRequestTypeRecipient" bitrange="4:0"> | 2197 | </field> |
1060 | <value name="Device" value="0x00"/> | 2198 | <field name="bmRequestType" desc="" bitrange="6:5"> |
1061 | <value name="Interface" value="0x01"/> | 2199 | <value name="Standard" value="0x0" desc=""/> |
1062 | <value name="Endpoint" value="0x02"/> | 2200 | <value name="Class" value="0x1" desc=""/> |
1063 | <value name="Other" value="0x03"/> | 2201 | <value name="Vendor" value="0x2" desc=""/> |
1064 | </field> | 2202 | </field> |
1065 | </reg> | 2203 | <field name="bmRequestTypeRecipient" desc="" bitrange="4:0"> |
1066 | <reg name="SETUP2" addr="0x24"> | 2204 | <value name="Device" value="0x0" desc=""/> |
1067 | <field name="wLength" bitrange="31:16"/> | 2205 | <value name="Interface" value="0x1" desc=""/> |
1068 | <field name="wIndex" bitrange="15:0"/> | 2206 | <value name="Endpoint" value="0x2" desc=""/> |
1069 | </reg> | 2207 | <value name="Other" value="0x3" desc=""/> |
1070 | <reg name="AHBCON" addr="0x28"> | 2208 | </field> |
1071 | <field name="RESERVED" bitrange="31:4"/> | 2209 | </reg> |
1072 | <field name="MID" bitrange="3:0" description="AHB Mater ID"/> | 2210 | <reg name="SETUP2" desc=""> |
1073 | </reg> | 2211 | <addr name="SETUP2" addr="0x24"/> |
1074 | <reg name="RX0STAT" addr="0x30"> | 2212 | <field name="wLength" desc="" bitrange="31:16"/> |
1075 | <field name="RESERVED31_26" bitrange="31:26"/> | 2213 | <field name="wIndex" desc="" bitrange="15:0"/> |
1076 | <field name="RX0OVF" bitrange="25:25"/> | 2214 | </reg> |
1077 | <field name="RX0FULL" bitrange="24:24"/> | 2215 | <reg name="AHBCON" desc=""> |
1078 | <field name="RESERVED23_19" bitrange="23:19"/> | 2216 | <addr name="AHBCON" addr="0x28"/> |
1079 | <field name="RX0ACK" bitrange="18:18"/> | 2217 | <field name="RESERVED" desc="" bitrange="31:4"/> |
1080 | <field name="RX0ERR" bitrange="17:17"/> | 2218 | <field name="MID" desc="" bitrange="3:0"/> |
1081 | <field name="RX0VOID" bitrange="16:16"/> | 2219 | </reg> |
1082 | <field name="RESERVED15_11" bitrange="15:11"/> | 2220 | <reg name="RX0STAT" desc=""> |
1083 | <field name="RX0LEN" bitrange="10:0"/> | 2221 | <addr name="RX0STAT" addr="0x30"/> |
1084 | </reg> | 2222 | <field name="RESERVED31_26" desc="" bitrange="31:26"/> |
1085 | <reg name="RX0CON" addr="0x34"> | 2223 | <field name="RX0OVF" desc="" bitrange="25:25"/> |
1086 | <field name="RESERVED31_8" bitrange="31:8"/> | 2224 | <field name="RX0FULL" desc="" bitrange="24:24"/> |
1087 | <field name="RX0ACKINTEN" bitrange="7:7"/> | 2225 | <field name="RESERVED23_19" desc="" bitrange="23:19"/> |
1088 | <field name="RX0ERRINTEN" bitrange="6:6"/> | 2226 | <field name="RX0ACK" desc="" bitrange="18:18"/> |
1089 | <field name="RX0VOIDINTEN" bitrange="5:5"/> | 2227 | <field name="RX0ERR" desc="" bitrange="17:17"/> |
1090 | <field name="EP0EN" bitrange="4:4"/> | 2228 | <field name="RX0VOID" desc="" bitrange="16:16"/> |
1091 | <field name="RX0NAK" bitrange="3:3"/> | 2229 | <field name="RESERVED15_11" desc="" bitrange="15:11"/> |
1092 | <field name="RX0STALL" bitrange="2:2"/> | 2230 | <field name="RX0LEN" desc="" bitrange="10:0"/> |
1093 | <field name="RX0CLR" bitrange="1:1"/> | 2231 | </reg> |
1094 | <field name="RX0FFRC" bitrange="0:0"/> | 2232 | <reg name="RX0CON" desc=""> |
1095 | </reg> | 2233 | <addr name="RX0CON" addr="0x34"/> |
1096 | <reg name="RX0DMACTLO" addr="0x38"> | 2234 | <field name="RESERVED31_8" desc="" bitrange="31:8"/> |
1097 | <field name="RESERVED31_1" bitrange="31:1"/> | 2235 | <field name="RX0ACKINTEN" desc="" bitrange="7:7"/> |
1098 | <field name="DMA0OUTSTA" bitrange="0:0"/> | 2236 | <field name="RX0ERRINTEN" desc="" bitrange="6:6"/> |
1099 | </reg> | 2237 | <field name="RX0VOIDINTEN" desc="" bitrange="5:5"/> |
1100 | <reg name="RX0DMAOUTLMADDR" addr="0x3C"> | 2238 | <field name="EP0EN" desc="" bitrange="4:4"/> |
1101 | <field name="LM0OUTADDR" bitrange="31:2"/> | 2239 | <field name="RX0NAK" desc="" bitrange="3:3"/> |
1102 | <field name="RESERVED1_0" bitrange="1:0"/> | 2240 | <field name="RX0STALL" desc="" bitrange="2:2"/> |
1103 | </reg> | 2241 | <field name="RX0CLR" desc="" bitrange="1:1"/> |
1104 | <reg name="TX0STAT" addr="0x40"> | 2242 | <field name="RX0FFRC" desc="" bitrange="0:0"/> |
1105 | <field name="RESERVED31_19" bitrange="31:19"/> | 2243 | </reg> |
1106 | <field name="TX0ACK" bitrange="18:18"/> | 2244 | <reg name="RX0DMACTLO" desc=""> |
1107 | <field name="TX0ERR" bitrange="17:17"/> | 2245 | <addr name="RX0DMACTLO" addr="0x38"/> |
1108 | <field name="TX0VOID" bitrange="16:16"/> | 2246 | <field name="RESERVED31_1" desc="" bitrange="31:1"/> |
1109 | <field name="RESERVED15_11" bitrange="15:11"/> | 2247 | <field name="DMA0OUTSTA" desc="" bitrange="0:0"/> |
1110 | <field name="TX0LEN" bitrange="10:0"/> | 2248 | </reg> |
1111 | </reg> | 2249 | <reg name="RX0DMAOUTLMADDR" desc=""> |
1112 | <reg name="TX0CON" addr="0x44"> | 2250 | <addr name="RX0DMAOUTLMADDR" addr="0x3c"/> |
1113 | <field name="RESERVED31_7" bitrange="31:7"/> | 2251 | <field name="LM0OUTADDR" desc="DMA word aligned buffer address" bitrange="31:0"/> |
1114 | <field name="TX0ACKINTEN" bitrange="6:6"/> | 2252 | </reg> |
1115 | <field name="TX0ERRINTEN" bitrange="5:5"/> | 2253 | <reg name="TX0STAT" desc=""> |
1116 | <field name="TX0VOIDINTEN" bitrange="4:4"/> | 2254 | <addr name="TX0STAT" addr="0x40"/> |
1117 | <field name="RESERVED3" bitrange="3:3"/> | 2255 | <field name="RESERVED31_19" desc="" bitrange="31:19"/> |
1118 | <field name="TX0NAK" bitrange="2:2"/> | 2256 | <field name="TX0ACK" desc="" bitrange="18:18"/> |
1119 | <field name="TX0STALL" bitrange="1:1"/> | 2257 | <field name="TX0ERR" desc="" bitrange="17:17"/> |
1120 | <field name="TX0CLR" bitrange="0:0"/> | 2258 | <field name="TX0VOID" desc="" bitrange="16:16"/> |
1121 | </reg> | 2259 | <field name="RESERVED15_11" desc="" bitrange="15:11"/> |
1122 | <reg name="TX0BUF" addr="0x48"> | 2260 | <field name="TX0LEN" desc="" bitrange="10:0"/> |
1123 | <field name="RESERVED31_2" bitrange="31:2"/> | 2261 | </reg> |
1124 | <field name="TX0URF" bitrange="1:1"/> | 2262 | <reg name="TX0CON" desc=""> |
1125 | <field name="TX0FULL" bitrange="0:0"/> | 2263 | <addr name="TX0CON" addr="0x44"/> |
1126 | </reg> | 2264 | <field name="RESERVED31_7" desc="" bitrange="31:7"/> |
1127 | <reg name="TX0DMAINCTL" addr="0x4C"> | 2265 | <field name="TX0ACKINTEN" desc="" bitrange="6:6"/> |
1128 | <field name="RESERVED31_1" bitrange="31:1"/> | 2266 | <field name="TX0ERRINTEN" desc="" bitrange="5:5"/> |
1129 | <field name="DMA0INSTA" bitrange="0:0"/> | 2267 | <field name="TX0VOIDINTEN" desc="" bitrange="4:4"/> |
1130 | </reg> | 2268 | <field name="RESERVED3" desc="" bitrange="3:3"/> |
1131 | <reg name="TX0DMALM_IADDR" addr="0x50"> | 2269 | <field name="TX0NAK" desc="" bitrange="2:2"/> |
1132 | <field name="LM0INADDR" bitrange="31:2"/> | 2270 | <field name="TX0STALL" desc="" bitrange="1:1"/> |
1133 | <field name="RESERVED1_0" bitrange="1:0"/> | 2271 | <field name="TX0CLR" desc="" bitrange="0:0"/> |
1134 | </reg> | 2272 | </reg> |
1135 | <reg name="RX1STAT" addr="0x54"> | 2273 | <reg name="TX0BUF" desc=""> |
1136 | <field name="RESERVED31_26" bitrange="31:26"/> | 2274 | <addr name="TX0BUF" addr="0x48"/> |
1137 | <field name="RXOVF" bitrange="25:25"/> | 2275 | <field name="RESERVED31_2" desc="" bitrange="31:2"/> |
1138 | <field name="RXFULL" bitrange="24:24"/> | 2276 | <field name="TX0URF" desc="" bitrange="1:1"/> |
1139 | <field name="RESERVED23_20" bitrange="23:20"/> | 2277 | <field name="TX0FULL" desc="" bitrange="0:0"/> |
1140 | <field name="RX_CF_INT" bitrange="19:19"/> | 2278 | </reg> |
1141 | <field name="RXACK" bitrange="18:18"/> | 2279 | <reg name="TX0DMAINCTL" desc=""> |
1142 | <field name="RXERR" bitrange="17:17"/> | 2280 | <addr name="TX0DMAINCTL" addr="0x4c"/> |
1143 | <field name="RXVOID" bitrange="16:16"/> | 2281 | <field name="RESERVED31_1" desc="" bitrange="31:1"/> |
1144 | <field name="RESERVED15_11" bitrange="15:11"/> | 2282 | <field name="DMA0INSTA" desc="" bitrange="0:0"/> |
1145 | <field name="RXCNT" bitrange="10:0"/> | 2283 | </reg> |
1146 | </reg> | 2284 | <reg name="TX0DMALM_IADDR" desc=""> |
1147 | <reg name="RX1CON" addr="0x58"> | 2285 | <addr name="TX0DMALM_IADDR" addr="0x50"/> |
1148 | <field name="RESERVED31_14" bitrange="31:14"/> | 2286 | <field name="LM0INADDR" desc="DMA word aligned buffer address" bitrange="31:0"/> |
1149 | <field name="RXSTALL_AUTOCLR" bitrange="13:13"/> | 2287 | </reg> |
1150 | <field name="RX_CF_INTE" bitrange="12:12"/> | 2288 | <reg name="RX_BLK_STAT" desc=""> |
1151 | <field name="RXENDP_NUM" bitrange="11:8"/> | 2289 | <addr name="RX1STAT" addr="0x54"/> |
1152 | <field name="RXACKINTEN" bitrange="7:7"/> | 2290 | <addr name="RX4STAT" addr="0x8c"/> |
1153 | <field name="RXERRINTEN" bitrange="6:6"/> | 2291 | <addr name="RX7STAT" addr="0xc4"/> |
1154 | <field name="RXVOIDINTEN" bitrange="5:5"/> | 2292 | <addr name="RX10STAT" addr="0xfc"/> |
1155 | <field name="EPEN" bitrange="4:4"/> | 2293 | <addr name="RX13STAT" addr="0x134"/> |
1156 | <field name="RXNAK" bitrange="3:3"/> | 2294 | <field name="RESERVED31_26" desc="" bitrange="31:26"/> |
1157 | <field name="RXSTALL" bitrange="2:2"/> | 2295 | <field name="RXOVF" desc="" bitrange="25:25"/> |
1158 | <field name="RXCLR" bitrange="1:1"/> | 2296 | <field name="RXFULL" desc="" bitrange="24:24"/> |
1159 | <field name="RXFFRC" bitrange="0:0"/> | 2297 | <field name="RESERVED23_20" desc="" bitrange="23:20"/> |
1160 | </reg> | 2298 | <field name="RX_CF_INT" desc="" bitrange="19:19"/> |
1161 | <reg name="RX1DMACTLO" addr="0x5C"> | 2299 | <field name="RXACK" desc="" bitrange="18:18"/> |
1162 | <field name="RESERVED31_1" bitrange="31:1"/> | 2300 | <field name="RXERR" desc="" bitrange="17:17"/> |
1163 | <field name="DMAOUTSTA" bitrange="0:0"/> | 2301 | <field name="RXVOID" desc="" bitrange="16:16"/> |
1164 | </reg> | 2302 | <field name="RESERVED15_11" desc="" bitrange="15:11"/> |
1165 | <reg name="RX1DMAOUTLMADDR" addr="0x60"> | 2303 | <field name="RXCNT" desc="" bitrange="10:0"/> |
1166 | <field name="LMOUTADDR" bitrange="31:2"/> | 2304 | </reg> |
1167 | <field name="RESERVED1_0" bitrange="1:0"/> | 2305 | <reg name="RX_BLK_CON" desc=""> |
1168 | </reg> | 2306 | <addr name="RX1CON" addr="0x58"/> |
1169 | <reg name="TX2STAT" addr="0x64"> | 2307 | <addr name="RX4CON" addr="0x90"/> |
1170 | <field name="RESERVED31_21" bitrange="31:21"/> | 2308 | <addr name="RX7CON" addr="0xc8"/> |
1171 | <field name="TX_CF_INT" bitrange="20:20"/> | 2309 | <addr name="RX10CON" addr="0x100"/> |
1172 | <field name="TXDMA_DN" bitrange="19:19"/> | 2310 | <addr name="RX13CON" addr="0x138"/> |
1173 | <field name="TXACK" bitrange="18:18"/> | 2311 | <field name="RESERVED31_14" desc="" bitrange="31:14"/> |
1174 | <field name="TXERR" bitrange="17:17"/> | 2312 | <field name="RXSTALL_AUTOCLR" desc="" bitrange="13:13"/> |
1175 | <field name="TXVOID" bitrange="16:16"/> | 2313 | <field name="RX_CF_INTE" desc="" bitrange="12:12"/> |
1176 | <field name="RESERVED15:11" bitrange="15:11"/> | 2314 | <field name="RXENDP_NUM" desc="" bitrange="11:8"/> |
1177 | <field name="TXLEN" bitrange="10:0"/> | 2315 | <field name="RXACKINTEN" desc="" bitrange="7:7"/> |
1178 | </reg> | 2316 | <field name="RXERRINTEN" desc="" bitrange="6:6"/> |
1179 | <reg name="TX2CON" addr="0x68"> | 2317 | <field name="RXVOIDINTEN" desc="" bitrange="5:5"/> |
1180 | <field name="RESERVED31_14" bitrange="31:14"/> | 2318 | <field name="EPEN" desc="" bitrange="4:4"/> |
1181 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | 2319 | <field name="RXNAK" desc="" bitrange="3:3"/> |
1182 | <field name="TX_CF_INTE" bitrange="12:12"/> | 2320 | <field name="RXSTALL" desc="" bitrange="2:2"/> |
1183 | <field name="TXENDP_NUM" bitrange="11:8"/> | 2321 | <field name="RXCLR" desc="" bitrange="1:1"/> |
1184 | <field name="TXDMADN_EN" bitrange="7:7"/> | 2322 | <field name="RXFFRC" desc="" bitrange="0:0"/> |
1185 | <field name="TXACKINTEN" bitrange="6:6"/> | 2323 | </reg> |
1186 | <field name="TXERRINTEN" bitrange="5:5"/> | 2324 | <reg name="RX_BLK_DMACTLO" desc=""> |
1187 | <field name="TXVOIDINTEN" bitrange="4:4"/> | 2325 | <addr name="RX1DMACTLO" addr="0x5c"/> |
1188 | <field name="TXEPEN" bitrange="3:3"/> | 2326 | <addr name="RX4DMACTLO" addr="0x94"/> |
1189 | <field name="TXNAK" bitrange="2:2"/> | 2327 | <addr name="RX7DMACTLO" addr="0xcc"/> |
1190 | <field name="TXSTALL" bitrange="1:1"/> | 2328 | <addr name="RX10DMACTLO" addr="0x104"/> |
1191 | <field name="TXCLR" bitrange="0:0"/> | 2329 | <addr name="RX13DMACTLO" addr="0x13c"/> |
1192 | </reg> | 2330 | <field name="RESERVED31_1" desc="" bitrange="31:1"/> |
1193 | <reg name="TX2BUF" addr="0x6C"> | 2331 | <field name="DMAOUTSTA" desc="" bitrange="0:0"/> |
1194 | <field name="RESERVED31_4" bitrange="31:4"/> | 2332 | </reg> |
1195 | <field name="TXDS1" bitrange="3:3"/> | 2333 | <reg name="RX_BLK_DMAOUTLMADDR" desc=""> |
1196 | <field name="TXDS0" bitrange="2:2"/> | 2334 | <addr name="RX1DMAOUTLMADDR" addr="0x60"/> |
1197 | <field name="TXURF" bitrange="1:1"/> | 2335 | <addr name="RX4DMAOUTLMADDR" addr="0x98"/> |
1198 | <field name="TXFULL" bitrange="0:0"/> | 2336 | <addr name="RX7DMAOUTLMADDR" addr="0xd0"/> |
1199 | </reg> | 2337 | <addr name="RX10DMAOUTLMADDR" addr="0x108"/> |
1200 | <reg name="TX2DMAINCTL" addr="0x70"> | 2338 | <addr name="RX13DMAOUTLMADDR" addr="0x140"/> |
1201 | <field name="RESERVED31_1" bitrange="31:1"/> | 2339 | <field name="LMOUTADDR" desc="Address of word aligned buffer" bitrange="31:0"/> |
1202 | <field name="DMAINSTA" bitrange="0:0"/> | 2340 | </reg> |
1203 | </reg> | 2341 | <reg name="TX_BLK_STAT" desc=""> |
1204 | <reg name="TX2DMALM_IADDR" addr="0x74"> | 2342 | <addr name="TX2STAT" addr="0x64"/> |
1205 | <field name="LMINADDR" bitrange="31:2"/> | 2343 | <addr name="TX5STAT" addr="0xc9"/> |
1206 | <field name="RESERVED1_0" bitrange="1:0"/> | 2344 | <addr name="TX8STAT" addr="0xd4"/> |
1207 | </reg> | 2345 | <addr name="TX11STAT" addr="0x10c"/> |
1208 | <reg name="TX3STAT" addr="0x78"> | 2346 | <addr name="TX14STAT" addr="0x144"/> |
1209 | <field name="RESERVED31_20" bitrange="31:20"/> | 2347 | <field name="RESERVED31_21" desc="" bitrange="31:21"/> |
1210 | <field name="TX_CF_INT" bitrange="19:19"/> | 2348 | <field name="TX_CF_INT" desc="" bitrange="20:20"/> |
1211 | <field name="TXACK" bitrange="18:18"/> | 2349 | <field name="TXDMA_DN" desc="" bitrange="19:19"/> |
1212 | <field name="TXERR" bitrange="17:17"/> | 2350 | <field name="TXACK" desc="" bitrange="18:18"/> |
1213 | <field name="TXVOID" bitrange="16:16"/> | 2351 | <field name="TXERR" desc="" bitrange="17:17"/> |
1214 | <field name="RESERVED15_11" bitrange="15:11"/> | 2352 | <field name="TXVOID" desc="" bitrange="16:16"/> |
1215 | <field name="TXLEN" bitrange="10:0"/> | 2353 | <field name="RESERVED15:11" desc="" bitrange="15:11"/> |
1216 | </reg> | 2354 | <field name="TXLEN" desc="" bitrange="10:0"/> |
1217 | <reg name="TX3CON" addr="0x7C"> | 2355 | </reg> |
1218 | <field name="RESERVED31_14" bitrange="31:14"/> | 2356 | <reg name="TX_BLK_CON" desc=""> |
1219 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | 2357 | <addr name="TX2CON" addr="0x68"/> |
1220 | <field name="TX_CF_INTE" bitrange="12:12"/> | 2358 | <addr name="TX5CON" addr="0xa0"/> |
1221 | <field name="TXENDP_NUM" bitrange="11:8"/> | 2359 | <addr name="TX8CON" addr="0xd8"/> |
1222 | <field name="RESERVED7" bitrange="7:7"/> | 2360 | <addr name="TX11CON" addr="0x110"/> |
1223 | <field name="TXACKINTEN" bitrange="6:6"/> | 2361 | <addr name="TX14CON" addr="0x148"/> |
1224 | <field name="TXERRINTEN" bitrange="5:5"/> | 2362 | <field name="RESERVED31_14" desc="" bitrange="31:14"/> |
1225 | <field name="TXVOIDINTEN" bitrange="4:4"/> | 2363 | <field name="TXSTALL_AUTOCLR" desc="" bitrange="13:13"/> |
1226 | <field name="TXEPEN" bitrange="3:3"/> | 2364 | <field name="TX_CF_INTE" desc="" bitrange="12:12"/> |
1227 | <field name="TXNAK" bitrange="2:2"/> | 2365 | <field name="TXENDP_NUM" desc="" bitrange="11:8"/> |
1228 | <field name="TXSTALL" bitrange="1:1"/> | 2366 | <field name="TXDMADN_EN" desc="" bitrange="7:7"/> |
1229 | <field name="TXCLR" bitrange="0:0"/> | 2367 | <field name="TXACKINTEN" desc="" bitrange="6:6"/> |
1230 | </reg> | 2368 | <field name="TXERRINTEN" desc="" bitrange="5:5"/> |
1231 | <reg name="TX3BUF" addr="0x80"> | 2369 | <field name="TXVOIDINTEN" desc="" bitrange="4:4"/> |
1232 | <field name="RESERVED31_2" bitrange="31:2"/> | 2370 | <field name="TXEPEN" desc="" bitrange="3:3"/> |
1233 | <field name="TXURF" bitrange="1:1"/> | 2371 | <field name="TXNAK" desc="" bitrange="2:2"/> |
1234 | <field name="TXFULL" bitrange="0:0"/> | 2372 | <field name="TXSTALL" desc="" bitrange="1:1"/> |
1235 | </reg> | 2373 | <field name="TXCLR" desc="" bitrange="0:0"/> |
1236 | <reg name="TX3DMAINCTL" addr="0x84"> | 2374 | </reg> |
1237 | <field name="RESERVED31_1" bitrange="31:1"/> | 2375 | <reg name="TX_BLK_BUF" desc=""> |
1238 | <field name="DMAINSTA" bitrange="0:0"/> | 2376 | <addr name="TX2BUF" addr="0x6c"/> |
1239 | </reg> | 2377 | <addr name="TX5BUF" addr="0xa4"/> |
1240 | <reg name="TX3DMALM_IADDR" addr="0x88"> | 2378 | <addr name="TX8BUF" addr="0xdc"/> |
1241 | <field name="LMINADDR" bitrange="31:2"/> | 2379 | <addr name="TX11BUF" addr="0x114"/> |
1242 | <field name="RESERVED1_0" bitrange="1:0"/> | 2380 | <addr name="TX14BUF" addr="0x14c"/> |
1243 | </reg> | 2381 | <field name="RESERVED31_4" desc="" bitrange="31:4"/> |
1244 | <reg name="RX4STAT" addr="0x8C"> | 2382 | <field name="TXDS1" desc="" bitrange="3:3"/> |
1245 | <field name="RESERVED31_26" bitrange="31:26"/> | 2383 | <field name="TXDS0" desc="" bitrange="2:2"/> |
1246 | <field name="RXOVF" bitrange="25:25"/> | 2384 | <field name="TXURF" desc="" bitrange="1:1"/> |
1247 | <field name="RXFULL" bitrange="24:24"/> | 2385 | <field name="TXFULL" desc="" bitrange="0:0"/> |
1248 | <field name="RESERVED23_20" bitrange="23:20"/> | 2386 | </reg> |
1249 | <field name="RX_CF_INT" bitrange="19:19"/> | 2387 | <reg name="TX_BLK_DMAINCTL" desc=""> |
1250 | <field name="RXACK" bitrange="18:18"/> | 2388 | <addr name="TX2DMAINCTL" addr="0x70"/> |
1251 | <field name="RXERR" bitrange="17:17"/> | 2389 | <addr name="TX5DMAINCTL" addr="0xa8"/> |
1252 | <field name="RXVOID" bitrange="16:16"/> | 2390 | <addr name="TX8DMAINCTL" addr="0xe0"/> |
1253 | <field name="RESERVED15_11" bitrange="15:11"/> | 2391 | <addr name="TX11DMAINCTL" addr="0x118"/> |
1254 | <field name="RXCNT" bitrange="10:0"/> | 2392 | <addr name="TX14DMAINCTL" addr="0x150"/> |
1255 | </reg> | 2393 | <field name="RESERVED31_1" desc="" bitrange="31:1"/> |
1256 | <reg name="RX4CON" addr="0x90"> | 2394 | <field name="DMAINSTA" desc="" bitrange="0:0"/> |
1257 | <field name="RESERVED31_14" bitrange="31:14"/> | 2395 | </reg> |
1258 | <field name="RXSTALL_AUTOCLR" bitrange="13:13"/> | 2396 | <reg name="TX_BLK_DMALM_IADDR" desc=""> |
1259 | <field name="RX_CF_INTE" bitrange="12:12"/> | 2397 | <addr name="TX2DMALM_IADDR" addr="0x74"/> |
1260 | <field name="RXENDP_NUM" bitrange="11:8"/> | 2398 | <addr name="TX5DMALM_IADDR" addr="0xac"/> |
1261 | <field name="RXACKINTEN" bitrange="7:7"/> | 2399 | <addr name="TX8DMALM_IADDR" addr="0xe4"/> |
1262 | <field name="RXERRINTEN" bitrange="6:6"/> | 2400 | <addr name="TX11DMALM_IADDR" addr="0x11c"/> |
1263 | <field name="RXVOIDINTEN" bitrange="5:5"/> | 2401 | <addr name="TX14DMALM_IADDR" addr="0x154"/> |
1264 | <field name="EPEN" bitrange="4:4"/> | 2402 | <field name="LMINADDR" desc="DMA word aligned buffer address" bitrange="31:0"/> |
1265 | <field name="RXNAK" bitrange="3:3"/> | 2403 | </reg> |
1266 | <field name="RXSTALL" bitrange="2:2"/> | 2404 | <reg name="TX_INT_STAT" desc=""> |
1267 | <field name="RXCLR" bitrange="1:1"/> | 2405 | <addr name="TX3STAT" addr="0x78"/> |
1268 | <field name="RXFFRC" bitrange="0:0"/> | 2406 | <addr name="TX6STAT" addr="0xb0"/> |
1269 | </reg> | 2407 | <addr name="TX9STAT" addr="0xe8"/> |
1270 | <reg name="RX4DMACTLO" addr="0x94"> | 2408 | <addr name="TX12STAT" addr="0x120"/> |
1271 | <field name="RESERVED31_1" bitrange="31:1"/> | 2409 | <addr name="TX15STAT" addr="0x158"/> |
1272 | <field name="DMAOUTSTA" bitrange="0:0"/> | 2410 | <field name="RESERVED31_20" desc="" bitrange="31:20"/> |
1273 | </reg> | 2411 | <field name="TX_CF_INT" desc="" bitrange="19:19"/> |
1274 | <reg name="RX4DMAOUTLMADDR" addr="0x98"> | 2412 | <field name="TXACK" desc="" bitrange="18:18"/> |
1275 | <field name="LMOUTADDR" bitrange="31:2"/> | 2413 | <field name="TXERR" desc="" bitrange="17:17"/> |
1276 | <field name="RESERVED1_0" bitrange="1:0"/> | 2414 | <field name="TXVOID" desc="" bitrange="16:16"/> |
1277 | </reg> | 2415 | <field name="RESERVED15_11" desc="" bitrange="15:11"/> |
1278 | <reg name="TX5STAT" addr="0x9C"> | 2416 | <field name="TXLEN" desc="" bitrange="10:0"/> |
1279 | <field name="RESERVED31_21" bitrange="31:21"/> | 2417 | </reg> |
1280 | <field name="TX_CF_INT" bitrange="20:20"/> | 2418 | <reg name="TX_INT_CON" desc=""> |
1281 | <field name="TXDMA_DN" bitrange="19:19"/> | 2419 | <addr name="TX3CON" addr="0x7c"/> |
1282 | <field name="TXACK" bitrange="18:18"/> | 2420 | <addr name="TX6CON" addr="0xb4"/> |
1283 | <field name="TXERR" bitrange="17:17"/> | 2421 | <addr name="TX9CON" addr="0xec"/> |
1284 | <field name="TXVOID" bitrange="16:16"/> | 2422 | <addr name="TX12CON" addr="0x124"/> |
1285 | <field name="RESERVED15:11" bitrange="15:11"/> | 2423 | <addr name="TX15CON" addr="0x15c"/> |
1286 | <field name="TXLEN" bitrange="10:0"/> | 2424 | <field name="RESERVED31_14" desc="" bitrange="31:14"/> |
1287 | </reg> | 2425 | <field name="TXSTALL_AUTOCLR" desc="" bitrange="13:13"/> |
1288 | <reg name="TX5CON" addr="0xA0"> | 2426 | <field name="TX_CF_INTE" desc="" bitrange="12:12"/> |
1289 | <field name="RESERVED31_14" bitrange="31:14"/> | 2427 | <field name="TXENDP_NUM" desc="" bitrange="11:8"/> |
1290 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | 2428 | <field name="RESERVED7" desc="" bitrange="7:7"/> |
1291 | <field name="TX_CF_INTE" bitrange="12:12"/> | 2429 | <field name="TXACKINTEN" desc="" bitrange="6:6"/> |
1292 | <field name="TXENDP_NUM" bitrange="11:8"/> | 2430 | <field name="TXERRINTEN" desc="" bitrange="5:5"/> |
1293 | <field name="TXDMADN_EN" bitrange="7:7"/> | 2431 | <field name="TXVOIDINTEN" desc="" bitrange="4:4"/> |
1294 | <field name="TXACKINTEN" bitrange="6:6"/> | 2432 | <field name="TXEPEN" desc="" bitrange="3:3"/> |
1295 | <field name="TXERRINTEN" bitrange="5:5"/> | 2433 | <field name="TXNAK" desc="" bitrange="2:2"/> |
1296 | <field name="TXVOIDINTEN" bitrange="4:4"/> | 2434 | <field name="TXSTALL" desc="" bitrange="1:1"/> |
1297 | <field name="TXEPEN" bitrange="3:3"/> | 2435 | <field name="TXCLR" desc="" bitrange="0:0"/> |
1298 | <field name="TXNAK" bitrange="2:2"/> | 2436 | </reg> |
1299 | <field name="TXSTALL" bitrange="1:1"/> | 2437 | <reg name="TX_INT_BUF" desc=""> |
1300 | <field name="TXCLR" bitrange="0:0"/> | 2438 | <addr name="TX3BUF" addr="0x80"/> |
1301 | </reg> | 2439 | <addr name="TX6BUF" addr="0xb8"/> |
1302 | <reg name="TX5BUF" addr="0xA4"> | 2440 | <addr name="TX9BUF" addr="0xf0"/> |
1303 | <field name="RESERVED31_4" bitrange="31:4"/> | 2441 | <addr name="TX12BUF" addr="0x128"/> |
1304 | <field name="TXDS1" bitrange="3:3"/> | 2442 | <addr name="TX15BUF" addr="0x160"/> |
1305 | <field name="TXDS0" bitrange="2:2"/> | 2443 | <field name="RESERVED31_2" desc="" bitrange="31:2"/> |
1306 | <field name="TXURF" bitrange="1:1"/> | 2444 | <field name="TXURF" desc="" bitrange="1:1"/> |
1307 | <field name="TXFULL" bitrange="0:0"/> | 2445 | <field name="TXFULL" desc="" bitrange="0:0"/> |
1308 | </reg> | 2446 | </reg> |
1309 | <reg name="TX5DMAINCTL" addr="0xA8"> | 2447 | <reg name="TX_INT_DMAINCTL" desc=""> |
1310 | <field name="RESERVED31_1" bitrange="31:1"/> | 2448 | <addr name="TX3DMAINCTL" addr="0x84"/> |
1311 | <field name="DMAINSTA" bitrange="0:0"/> | 2449 | <addr name="TX6DMAINCTL" addr="0xbc"/> |
1312 | </reg> | 2450 | <addr name="TX9DMAINCTL" addr="0xf4"/> |
1313 | <reg name="TX5DMALM_IADDR" addr="0xAC"> | 2451 | <addr name="TX12DMAINCTL" addr="0x12c"/> |
1314 | <field name="LMINADDR" bitrange="31:2"/> | 2452 | <addr name="TX15DMAINCTL" addr="0x164"/> |
1315 | <field name="RESERVED1_0" bitrange="1:0"/> | 2453 | <field name="RESERVED31_1" desc="" bitrange="31:1"/> |
1316 | </reg> | 2454 | <field name="DMAINSTA" desc="" bitrange="0:0"/> |
1317 | <reg name="TX6STAT" addr="0xB0"> | 2455 | </reg> |
1318 | <field name="RESERVED31_20" bitrange="31:20"/> | 2456 | <reg name="TX_INT_DMALM_IADDR" desc=""> |
1319 | <field name="TX_CF_INT" bitrange="19:19"/> | 2457 | <addr name="TX3DMALM_IADDR" addr="0x88"/> |
1320 | <field name="TXACK" bitrange="18:18"/> | 2458 | <addr name="TX6DMALM_IADDR" addr="0xc0"/> |
1321 | <field name="TXERR" bitrange="17:17"/> | 2459 | <addr name="TX9DMALM_IADDR" addr="0xf8"/> |
1322 | <field name="TXVOID" bitrange="16:16"/> | 2460 | <addr name="TX12DMALM_IADDR" addr="0x130"/> |
1323 | <field name="RESERVED15_11" bitrange="15:11"/> | 2461 | <addr name="TX15DMALM_IADDR" addr="0x168"/> |
1324 | <field name="TXLEN" bitrange="10:0"/> | 2462 | <field name="LMINADDR" desc="DMA word aligned buffer address" bitrange="31:0"/> |
1325 | </reg> | ||
1326 | <reg name="TX6CON" addr="0xB4"> | ||
1327 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1328 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1329 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1330 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1331 | <field name="RESERVED7" bitrange="7:7"/> | ||
1332 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1333 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1334 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1335 | <field name="TXEPEN" bitrange="3:3"/> | ||
1336 | <field name="TXNAK" bitrange="2:2"/> | ||
1337 | <field name="TXSTALL" bitrange="1:1"/> | ||
1338 | <field name="TXCLR" bitrange="0:0"/> | ||
1339 | </reg> | ||
1340 | <reg name="TX6BUF" addr="0xB8"> | ||
1341 | <field name="RESERVED31_2" bitrange="31:2"/> | ||
1342 | <field name="TXURF" bitrange="1:1"/> | ||
1343 | <field name="TXFULL" bitrange="0:0"/> | ||
1344 | </reg> | ||
1345 | <reg name="TX6DMAINCTL" addr="0xBC"> | ||
1346 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1347 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1348 | </reg> | ||
1349 | <reg name="TX6DMALM_IADDR" addr="0xC0"> | ||
1350 | <field name="LMINADDR" bitrange="31:2"/> | ||
1351 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1352 | </reg> | ||
1353 | <reg name="RX7STAT" addr="0xC4"> | ||
1354 | <field name="RESERVED31_26" bitrange="31:26"/> | ||
1355 | <field name="RXOVF" bitrange="25:25"/> | ||
1356 | <field name="RXFULL" bitrange="24:24"/> | ||
1357 | <field name="RESERVED23_20" bitrange="23:20"/> | ||
1358 | <field name="RX_CF_INT" bitrange="19:19"/> | ||
1359 | <field name="RXACK" bitrange="18:18"/> | ||
1360 | <field name="RXERR" bitrange="17:17"/> | ||
1361 | <field name="RXVOID" bitrange="16:16"/> | ||
1362 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1363 | <field name="RXCNT" bitrange="10:0"/> | ||
1364 | </reg> | ||
1365 | <reg name="RX7CON" addr="0xC8"> | ||
1366 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1367 | <field name="RXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1368 | <field name="RX_CF_INTE" bitrange="12:12"/> | ||
1369 | <field name="RXENDP_NUM" bitrange="11:8"/> | ||
1370 | <field name="RXACKINTEN" bitrange="7:7"/> | ||
1371 | <field name="RXERRINTEN" bitrange="6:6"/> | ||
1372 | <field name="RXVOIDINTEN" bitrange="5:5"/> | ||
1373 | <field name="EPEN" bitrange="4:4"/> | ||
1374 | <field name="RXNAK" bitrange="3:3"/> | ||
1375 | <field name="RXSTALL" bitrange="2:2"/> | ||
1376 | <field name="RXCLR" bitrange="1:1"/> | ||
1377 | <field name="RXFFRC" bitrange="0:0"/> | ||
1378 | </reg> | ||
1379 | <reg name="RX7DMACTLO" addr="0xCC"> | ||
1380 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1381 | <field name="DMAOUTSTA" bitrange="0:0"/> | ||
1382 | </reg> | ||
1383 | <reg name="RX7DMAOUTLMADDR" addr="0xD0"> | ||
1384 | <field name="LMOUTADDR" bitrange="31:2"/> | ||
1385 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1386 | </reg> | ||
1387 | <reg name="TX8STAT" addr="0xD4"> | ||
1388 | <field name="RESERVED31_21" bitrange="31:21"/> | ||
1389 | <field name="TX_CF_INT" bitrange="20:20"/> | ||
1390 | <field name="TXDMA_DN" bitrange="19:19"/> | ||
1391 | <field name="TXACK" bitrange="18:18"/> | ||
1392 | <field name="TXERR" bitrange="17:17"/> | ||
1393 | <field name="TXVOID" bitrange="16:16"/> | ||
1394 | <field name="RESERVED15:11" bitrange="15:11"/> | ||
1395 | <field name="TXLEN" bitrange="10:0"/> | ||
1396 | </reg> | ||
1397 | <reg name="TX8CON" addr="0xD8"> | ||
1398 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1399 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1400 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1401 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1402 | <field name="TXDMADN_EN" bitrange="7:7"/> | ||
1403 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1404 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1405 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1406 | <field name="TXEPEN" bitrange="3:3"/> | ||
1407 | <field name="TXNAK" bitrange="2:2"/> | ||
1408 | <field name="TXSTALL" bitrange="1:1"/> | ||
1409 | <field name="TXCLR" bitrange="0:0"/> | ||
1410 | </reg> | ||
1411 | <reg name="TX8BUF" addr="0xDC"> | ||
1412 | <field name="RESERVED31_4" bitrange="31:4"/> | ||
1413 | <field name="TXDS1" bitrange="3:3"/> | ||
1414 | <field name="TXDS0" bitrange="2:2"/> | ||
1415 | <field name="TXURF" bitrange="1:1"/> | ||
1416 | <field name="TXFULL" bitrange="0:0"/> | ||
1417 | </reg> | ||
1418 | <reg name="TX8DMAINCTL" addr="0xE0"> | ||
1419 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1420 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1421 | </reg> | ||
1422 | <reg name="TX8DMALM_IADDR" addr="0xE4"></reg> | ||
1423 | <reg name="TX9STAT" addr="0xE8"> | ||
1424 | <field name="RESERVED31_20" bitrange="31:20"/> | ||
1425 | <field name="TX_CF_INT" bitrange="19:19"/> | ||
1426 | <field name="TXACK" bitrange="18:18"/> | ||
1427 | <field name="TXERR" bitrange="17:17"/> | ||
1428 | <field name="TXVOID" bitrange="16:16"/> | ||
1429 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1430 | <field name="TXLEN" bitrange="10:0"/> | ||
1431 | </reg> | ||
1432 | <reg name="TX9CON" addr="0xEC"> | ||
1433 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1434 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1435 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1436 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1437 | <field name="RESERVED7" bitrange="7:7"/> | ||
1438 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1439 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1440 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1441 | <field name="TXEPEN" bitrange="3:3"/> | ||
1442 | <field name="TXNAK" bitrange="2:2"/> | ||
1443 | <field name="TXSTALL" bitrange="1:1"/> | ||
1444 | <field name="TXCLR" bitrange="0:0"/> | ||
1445 | </reg> | ||
1446 | <reg name="TX9BUF" addr="0xF0"> | ||
1447 | <field name="RESERVED31_2" bitrange="31:2"/> | ||
1448 | <field name="TXURF" bitrange="1:1"/> | ||
1449 | <field name="TXFULL" bitrange="0:0"/> | ||
1450 | </reg> | ||
1451 | <reg name="TX9DMAINCTL" addr="0xF4"> | ||
1452 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1453 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1454 | </reg> | ||
1455 | <reg name="TX9DMALM_IADDR" addr="0xF8"> | ||
1456 | <field name="LMINADDR" bitrange="31:2"/> | ||
1457 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1458 | </reg> | ||
1459 | <reg name="RX10STAT" addr="0xFC"> | ||
1460 | <field name="RESERVED31_26" bitrange="31:26"/> | ||
1461 | <field name="RXOVF" bitrange="25:25"/> | ||
1462 | <field name="RXFULL" bitrange="24:24"/> | ||
1463 | <field name="RESERVED23_20" bitrange="23:20"/> | ||
1464 | <field name="RX_CF_INT" bitrange="19:19"/> | ||
1465 | <field name="RXACK" bitrange="18:18"/> | ||
1466 | <field name="RXERR" bitrange="17:17"/> | ||
1467 | <field name="RXVOID" bitrange="16:16"/> | ||
1468 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1469 | <field name="RXCNT" bitrange="10:0"/> | ||
1470 | </reg> | ||
1471 | <reg name="RX10CON" addr="0x100"> | ||
1472 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1473 | <field name="RXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1474 | <field name="RX_CF_INTE" bitrange="12:12"/> | ||
1475 | <field name="RXENDP_NUM" bitrange="11:8"/> | ||
1476 | <field name="RXACKINTEN" bitrange="7:7"/> | ||
1477 | <field name="RXERRINTEN" bitrange="6:6"/> | ||
1478 | <field name="RXVOIDINTEN" bitrange="5:5"/> | ||
1479 | <field name="EPEN" bitrange="4:4"/> | ||
1480 | <field name="RXNAK" bitrange="3:3"/> | ||
1481 | <field name="RXSTALL" bitrange="2:2"/> | ||
1482 | <field name="RXCLR" bitrange="1:1"/> | ||
1483 | <field name="RXFFRC" bitrange="0:0"/> | ||
1484 | </reg> | ||
1485 | <reg name="RX10DMACTLO" addr="0x104"> | ||
1486 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1487 | <field name="DMAOUTSTA" bitrange="0:0"/> | ||
1488 | </reg> | ||
1489 | <reg name="RX10DMAOUTLMADDR" addr="0x108"> | ||
1490 | <field name="LMOUTADDR" bitrange="31:2"/> | ||
1491 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1492 | </reg> | ||
1493 | <reg name="TX11STAT" addr="0x10C"> | ||
1494 | <field name="RESERVED31_21" bitrange="31:21"/> | ||
1495 | <field name="TX_CF_INT" bitrange="20:20"/> | ||
1496 | <field name="TXDMA_DN" bitrange="19:19"/> | ||
1497 | <field name="TXACK" bitrange="18:18"/> | ||
1498 | <field name="TXERR" bitrange="17:17"/> | ||
1499 | <field name="TXVOID" bitrange="16:16"/> | ||
1500 | <field name="RESERVED15:11" bitrange="15:11"/> | ||
1501 | <field name="TXLEN" bitrange="10:0"/> | ||
1502 | </reg> | ||
1503 | <reg name="TX11CON" addr="0x110"> | ||
1504 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1505 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1506 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1507 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1508 | <field name="TXDMADN_EN" bitrange="7:7"/> | ||
1509 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1510 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1511 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1512 | <field name="TXEPEN" bitrange="3:3"/> | ||
1513 | <field name="TXNAK" bitrange="2:2"/> | ||
1514 | <field name="TXSTALL" bitrange="1:1"/> | ||
1515 | <field name="TXCLR" bitrange="0:0"/> | ||
1516 | </reg> | ||
1517 | <reg name="TX11BUF" addr="0x114"> | ||
1518 | <field name="RESERVED31_4" bitrange="31:4"/> | ||
1519 | <field name="TXDS1" bitrange="3:3"/> | ||
1520 | <field name="TXDS0" bitrange="2:2"/> | ||
1521 | <field name="TXURF" bitrange="1:1"/> | ||
1522 | <field name="TXFULL" bitrange="0:0"/> | ||
1523 | </reg> | ||
1524 | <reg name="TX11DMAINCTL" addr="0x118"> | ||
1525 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1526 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1527 | </reg> | ||
1528 | <reg name="TX11DMALM_IADDR" addr="0x11C"></reg> | ||
1529 | <reg name="TX12STAT" addr="0x120"> | ||
1530 | <field name="RESERVED31_20" bitrange="31:20"/> | ||
1531 | <field name="TX_CF_INT" bitrange="19:19"/> | ||
1532 | <field name="TXACK" bitrange="18:18"/> | ||
1533 | <field name="TXERR" bitrange="17:17"/> | ||
1534 | <field name="TXVOID" bitrange="16:16"/> | ||
1535 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1536 | <field name="TXLEN" bitrange="10:0"/> | ||
1537 | </reg> | ||
1538 | <reg name="TX12CON" addr="0x124"> | ||
1539 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1540 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1541 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1542 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1543 | <field name="RESERVED7" bitrange="7:7"/> | ||
1544 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1545 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1546 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1547 | <field name="TXEPEN" bitrange="3:3"/> | ||
1548 | <field name="TXNAK" bitrange="2:2"/> | ||
1549 | <field name="TXSTALL" bitrange="1:1"/> | ||
1550 | <field name="TXCLR" bitrange="0:0"/> | ||
1551 | </reg> | ||
1552 | <reg name="TX12BUF" addr="0x128"> | ||
1553 | <field name="RESERVED31_2" bitrange="31:2"/> | ||
1554 | <field name="TXURF" bitrange="1:1"/> | ||
1555 | <field name="TXFULL" bitrange="0:0"/> | ||
1556 | </reg> | ||
1557 | <reg name="TX12DMAINCTL" addr="0x12C"> | ||
1558 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1559 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1560 | </reg> | ||
1561 | <reg name="TX12DMALM_IADDR" addr="0x130"> | ||
1562 | <field name="LMINADDR" bitrange="31:2"/> | ||
1563 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1564 | </reg> | ||
1565 | <reg name="RX13STAT" addr="0x134"> | ||
1566 | <field name="RESERVED31_26" bitrange="31:26"/> | ||
1567 | <field name="RXOVF" bitrange="25:25"/> | ||
1568 | <field name="RXFULL" bitrange="24:24"/> | ||
1569 | <field name="RESERVED23_20" bitrange="23:20"/> | ||
1570 | <field name="RX_CF_INT" bitrange="19:19"/> | ||
1571 | <field name="RXACK" bitrange="18:18"/> | ||
1572 | <field name="RXERR" bitrange="17:17"/> | ||
1573 | <field name="RXVOID" bitrange="16:16"/> | ||
1574 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1575 | <field name="RXCNT" bitrange="10:0"/> | ||
1576 | </reg> | ||
1577 | <reg name="RX13CON" addr="0x138"> | ||
1578 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1579 | <field name="RXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1580 | <field name="RX_CF_INTE" bitrange="12:12"/> | ||
1581 | <field name="RXENDP_NUM" bitrange="11:8"/> | ||
1582 | <field name="RXACKINTEN" bitrange="7:7"/> | ||
1583 | <field name="RXERRINTEN" bitrange="6:6"/> | ||
1584 | <field name="RXVOIDINTEN" bitrange="5:5"/> | ||
1585 | <field name="EPEN" bitrange="4:4"/> | ||
1586 | <field name="RXNAK" bitrange="3:3"/> | ||
1587 | <field name="RXSTALL" bitrange="2:2"/> | ||
1588 | <field name="RXCLR" bitrange="1:1"/> | ||
1589 | <field name="RXFFRC" bitrange="0:0"/> | ||
1590 | </reg> | ||
1591 | <reg name="RX13DMACTLO" addr="0x13C"> | ||
1592 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1593 | <field name="DMAOUTSTA" bitrange="0:0"/> | ||
1594 | </reg> | ||
1595 | <reg name="RX13DMAOUTLMADDR" addr="0x140"> | ||
1596 | <field name="LMOUTADDR" bitrange="31:2"/> | ||
1597 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1598 | </reg> | ||
1599 | <reg name="TX14STAT" addr="0x144"> | ||
1600 | <field name="RESERVED31_21" bitrange="31:21"/> | ||
1601 | <field name="TX_CF_INT" bitrange="20:20"/> | ||
1602 | <field name="TXDMA_DN" bitrange="19:19"/> | ||
1603 | <field name="TXACK" bitrange="18:18"/> | ||
1604 | <field name="TXERR" bitrange="17:17"/> | ||
1605 | <field name="TXVOID" bitrange="16:16"/> | ||
1606 | <field name="RESERVED15:11" bitrange="15:11"/> | ||
1607 | <field name="TXLEN" bitrange="10:0"/> | ||
1608 | </reg> | ||
1609 | <reg name="TX14CON" addr="0x148"> | ||
1610 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1611 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1612 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1613 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1614 | <field name="TXDMADN_EN" bitrange="7:7"/> | ||
1615 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1616 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1617 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1618 | <field name="TXEPEN" bitrange="3:3"/> | ||
1619 | <field name="TXNAK" bitrange="2:2"/> | ||
1620 | <field name="TXSTALL" bitrange="1:1"/> | ||
1621 | <field name="TXCLR" bitrange="0:0"/> | ||
1622 | </reg> | ||
1623 | <reg name="TX14BUF" addr="0x14C"> | ||
1624 | <field name="RESERVED31_4" bitrange="31:4"/> | ||
1625 | <field name="TXDS1" bitrange="3:3"/> | ||
1626 | <field name="TXDS0" bitrange="2:2"/> | ||
1627 | <field name="TXURF" bitrange="1:1"/> | ||
1628 | <field name="TXFULL" bitrange="0:0"/> | ||
1629 | </reg> | ||
1630 | <reg name="TX14DMAINCTL" addr="0x150"> | ||
1631 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1632 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1633 | </reg> | ||
1634 | <reg name="TX14DMALM_IADDR" addr="0x154"></reg> | ||
1635 | <reg name="TX15STAT" addr="0x158"> | ||
1636 | <field name="RESERVED31_20" bitrange="31:20"/> | ||
1637 | <field name="TX_CF_INT" bitrange="19:19"/> | ||
1638 | <field name="TXACK" bitrange="18:18"/> | ||
1639 | <field name="TXERR" bitrange="17:17"/> | ||
1640 | <field name="TXVOID" bitrange="16:16"/> | ||
1641 | <field name="RESERVED15_11" bitrange="15:11"/> | ||
1642 | <field name="TXLEN" bitrange="10:0"/> | ||
1643 | </reg> | ||
1644 | <reg name="TX15CON" addr="0x15C"> | ||
1645 | <field name="RESERVED31_14" bitrange="31:14"/> | ||
1646 | <field name="TXSTALL_AUTOCLR" bitrange="13:13"/> | ||
1647 | <field name="TX_CF_INTE" bitrange="12:12"/> | ||
1648 | <field name="TXENDP_NUM" bitrange="11:8"/> | ||
1649 | <field name="RESERVED7" bitrange="7:7"/> | ||
1650 | <field name="TXACKINTEN" bitrange="6:6"/> | ||
1651 | <field name="TXERRINTEN" bitrange="5:5"/> | ||
1652 | <field name="TXVOIDINTEN" bitrange="4:4"/> | ||
1653 | <field name="TXEPEN" bitrange="3:3"/> | ||
1654 | <field name="TXNAK" bitrange="2:2"/> | ||
1655 | <field name="TXSTALL" bitrange="1:1"/> | ||
1656 | <field name="TXCLR" bitrange="0:0"/> | ||
1657 | </reg> | ||
1658 | <reg name="TX15BUF" addr="0x160"> | ||
1659 | <field name="RESERVED31_2" bitrange="31:2"/> | ||
1660 | <field name="TXURF" bitrange="1:1"/> | ||
1661 | <field name="TXFULL" bitrange="0:0"/> | ||
1662 | </reg> | ||
1663 | <reg name="TX15DMAINCTL" addr="0x164"> | ||
1664 | <field name="RESERVED31_1" bitrange="31:1"/> | ||
1665 | <field name="DMAINSTA" bitrange="0:0"/> | ||
1666 | </reg> | ||
1667 | <reg name="TX15DMALM_IADDR" addr="0x168"> | ||
1668 | <field name="LMINADDR" bitrange="31:2"/> | ||
1669 | <field name="RESERVED1_0" bitrange="1:0"/> | ||
1670 | </reg> | 2463 | </reg> |
1671 | </dev> | 2464 | </dev> |
1672 | <dev name="UHC" long_name="USB 2.0 Host Controller" desc="USB 2.0 Host Controller" version="1.0"> | 2465 | <dev name="UHC" long_name="USB 2.0 Host Controller" desc="USB 2.0 Host Controller" version="1.0"> |
1673 | <addr name="UHC" addr="0x180a4000" /> | 2466 | <addr name="UHC" addr="0x180a4000"/> |
1674 | </dev> | ||
1675 | <dev name="SDRSTMC" long_name="SDRSTMC Static/SDRAM Memory Controller" desc="SDRSTMC Static/SDRAM Memory Controller" version="1.0"> | ||
1676 | <addr name="SDRSTMC" addr="0x180b0000" /> | ||
1677 | <reg name="MCSDR_MODE" addr="0x100"></reg> | ||
1678 | <reg name="MCSDR_ADDMAP" addr="0x104"></reg> | ||
1679 | <reg name="MCSDR_ADDCFG" addr="0x108"></reg> | ||
1680 | <reg name="MCSDR_BASIC" addr="0x10C"></reg> | ||
1681 | <reg name="MCSDR_T_REF" addr="0x110"></reg> | ||
1682 | <reg name="MCSDR_T_RFC" addr="0x114"></reg> | ||
1683 | <reg name="MCSDR_T_MRD" addr="0x118"></reg> | ||
1684 | <reg name="MCSDR_T_RP" addr="0x120"></reg> | ||
1685 | <reg name="MCSDR_T_RCD" addr="0x124"></reg> | ||
1686 | <reg name="MCST0_T_CEWD" addr="0x200"></reg> | ||
1687 | <reg name="MCST0_T_CE2WE" addr="0x204"></reg> | ||
1688 | <reg name="MCST0_WEWD" addr="0x208"></reg> | ||
1689 | <reg name="MCST0_T_WE2CE" addr="0x20C"></reg> | ||
1690 | <reg name="MCST0_T_CEWDR" addr="0x210"></reg> | ||
1691 | <reg name="MCST0_T_CE2RD" addr="0x214"></reg> | ||
1692 | <reg name="MCST0_T_RDWD" addr="0x218"></reg> | ||
1693 | <reg name="MCST0_T_RD2CE" addr="0x21C"></reg> | ||
1694 | <reg name="MCST0_BASIC" addr="0x220"></reg> | ||
1695 | <reg name="MCST1_T_CEWD" addr="0x300"></reg> | ||
1696 | <reg name="MCST1_T_CE2WE" addr="0x304"></reg> | ||
1697 | <reg name="MCST1_WEWD" addr="0x308"></reg> | ||
1698 | <reg name="MCST1_T_WE2CE" addr="0x30C"></reg> | ||
1699 | <reg name="MCST1_T_CEWDR" addr="0x310"></reg> | ||
1700 | <reg name="MCST1_T_CE2RD" addr="0x314"></reg> | ||
1701 | <reg name="MCST1_T_RDWD" addr="0x318"></reg> | ||
1702 | <reg name="MCST1_T_RD2CE" addr="0x31C"></reg> | ||
1703 | <reg name="MCST1_BASIC" addr="0x320"></reg> | ||
1704 | </dev> | 2467 | </dev> |
1705 | <dev name="VIP" long_name="VIP Video Input Processor" desc="VIP Video Input Processor" version="1.0"> | 2468 | <dev name="VIP" long_name="VIP Video Input Processor" desc="VIP Video Input Processor" version="1.0"> |
1706 | <addr name="VIP" addr="0x180c0000" /> | 2469 | <addr name="VIP" addr="0x180c0000"/> |
1707 | </dev> | ||
1708 | <dev name="NANDC" long_name="NAND Flash Controller" desc="NAND Flash Controller" version="1.0"> | ||
1709 | <addr name="NANDC" addr="0x180e8000" /> | ||
1710 | <reg name="FMCTL" addr="0x00"></reg> | ||
1711 | <reg name="FMWAIT" addr="0x04"></reg> | ||
1712 | <reg name="FLCTL" addr="0x08"></reg> | ||
1713 | <reg name="BCHCTL" addr="0x0C"></reg> | ||
1714 | <reg name="BCHST" addr="0xD0"></reg> | ||
1715 | <reg name="FLASH_DATAn"> | ||
1716 | <formula string="0x200*n+0x200" /> | ||
1717 | <addr name="DATA0" addr="0x200" /> | ||
1718 | <addr name="DATA1" addr="0x400" /> | ||
1719 | <addr name="DATA2" addr="0x600" /> | ||
1720 | <addr name="DATA3" addr="0x800" /> | ||
1721 | </reg> | ||
1722 | <reg name="ADDRn"> | ||
1723 | <formula string="0x200*n+0x204" /> | ||
1724 | <addr name="ADDR0" addr="0x204" /> | ||
1725 | <addr name="ADDR1" addr="0x404" /> | ||
1726 | <addr name="ADDR2" addr="0x604" /> | ||
1727 | <addr name="ADDR3" addr="0x804" /> | ||
1728 | </reg> | ||
1729 | <reg name="FLASH_CMDn"> | ||
1730 | <formula string="0x200*n+0x208" /> | ||
1731 | <addr name="CMD0" addr="0x208" /> | ||
1732 | <addr name="CMD1" addr="0x408" /> | ||
1733 | <addr name="CMD2" addr="0x608" /> | ||
1734 | <addr name="CMD3" addr="0x808" /> | ||
1735 | </reg> | ||
1736 | <reg name="PAGE_BUF" addr="0xA00"></reg> | ||
1737 | <reg name="SPARE_BUF" addr="0x1200"></reg> | ||
1738 | </dev> | 2470 | </dev> |
1739 | <dev name="LCDC" long_name="LCD Interface Controller" desc="LCD Interface Controller" version="1.0"> | 2471 | <dev name="WDT" long_name="Watchdog" desc="Watchdog" version="1.0"> |
1740 | <addr name="LCDC" addr="0x186e8000" /> | 2472 | <addr name="WDT" addr="0x18010000"/> |
1741 | <reg name="LCDC_CTRL" addr="0x00"> | 2473 | <reg name="LR" desc=""> |
1742 | <field name="STOP" bitrange="0:0"></field> | 2474 | <addr name="LR" addr="0x0"/> |
1743 | <field name="ENABLE" bitrange="1:1"> | 2475 | </reg> |
1744 | <value name="ENABLE" value="1"/> | 2476 | <reg name="CVR" desc=""> |
1745 | <value name="DISABLE" value="0"/> | 2477 | <addr name="CVR" addr="0x4"/> |
1746 | </field> | 2478 | </reg> |
1747 | <field name="RGB_DUMMY" bitrange="3:2"> | 2479 | <reg name="CON" desc=""> |
1748 | <value name="PARALLEL" value="0"/> | 2480 | <addr name="CON" addr="0x8"/> |
1749 | <value name="RESERVED" value="1"/> | 2481 | </reg> |
1750 | <value name="SERIAL_UPS501" value="2"/> | ||
1751 | <value name="SERIAL_UPS502" value="3"/> | ||
1752 | </field> | ||
1753 | <field name="EVEN_EN" bitrange="4:4"></field> | ||
1754 | <field name="START_EVEN" bitrange="5:5"></field> | ||
1755 | <field name="RGB24B" bitrange="6:6"></field> | ||
1756 | <field name="MCU" bitrange="7:7"></field> | ||
1757 | <field name="YMIX" bitrange="8:8"></field> | ||
1758 | <field name="ALPHA" bitrange="11:9"></field> | ||
1759 | <field name="UVBUFEXCH" bitrange="12:12"></field> | ||
1760 | <field name="ALPHA_24B" bitrange="13:13"></field> | ||
1761 | <field name="RESERVED" bitrange="15:14"></field> | ||
1762 | </reg> | ||
1763 | <reg name="MCU_CTRL" addr="0x04"> | ||
1764 | <field name="BYPASS" bitrange="0:0"></field> | ||
1765 | <field name="BUFF_START" bitrange="1:1"></field> | ||
1766 | <field name="RESERVED0" bitrange="4:2"></field> | ||
1767 | <field name="LCD_RS" bitrange="5:5"></field> | ||
1768 | <field name="ALPHA_BUF_EN" bitrange="6:6"></field> | ||
1769 | <field name="RESERVED1" bitrange="7:7"></field> | ||
1770 | <field name="ALPHA_BASE" bitrange="14:8"></field> | ||
1771 | <field name="RESERVED2" bitrange="15:15"></field> | ||
1772 | </reg> | ||
1773 | <reg name="HOR_PERIOD" addr="0x08"></reg> | ||
1774 | <reg name="VERT_PERIOD" addr="0x0C"></reg> | ||
1775 | <reg name="HOR_PW" addr="0x10"></reg> | ||
1776 | <reg name="VERT_PW" addr="0x14"></reg> | ||
1777 | <reg name="HOR_BP" addr="0x18"></reg> | ||
1778 | <reg name="VERT_BP" addr="0x1C"></reg> | ||
1779 | <reg name="HOR_ACT" addr="0x20"></reg> | ||
1780 | <reg name="VERT_ACT" addr="0x24"></reg> | ||
1781 | <reg name="LINE0_YADDR" addr="0x28"></reg> | ||
1782 | <reg name="LINE0_UVADDR" addr="0x2C"></reg> | ||
1783 | <reg name="LINE1_YADDR" addr="0x30"></reg> | ||
1784 | <reg name="LINE1_UVADDR" addr="0x34"></reg> | ||
1785 | <reg name="LINE2_YADDR" addr="0x38"></reg> | ||
1786 | <reg name="LINE2_UVADDR" addr="0x3C"></reg> | ||
1787 | <reg name="LINE3_YADDR" addr="0x40"></reg> | ||
1788 | <reg name="LINE3_UVADDR" addr="0x44"></reg> | ||
1789 | <reg name="START_X" addr="0x48"></reg> | ||
1790 | <reg name="START_Y" addr="0x4C"></reg> | ||
1791 | <reg name="DELTA_X" addr="0x50"></reg> | ||
1792 | <reg name="DELTA_Y" addr="0x54"></reg> | ||
1793 | <reg name="LCDC_INTR_MASK" addr="0x58"></reg> | ||
1794 | <reg name="ALPHA_ALX" addr="0x5C"></reg> | ||
1795 | <reg name="ALPHA_ATY" addr="0x60"></reg> | ||
1796 | <reg name="ALPHA_ARX" addr="0x64"></reg> | ||
1797 | <reg name="ALPHA_ABY" addr="0x68"></reg> | ||
1798 | <reg name="ALPHA_BLX" addr="0x6C"></reg> | ||
1799 | <reg name="ALPHA_BTY" addr="0x70"></reg> | ||
1800 | <reg name="ALPHA_BRX" addr="0x74"></reg> | ||
1801 | <reg name="ALPHA_BBY" addr="0x78"></reg> | ||
1802 | <reg name="LCDC_STA" addr="0x7C"></reg> | ||
1803 | <reg name="LCD_COMMAND" addr="0x1000"></reg> | ||
1804 | <reg name="LCD_DATA" addr="0x1004"></reg> | ||
1805 | <reg name="LCD_BUFF" addr="0x2000"></reg> | ||
1806 | </dev> | ||
1807 | <dev name="HSADC" long_name="High Speed ADC" desc="High Speed ADC" version="1.0"> | ||
1808 | <addr name="HSADC" addr="0x186ec000" /> | ||
1809 | <reg name="DATA" addr="0x00"></reg> | ||
1810 | <reg name="CTRL" addr="0x04"></reg> | ||
1811 | <reg name="IER" addr="0x08"></reg> | ||
1812 | <reg name="ISR" addr="0x0C"></reg> | ||
1813 | </dev> | ||
1814 | <dev name="DWDMA" long_name="DMA Controller" desc="DMA Controller" version="1.0"> | ||
1815 | <addr name="DWDMA" addr="0x186f0000" /> | ||
1816 | <reg name="DWDMA_SARn"> | ||
1817 | <formula string="n*0x58+0x00" /> | ||
1818 | <addr name="SAR0" addr="0x00" /> | ||
1819 | <addr name="SAR1" addr="0x58" /> | ||
1820 | <addr name="SAR2" addr="0xb0" /> | ||
1821 | <addr name="SAR3" addr="0x108" /> | ||
1822 | </reg> | ||
1823 | <reg name="DWDMA_DARn"> | ||
1824 | <formula string="n*0x58+0x08" /> | ||
1825 | <addr name="DAR0" addr="0x08" /> | ||
1826 | <addr name="DAR1" addr="0x60" /> | ||
1827 | <addr name="DAR2" addr="0xb8" /> | ||
1828 | <addr name="DAR3" addr="0x110" /> | ||
1829 | </reg> | ||
1830 | <reg name="DWDMA_LLPn"> | ||
1831 | <formula string="n*0x58+0x10" /> | ||
1832 | <addr name="LLP0" addr="0x10" /> | ||
1833 | <addr name="LLP1" addr="0x68" /> | ||
1834 | <addr name="LLP2" addr="0xc0" /> | ||
1835 | <addr name="LLP3" addr="0x118" /> | ||
1836 | </reg> | ||
1837 | <reg name="DWDMA_CTL_Ln"> | ||
1838 | <formula string="n*0x58+0x18" /> | ||
1839 | <addr name="CTL_L0" addr="0x18" /> | ||
1840 | <addr name="CTL_L1" addr="0x70" /> | ||
1841 | <addr name="CTL_L2" addr="0xc8" /> | ||
1842 | <addr name="CTL_L3" addr="0x120" /> | ||
1843 | </reg> | ||
1844 | <reg name="DWDMA_CTL_Hn"> | ||
1845 | <formula string="n*0x58+0x1c" /> | ||
1846 | <addr name="CTL_H0" addr="0x1c" /> | ||
1847 | <addr name="CTL_H1" addr="0x74" /> | ||
1848 | <addr name="CTL_H2" addr="0xcc" /> | ||
1849 | <addr name="CTL_H3" addr="0x124" /> | ||
1850 | </reg> | ||
1851 | <reg name="DWDMA_SSTATn"> | ||
1852 | <formula string="n*0x58+0x20" /> | ||
1853 | <addr name="SSTAT0" addr="0x20" /> | ||
1854 | <addr name="SSTAT1" addr="0x78" /> | ||
1855 | <addr name="SSTAT2" addr="0xd0" /> | ||
1856 | <addr name="SSTAT3" addr="0x128" /> | ||
1857 | </reg> | ||
1858 | <reg name="DWDMA_DSTATn"> | ||
1859 | <formula string="n*0x58+0x28" /> | ||
1860 | <addr name="DSTAT0" addr="0x28" /> | ||
1861 | <addr name="DSTAT1" addr="0x80" /> | ||
1862 | <addr name="DSTAT2" addr="0xd8" /> | ||
1863 | <addr name="DSTAT3" addr="0x130" /> | ||
1864 | </reg> | ||
1865 | <reg name="DWDMA_SSTATARn"> | ||
1866 | <formula string="n*0x58+0x30" /> | ||
1867 | <addr name="SSTATAR0" addr="0x30" /> | ||
1868 | <addr name="SSTATAR1" addr="0x88" /> | ||
1869 | <addr name="SSTATAR2" addr="0xe0" /> | ||
1870 | <addr name="SSTATAR3" addr="0x138" /> | ||
1871 | </reg> | ||
1872 | <reg name="DWDMA_DSTATARn"> | ||
1873 | <formula string="n*0x58+0x38" /> | ||
1874 | <addr name="DSTATAR0" addr="0x38" /> | ||
1875 | <addr name="DSTATAR1" addr="0x90" /> | ||
1876 | <addr name="DSTATAR2" addr="0xe8" /> | ||
1877 | <addr name="DSTATAR3" addr="0x140" /> | ||
1878 | </reg> | ||
1879 | <reg name="DWDMA_CFG_Ln"> | ||
1880 | <formula string="n*0x58+0x40" /> | ||
1881 | <addr name="CFG_L0" addr="0x40" /> | ||
1882 | <addr name="CFG_L1" addr="0x98" /> | ||
1883 | <addr name="CFG_L2" addr="0xf0" /> | ||
1884 | <addr name="CFG_L3" addr="0x148" /> | ||
1885 | </reg> | ||
1886 | <reg name="DWDMA_CFG_Hn"> | ||
1887 | <formula string="n*0x58+0x44" /> | ||
1888 | <addr name="CFG_H0" addr="0x44" /> | ||
1889 | <addr name="CFG_H1" addr="0x9c" /> | ||
1890 | <addr name="CFG_H2" addr="0xf4" /> | ||
1891 | <addr name="CFG_H3" addr="0x14c" /> | ||
1892 | </reg> | ||
1893 | <reg name="DWDMA_SGRn"> | ||
1894 | <formula string="n*0x58+0x48" /> | ||
1895 | <addr name="SGR0" addr="0x48" /> | ||
1896 | <addr name="SGR1" addr="0xa0" /> | ||
1897 | <addr name="SGR2" addr="0xf8" /> | ||
1898 | <addr name="SGR3" addr="0x150" /> | ||
1899 | </reg> | ||
1900 | <reg name="DWDMA_DSRn"> | ||
1901 | <formula string="n*0x58+0x50" /> | ||
1902 | <addr name="DSR0" addr="0x50" /> | ||
1903 | <addr name="DSR1" addr="0xa8" /> | ||
1904 | <addr name="DSR2" addr="0x100" /> | ||
1905 | <addr name="DSR3" addr="0x158" /> | ||
1906 | </reg> | ||
1907 | <reg name="RAW_TFR" addr="0x2C0"></reg> | ||
1908 | <reg name="RAW_BLOCK" addr="0x2C8"></reg> | ||
1909 | <reg name="RAW_SRCTRAN" addr="0x2D0"></reg> | ||
1910 | <reg name="RAW_DSTTRAN" addr="0x2D8"></reg> | ||
1911 | <reg name="RAW_ERR" addr="0x2E0"></reg> | ||
1912 | <reg name="STATUS_TFR" addr="0x2E8"></reg> | ||
1913 | <reg name="STATUS_BLOCK" addr="0x2F0"></reg> | ||
1914 | <reg name="STATUS_SRCTRAN" addr="0x2F8"></reg> | ||
1915 | <reg name="STATUS_DSTTRAN" addr="0x300"></reg> | ||
1916 | <reg name="STATUS_ERR" addr="0x308"></reg> | ||
1917 | <reg name="MASK_TFR" addr="0x310"></reg> | ||
1918 | <reg name="MASK_BLOCK" addr="0x318"></reg> | ||
1919 | <reg name="MASK_SRCTRAN" addr="0x320"></reg> | ||
1920 | <reg name="MASK_DSTTRAN" addr="0x328"></reg> | ||
1921 | <reg name="MASK_ERR" addr="0x330"></reg> | ||
1922 | <reg name="CLEAR_TFR" addr="0x338"></reg> | ||
1923 | <reg name="CLEAR_BLOCK" addr="0x340"></reg> | ||
1924 | <reg name="CLEAR_SRCTRAN" addr="0x348"></reg> | ||
1925 | <reg name="CLEAR_DSTTRAN" addr="0x350"></reg> | ||
1926 | <reg name="CLEAR_ERR" addr="0x358"></reg> | ||
1927 | <reg name="STATUS_INT" addr="0x360"></reg> | ||
1928 | <reg name="REQ_SRC" addr="0x368"></reg> | ||
1929 | <reg name="REQ_DST" addr="0x370"></reg> | ||
1930 | <reg name="S_REQ_SRC" addr="0x378"></reg> | ||
1931 | <reg name="S_REQ_DST" addr="0x380"></reg> | ||
1932 | <reg name="L_REQ_SRC" addr="0x388"></reg> | ||
1933 | <reg name="L_REQ_DST" addr="0x390"></reg> | ||
1934 | <reg name="DMA_CFG" addr="0x398"></reg> | ||
1935 | <reg name="DMA_CHEN" addr="0x3A0"></reg> | ||
1936 | </dev> | ||
1937 | <dev name="CACHE" long_name="CACHE Controller" desc="CACHE Controller" version="1.0"> | ||
1938 | <addr name="CACHE" addr="0xEFFF0000" /> | ||
1939 | <reg name="DEVID" addr="0x00"> | ||
1940 | <field name="CACHE_EN" bitrange="31:31"></field> | ||
1941 | </reg> | ||
1942 | <reg name="CACHEOP" addr="0x04"> | ||
1943 | <field name="ADDRESS" bitrange="31:2"></field> | ||
1944 | <field name="OPCODE" bitrange="1:0"> | ||
1945 | <value name="NOP" value="0x00" /> | ||
1946 | <value name="INVALIDATE_SINGLE_ENTRY" value="0x01" /> | ||
1947 | <value name="INVALIDATE_WAY" value="0x2" /> | ||
1948 | </field> | ||
1949 | </reg> | ||
1950 | <reg name="CACHELKDN" addr="0x08"> | ||
1951 | <field name="RESERVED" bitrange="31:2"></field> | ||
1952 | <field name="WAY_SELECT" bitrange="1:0"> | ||
1953 | <value name="LOCK_NONE" value="0x00" /> | ||
1954 | <value name="LOCK_WAY0" value="0x01" /> | ||
1955 | <value name="LOCK_WAY1" value="0x02" /> | ||
1956 | </field> | ||
1957 | </reg> | ||
1958 | <reg name="MEMMAPA" addr="0x10"> | ||
1959 | <field name="MEMBASE" bitrange="31:25"></field> | ||
1960 | <field name="MAPSIZE" bitrange="7:0"> | ||
1961 | <value name="MAP_32MB" value="0xfe" /> | ||
1962 | <value name="MAP_64MB" value="0xfc" /> | ||
1963 | <value name="MAP_128MB" value="0xf8" /> | ||
1964 | </field> | ||
1965 | </reg> | ||
1966 | <reg name="MEMMAPB" addr="0x14"> | ||
1967 | <field name="MEMBASE" bitrange="31:25"></field> | ||
1968 | <field name="MAPSIZE" bitrange="7:0"> | ||
1969 | <value name="MAP_32MB" value="0xfe" /> | ||
1970 | <value name="MAP_64MB" value="0xfc" /> | ||
1971 | <value name="MAP_128MB" value="0xf8" /> | ||
1972 | </field> | ||
1973 | </reg> | ||
1974 | <reg name="MEMMAPC" addr="0x18"> | ||
1975 | <field name="MEMBASE" bitrange="31:25"></field> | ||
1976 | <field name="MAPSIZE" bitrange="7:0"> | ||
1977 | <value name="MAP_32MB" value="0xfe" /> | ||
1978 | <value name="MAP_64MB" value="0xfc" /> | ||
1979 | <value name="MAP_128MB" value="0xf8" /> | ||
1980 | </field> | ||
1981 | </reg> | ||
1982 | <reg name="MEMMAPD" addr="0x1C"> | ||
1983 | <field name="MEMBASE" bitrange="31:25"></field> | ||
1984 | <field name="MAPSIZE" bitrange="7:0"> | ||
1985 | <value name="MAP_32MB" value="0xfe" /> | ||
1986 | <value name="MAP_64MB" value="0xfc" /> | ||
1987 | <value name="MAP_128MB" value="0xf8" /> | ||
1988 | </field> | ||
1989 | </reg> | ||
1990 | <reg name="PFCNTRA_CTRL" addr="0x20"></reg> | ||
1991 | <reg name="PFCNTRA" addr="0x24"></reg> | ||
1992 | <reg name="PFCNTRB_CTRL" addr="0x28"></reg> | ||
1993 | <reg name="PFCNTRB" addr="0x2C"></reg> | ||
1994 | </dev> | 2482 | </dev> |
1995 | </soc> | 2483 | </soc> |