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-rw-r--r--utils/hwstub/stmp/system.h118
1 files changed, 0 insertions, 118 deletions
diff --git a/utils/hwstub/stmp/system.h b/utils/hwstub/stmp/system.h
deleted file mode 100644
index e5aea12051..0000000000
--- a/utils/hwstub/stmp/system.h
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@@ -1,118 +0,0 @@
1/***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright (C) 2012 by Amaury Pouly
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21#ifndef __HWSTUB_SYSTEM__
22#define __HWSTUB_SYSTEM__
23
24#define IRQ_ENABLED 0x00
25#define IRQ_DISABLED 0x80
26#define IRQ_STATUS 0x80
27#define FIQ_ENABLED 0x00
28#define FIQ_DISABLED 0x40
29#define FIQ_STATUS 0x40
30#define IRQ_FIQ_ENABLED 0x00
31#define IRQ_FIQ_DISABLED 0xc0
32#define IRQ_FIQ_STATUS 0xc0
33#define HIGHEST_IRQ_LEVEL IRQ_DISABLED
34
35#define set_irq_level(status) \
36 set_interrupt_status((status), IRQ_STATUS)
37#define set_fiq_status(status) \
38 set_interrupt_status((status), FIQ_STATUS)
39
40#define disable_irq_save() \
41 disable_interrupt_save(IRQ_STATUS)
42#define disable_fiq_save() \
43 disable_interrupt_save(FIQ_STATUS)
44
45#define restore_irq(cpsr) \
46 restore_interrupt(cpsr)
47#define restore_fiq(cpsr) \
48 restore_interrupt(cpsr)
49
50#define disable_irq() \
51 disable_interrupt(IRQ_STATUS)
52#define enable_irq() \
53 enable_interrupt(IRQ_STATUS)
54#define disable_fiq() \
55 disable_interrupt(FIQ_STATUS)
56#define enable_fiq() \
57 enable_interrupt(FIQ_STATUS)
58
59static inline int set_interrupt_status(int status, int mask)
60{
61 unsigned long cpsr;
62 int oldstatus;
63 /* Read the old levels and set the new ones */
64 asm volatile (
65 "mrs %1, cpsr \n"
66 "bic %0, %1, %[mask] \n"
67 "orr %0, %0, %2 \n"
68 "msr cpsr_c, %0 \n"
69 : "=&r,r"(cpsr), "=&r,r"(oldstatus)
70 : "r,i"(status & mask), [mask]"i,i"(mask));
71
72 return oldstatus;
73}
74
75static inline void restore_interrupt(int cpsr)
76{
77 /* Set cpsr_c from value returned by disable_interrupt_save
78 * or set_interrupt_status */
79 asm volatile ("msr cpsr_c, %0" : : "r"(cpsr));
80}
81
82static inline void enable_interrupt(int mask)
83{
84 /* Clear I and/or F disable bit */
85 int tmp;
86 asm volatile (
87 "mrs %0, cpsr \n"
88 "bic %0, %0, %1 \n"
89 "msr cpsr_c, %0 \n"
90 : "=&r"(tmp) : "i"(mask));
91}
92
93static inline void disable_interrupt(int mask)
94{
95 /* Set I and/or F disable bit */
96 int tmp;
97 asm volatile (
98 "mrs %0, cpsr \n"
99 "orr %0, %0, %1 \n"
100 "msr cpsr_c, %0 \n"
101 : "=&r"(tmp) : "i"(mask));
102}
103
104static inline int disable_interrupt_save(int mask)
105{
106 /* Set I and/or F disable bit and return old cpsr value */
107 int cpsr, tmp;
108 asm volatile (
109 "mrs %1, cpsr \n"
110 "orr %0, %1, %2 \n"
111 "msr cpsr_c, %0 \n"
112 : "=&r"(tmp), "=&r"(cpsr)
113 : "i"(mask));
114 return cpsr;
115}
116
117#endif /* __HWSTUB_SYSTEM__ */
118