diff options
Diffstat (limited to 'utils/disassembler/arm')
-rw-r--r-- | utils/disassembler/arm/disasm_arm.c | 846 | ||||
-rw-r--r-- | utils/disassembler/arm/main.c | 264 |
2 files changed, 555 insertions, 555 deletions
diff --git a/utils/disassembler/arm/disasm_arm.c b/utils/disassembler/arm/disasm_arm.c index b23c6b0355..14e72d9583 100644 --- a/utils/disassembler/arm/disasm_arm.c +++ b/utils/disassembler/arm/disasm_arm.c | |||
@@ -1,423 +1,423 @@ | |||
1 | #include <stdio.h> | 1 | #include <stdio.h> |
2 | #include <string.h> | 2 | #include <string.h> |
3 | #include <stdint.h> | 3 | #include <stdint.h> |
4 | 4 | ||
5 | #define ULONG uint32_t | 5 | #define ULONG uint32_t |
6 | #define UCHAR uint8_t | 6 | #define UCHAR uint8_t |
7 | 7 | ||
8 | #define FRMT "0x%x" // "0x%x" | 8 | #define FRMT "0x%x" // "0x%x" |
9 | #define SHFTFRMC "%s %s #%d" // "%s %s %d" | 9 | #define SHFTFRMC "%s %s #%d" // "%s %s %d" |
10 | #define SHFTFRMR "%s %s %s" // "%s %s %s" | 10 | #define SHFTFRMR "%s %s %s" // "%s %s %s" |
11 | //#define FRMT "0x%x" | 11 | //#define FRMT "0x%x" |
12 | //#define SHFTFRMC "%s %s %d" | 12 | //#define SHFTFRMC "%s %s %d" |
13 | //#define SHFTFRMR "%s %s %s" | 13 | //#define SHFTFRMR "%s %s %s" |
14 | 14 | ||
15 | char *cond[16] = { "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", "", "nv" }; | 15 | char *cond[16] = { "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", "", "nv" }; |
16 | char *cnd1[16] = { "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", " ", "nv" }; | 16 | char *cnd1[16] = { "eq", "ne", "cs", "cc", "mi", "pl", "vs", "vc", "hi", "ls", "ge", "lt", "gt", "le", " ", "nv" }; |
17 | char *opcd[16] = {"and","eor","sub","rsb","add","adc","sbc","rsc","tst","teq","cmp","cmn","orr","mov","bic","mvn" }; | 17 | char *opcd[16] = {"and","eor","sub","rsb","add","adc","sbc","rsc","tst","teq","cmp","cmn","orr","mov","bic","mvn" }; |
18 | char setc[32] = {0,115,0,115,0,115,0,115,0,115,0,115,0,115,0,115,0, 0 ,0, 0 ,0, 0 ,0, 0 ,0,115,0,115,0,115,0,115 }; | 18 | char setc[32] = {0,115,0,115,0,115,0,115,0,115,0,115,0,115,0,115,0, 0 ,0, 0 ,0, 0 ,0, 0 ,0,115,0,115,0,115,0,115 }; |
19 | char *regs[16] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }; | 19 | char *regs[16] = { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc" }; |
20 | 20 | ||
21 | char *shfts[4] = { "lsl", "lsr", "asr", "ror" }; | 21 | char *shfts[4] = { "lsl", "lsr", "asr", "ror" }; |
22 | 22 | ||
23 | /* | 23 | /* |
24 | 31-28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 | 24 | 31-28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 |
25 | Cond 0 0 I ---Opcode--- S |----Rn----- ----Rd----- --------Operand 2-------- Data Processing /PSR Transfer | 25 | Cond 0 0 I ---Opcode--- S |----Rn----- ----Rd----- --------Operand 2-------- Data Processing /PSR Transfer |
26 | Cond 0 0 0 0 | 0 0 A S |----Rd----- ----Rn----- ---Rs---- 1 0 0 1 --Rm--- Multiply | 26 | Cond 0 0 0 0 | 0 0 A S |----Rd----- ----Rn----- ---Rs---- 1 0 0 1 --Rm--- Multiply |
27 | Cond 0 0 0 0 | 1 U A S |---RdHi---- ---RdLo---- ---Rn---- 1 0 0 1 --Rm--- Multiply Long | 27 | Cond 0 0 0 0 | 1 U A S |---RdHi---- ---RdLo---- ---Rn---- 1 0 0 1 --Rm--- Multiply Long |
28 | Cond 0 0 0 1 | 0 B 0 0 |----Rn----- ----Rd----- 0 0 0 0 1 0 0 1 --Rm--- Single Data Swap | 28 | Cond 0 0 0 1 | 0 B 0 0 |----Rn----- ----Rd----- 0 0 0 0 1 0 0 1 --Rm--- Single Data Swap |
29 | Cond 0 0 0 1 | 0 0 1 0 |1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1 --Rn--- Branch and Exchange | 29 | Cond 0 0 0 1 | 0 0 1 0 |1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 1 --Rn--- Branch and Exchange |
30 | Cond 0 0 0 P | U 0 W L |----Rn----- ----Rd----- 0 0 0 0 1 S H 1 --Rm--- Halfword Data Transfer: register offset | 30 | Cond 0 0 0 P | U 0 W L |----Rn----- ----Rd----- 0 0 0 0 1 S H 1 --Rm--- Halfword Data Transfer: register offset |
31 | Cond 0 0 0 P | U 1 W L |----Rn----- ----Rd----- --Offset- 1 S H 1 -Offset Halfword Data Transfer: immediate offset | 31 | Cond 0 0 0 P | U 1 W L |----Rn----- ----Rd----- --Offset- 1 S H 1 -Offset Halfword Data Transfer: immediate offset |
32 | Cond 0 1 I P | U B W L |----Rn----- ----Rd----- --------Offset----------- Single Data Transfer | 32 | Cond 0 1 I P | U B W L |----Rn----- ----Rd----- --------Offset----------- Single Data Transfer |
33 | Cond 0 1 1 1 | x x x x |x x x x x x x x x x x x x x x 1 x x x x Undefined | 33 | Cond 0 1 1 1 | x x x x |x x x x x x x x x x x x x x x 1 x x x x Undefined |
34 | Cond 1 0 0 P | U S W L |----Rn----- -----------Register List------------- Block Data Transfer | 34 | Cond 1 0 0 P | U S W L |----Rn----- -----------Register List------------- Block Data Transfer |
35 | Cond 1 0 1 L | -------------------------Offset------------------------------ Branch | 35 | Cond 1 0 1 L | -------------------------Offset------------------------------ Branch |
36 | Cond 1 1 0 P | U N W L |----Rn----- ----CRd---- ---CP#--- -----Offset---- Coprocessor Data Transfer | 36 | Cond 1 1 0 P | U N W L |----Rn----- ----CRd---- ---CP#--- -----Offset---- Coprocessor Data Transfer |
37 | Cond 1 1 1 0 | --CP Opc---|----CRn---- ----CRd---- ---CP#--- -CP-- 0 --CRm-- Coprocessor Data Operation | 37 | Cond 1 1 1 0 | --CP Opc---|----CRn---- ----CRd---- ---CP#--- -CP-- 0 --CRm-- Coprocessor Data Operation |
38 | Cond 1 1 1 0 | CP Opc L |----CRn---- ----Rd----- ---CP#--- -CP-- 1 --CRm-- Coprocessor Register Transfer | 38 | Cond 1 1 1 0 | CP Opc L |----CRn---- ----Rd----- ---CP#--- -CP-- 1 --CRm-- Coprocessor Register Transfer |
39 | Cond 1 1 1 1 | x x x x |x x x x x x x x x x x x x x x x x x x x Software Interrupt | 39 | Cond 1 1 1 1 | x x x x |x x x x x x x x x x x x x x x x x x x x Software Interrupt |
40 | 40 | ||
41 | 0x04200000 | 41 | 0x04200000 |
42 | 0001 0 0 0 0 0 1 1 0 6 e 1 1 1 0 1 8 | 42 | 0001 0 0 0 0 0 1 1 0 6 e 1 1 1 0 1 8 |
43 | ================================================================================ | 43 | ================================================================================ |
44 | Cond 0 1 I P | U B W L |----Rn----- ----Rd----- --------Offset----------- Single Data Transfer | 44 | Cond 0 1 I P | U B W L |----Rn----- ----Rd----- --------Offset----------- Single Data Transfer |
45 | 45 | ||
46 | 46 | ||
47 | EQ 0 Z set equal | 47 | EQ 0 Z set equal |
48 | NE 1 Z clear not equal | 48 | NE 1 Z clear not equal |
49 | CS 2 C set unsigned higher or same | 49 | CS 2 C set unsigned higher or same |
50 | CC 3 C clear unsigned lower | 50 | CC 3 C clear unsigned lower |
51 | MI 4 N set negative | 51 | MI 4 N set negative |
52 | PL 5 N clear positive or zero | 52 | PL 5 N clear positive or zero |
53 | VS 6 V set overflow | 53 | VS 6 V set overflow |
54 | VC 7 V clear no overflow | 54 | VC 7 V clear no overflow |
55 | HI 8 C set and Z clear unsigned higher | 55 | HI 8 C set and Z clear unsigned higher |
56 | LS 9 C clear or Z set unsigned lower or same | 56 | LS 9 C clear or Z set unsigned lower or same |
57 | GE A N equals V greater or equal | 57 | GE A N equals V greater or equal |
58 | LT B N not equal to V less than | 58 | LT B N not equal to V less than |
59 | GT C Z clear AND (N equals V) greater than | 59 | GT C Z clear AND (N equals V) greater than |
60 | LE D Z set OR (N not equal to V) less than or equal | 60 | LE D Z set OR (N not equal to V) less than or equal |
61 | AL E (ignored) always | 61 | AL E (ignored) always |
62 | 62 | ||
63 | AND 0 operand1 AND operand2 | 63 | AND 0 operand1 AND operand2 |
64 | EOR 1 operand1 EOR operand2 | 64 | EOR 1 operand1 EOR operand2 |
65 | SUB 2 operand1 - operand2 | 65 | SUB 2 operand1 - operand2 |
66 | RSB 3 operand2 - operand1 | 66 | RSB 3 operand2 - operand1 |
67 | ADD 4 operand1 + operand2 | 67 | ADD 4 operand1 + operand2 |
68 | ADC 5 operand1 + operand2 + carry | 68 | ADC 5 operand1 + operand2 + carry |
69 | SBC 6 operand1 - operand2 + carry - 1 | 69 | SBC 6 operand1 - operand2 + carry - 1 |
70 | RSC 7 operand2 - operand1 + carry - 1 | 70 | RSC 7 operand2 - operand1 + carry - 1 |
71 | TST 8 AND, but result is not written | 71 | TST 8 AND, but result is not written |
72 | TEQ 9 as EOR, but result is not written | 72 | TEQ 9 as EOR, but result is not written |
73 | CMP A as SUB, but result is not written | 73 | CMP A as SUB, but result is not written |
74 | CMN B as ADD, but result is not written | 74 | CMN B as ADD, but result is not written |
75 | ORR C operand1 OR operand2 | 75 | ORR C operand1 OR operand2 |
76 | MOV D operand2 (operand1 is ignored) | 76 | MOV D operand2 (operand1 is ignored) |
77 | BIC E operand1 AND NOT operand2 (Bit clear) | 77 | BIC E operand1 AND NOT operand2 (Bit clear) |
78 | MVN F NOT operand2 (operand1 is ignored) | 78 | MVN F NOT operand2 (operand1 is ignored) |
79 | */ | 79 | */ |
80 | 80 | ||
81 | void multiply_stg(char *stg, ULONG val) | 81 | void multiply_stg(char *stg, ULONG val) |
82 | { | 82 | { |
83 | if((val&0xc00000) == 0) // simple mul | 83 | if((val&0xc00000) == 0) // simple mul |
84 | { | 84 | { |
85 | if(val & 0x100000) // set condition flags | 85 | if(val & 0x100000) // set condition flags |
86 | if(val & 0x200000) sprintf(stg+strlen(stg), "mla%ss ", cond[val>>28]); | 86 | if(val & 0x200000) sprintf(stg+strlen(stg), "mla%ss ", cond[val>>28]); |
87 | else sprintf(stg+strlen(stg), "mul%ss ", cond[val>>28]); | 87 | else sprintf(stg+strlen(stg), "mul%ss ", cond[val>>28]); |
88 | else | 88 | else |
89 | if(val & 0x200000) sprintf(stg+strlen(stg), "mla%s ", cnd1[val>>28]); | 89 | if(val & 0x200000) sprintf(stg+strlen(stg), "mla%s ", cnd1[val>>28]); |
90 | else sprintf(stg+strlen(stg), "mul%s ", cnd1[val>>28]); | 90 | else sprintf(stg+strlen(stg), "mul%s ", cnd1[val>>28]); |
91 | 91 | ||
92 | if(val & 0x200000) // accumulate | 92 | if(val & 0x200000) // accumulate |
93 | sprintf(stg+strlen(stg), "%s, %s, %s, %s", regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15], regs[(val>>12)&15]); | 93 | sprintf(stg+strlen(stg), "%s, %s, %s, %s", regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15], regs[(val>>12)&15]); |
94 | else | 94 | else |
95 | sprintf(stg+strlen(stg), "%s, %s, %s", regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15]); | 95 | sprintf(stg+strlen(stg), "%s, %s, %s", regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15]); |
96 | } | 96 | } |
97 | else | 97 | else |
98 | { | 98 | { |
99 | if(val & 0x100000) // set condition flags | 99 | if(val & 0x100000) // set condition flags |
100 | if(val & 0x200000) // accumulate | 100 | if(val & 0x200000) // accumulate |
101 | if(val & 0x400000) sprintf(stg+strlen(stg), "smlal%ss ", cond[val>>28]); | 101 | if(val & 0x400000) sprintf(stg+strlen(stg), "smlal%ss ", cond[val>>28]); |
102 | else sprintf(stg+strlen(stg), "umlal%ss ", cond[val>>28]); | 102 | else sprintf(stg+strlen(stg), "umlal%ss ", cond[val>>28]); |
103 | else | 103 | else |
104 | if(val & 0x400000) sprintf(stg+strlen(stg), "smull%ss ", cond[val>>28]); | 104 | if(val & 0x400000) sprintf(stg+strlen(stg), "smull%ss ", cond[val>>28]); |
105 | else sprintf(stg+strlen(stg), "umull%ss ", cond[val>>28]); | 105 | else sprintf(stg+strlen(stg), "umull%ss ", cond[val>>28]); |
106 | else | 106 | else |
107 | if(val & 0x200000) | 107 | if(val & 0x200000) |
108 | if(val & 0x400000) sprintf(stg+strlen(stg), "smlal%s ", cond[val>>28]); | 108 | if(val & 0x400000) sprintf(stg+strlen(stg), "smlal%s ", cond[val>>28]); |
109 | else sprintf(stg+strlen(stg), "umlal%s ", cond[val>>28]); | 109 | else sprintf(stg+strlen(stg), "umlal%s ", cond[val>>28]); |
110 | else | 110 | else |
111 | if(val & 0x400000) sprintf(stg+strlen(stg), "smull%s ", cond[val>>28]); | 111 | if(val & 0x400000) sprintf(stg+strlen(stg), "smull%s ", cond[val>>28]); |
112 | else sprintf(stg+strlen(stg), "umull%s ", cond[val>>28]); | 112 | else sprintf(stg+strlen(stg), "umull%s ", cond[val>>28]); |
113 | 113 | ||
114 | sprintf(stg+strlen(stg), "%s, %s, %s, %s", regs[(val>>12)&15], regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15]); | 114 | sprintf(stg+strlen(stg), "%s, %s, %s, %s", regs[(val>>12)&15], regs[(val>>16)&15], regs[(val>>0)&15], regs[(val>>8)&15]); |
115 | } | 115 | } |
116 | } | 116 | } |
117 | 117 | ||
118 | void halfword_stg(char *stg, ULONG val) | 118 | void halfword_stg(char *stg, ULONG val) |
119 | { | 119 | { |
120 | ULONG off = ((val>>4) & 0xf0) + (val & 0x0f); | 120 | ULONG off = ((val>>4) & 0xf0) + (val & 0x0f); |
121 | 121 | ||
122 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s", cond[val>>28]); | 122 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s", cond[val>>28]); |
123 | else sprintf(stg+strlen(stg), "str%s", cond[val>>28]); | 123 | else sprintf(stg+strlen(stg), "str%s", cond[val>>28]); |
124 | 124 | ||
125 | switch((val>>5) & 3) // SWP, HW, SB, SH | 125 | switch((val>>5) & 3) // SWP, HW, SB, SH |
126 | { | 126 | { |
127 | case 0: sprintf(stg+strlen(stg), "error: SWP"); break; | 127 | case 0: sprintf(stg+strlen(stg), "error: SWP"); break; |
128 | case 1: sprintf(stg+strlen(stg), "h "); break; | 128 | case 1: sprintf(stg+strlen(stg), "h "); break; |
129 | case 2: sprintf(stg+strlen(stg), "sb "); break; | 129 | case 2: sprintf(stg+strlen(stg), "sb "); break; |
130 | case 3: sprintf(stg+strlen(stg), "sh "); break; | 130 | case 3: sprintf(stg+strlen(stg), "sh "); break; |
131 | } | 131 | } |
132 | 132 | ||
133 | if(val & 0x400000) // immidiate offset | 133 | if(val & 0x400000) // immidiate offset |
134 | if(val & 0x1000000) // pre index | 134 | if(val & 0x1000000) // pre index |
135 | if(val & 0x200000) // write back | 135 | if(val & 0x200000) // write back |
136 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], off); | 136 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], off); |
137 | else sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], off); | 137 | else sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], off); |
138 | else | 138 | else |
139 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], off); | 139 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], off); |
140 | else sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], off); | 140 | else sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], off); |
141 | else | 141 | else |
142 | if(val & 0x200000) // write back | 142 | if(val & 0x200000) // write back |
143 | sprintf(stg+strlen(stg), "error 'write back' on post indexed"); | 143 | sprintf(stg+strlen(stg), "error 'write back' on post indexed"); |
144 | else | 144 | else |
145 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s], "FRMT, regs[(val>>12)&15], regs[(val>>16)&15], off); | 145 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s], "FRMT, regs[(val>>12)&15], regs[(val>>16)&15], off); |
146 | else sprintf(stg+strlen(stg), "%s, [%s], -"FRMT, regs[(val>>12)&15], regs[(val>>16)&15], off); | 146 | else sprintf(stg+strlen(stg), "%s, [%s], -"FRMT, regs[(val>>12)&15], regs[(val>>16)&15], off); |
147 | else | 147 | else |
148 | if(val & 0x1000000) // pre index | 148 | if(val & 0x1000000) // pre index |
149 | if(val & 0x200000) // write back | 149 | if(val & 0x200000) // write back |
150 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, %s]!", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 150 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, %s]!", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
151 | else sprintf(stg+strlen(stg), "%s, [%s, -%s]!", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 151 | else sprintf(stg+strlen(stg), "%s, [%s, -%s]!", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
152 | else | 152 | else |
153 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, %s]", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 153 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s, %s]", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
154 | else sprintf(stg+strlen(stg), "%s, [%s, -%s]", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 154 | else sprintf(stg+strlen(stg), "%s, [%s, -%s]", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
155 | else | 155 | else |
156 | if(val & 0x200000) // write back | 156 | if(val & 0x200000) // write back |
157 | sprintf(stg+strlen(stg), "error 'write back' on post indexed"); | 157 | sprintf(stg+strlen(stg), "error 'write back' on post indexed"); |
158 | else | 158 | else |
159 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s], %s", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 159 | if(val & 0x800000) sprintf(stg+strlen(stg), "%s, [%s], %s", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
160 | else sprintf(stg+strlen(stg), "%s, [%s], -%s", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); | 160 | else sprintf(stg+strlen(stg), "%s, [%s], -%s", regs[(val>>12)&15], regs[(val>>16)&15], regs[val&15]); |
161 | } | 161 | } |
162 | 162 | ||
163 | void branch_stg(char *stg, ULONG val, ULONG pos) | 163 | void branch_stg(char *stg, ULONG val, ULONG pos) |
164 | { | 164 | { |
165 | ULONG off = pos + (((int32_t)val << 8) >> 6) + 8; | 165 | ULONG off = pos + (((int32_t)val << 8) >> 6) + 8; |
166 | 166 | ||
167 | if((val & 0x0ffffff0) == 0x012fff10) // bx instruction | 167 | if((val & 0x0ffffff0) == 0x012fff10) // bx instruction |
168 | { sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); } | 168 | { sprintf(stg+strlen(stg), "bx%s %s", cond[val>>28], regs[val&15]); } |
169 | else | 169 | else |
170 | { | 170 | { |
171 | if(((val>>24)&15) == 10) sprintf(stg+strlen(stg), "b%s ", cond[val>>28]); | 171 | if(((val>>24)&15) == 10) sprintf(stg+strlen(stg), "b%s ", cond[val>>28]); |
172 | else sprintf(stg+strlen(stg), "bl%s ", cond[val>>28]); | 172 | else sprintf(stg+strlen(stg), "bl%s ", cond[val>>28]); |
173 | 173 | ||
174 | sprintf(stg+strlen(stg), "0x%x", off); | 174 | sprintf(stg+strlen(stg), "0x%x", off); |
175 | } | 175 | } |
176 | } | 176 | } |
177 | 177 | ||
178 | void opcode_stg(char *stg, ULONG val, ULONG off) | 178 | void opcode_stg(char *stg, ULONG val, ULONG off) |
179 | { | 179 | { |
180 | ULONG des, op1; | 180 | ULONG des, op1; |
181 | char op2[80]; | 181 | char op2[80]; |
182 | char *st = stg + strlen(stg); | 182 | char *st = stg + strlen(stg); |
183 | 183 | ||
184 | if(((val & 0x0ffffff0) == 0x012fff10) && (val & 16)) | 184 | if(((val & 0x0ffffff0) == 0x012fff10) && (val & 16)) |
185 | { branch_stg(stg, val, off); return; } | 185 | { branch_stg(stg, val, off); return; } |
186 | else if(((val & 0x0f000000) == 0x00000000) && ((val & 0xf0) == 0x90)) | 186 | else if(((val & 0x0f000000) == 0x00000000) && ((val & 0xf0) == 0x90)) |
187 | { multiply_stg(stg, val); return; } | 187 | { multiply_stg(stg, val); return; } |
188 | else if(((val & 0x0f000000) <= 0x01000000) && ((val & 0x90) == 0x90) && ((val & 0xf0) > 0x90) && ((val & 0x01200000) != 0x00200000)) | 188 | else if(((val & 0x0f000000) <= 0x01000000) && ((val & 0x90) == 0x90) && ((val & 0xf0) > 0x90) && ((val & 0x01200000) != 0x00200000)) |
189 | { halfword_stg(stg, val); return; } | 189 | { halfword_stg(stg, val); return; } |
190 | 190 | ||
191 | sprintf(stg+strlen(stg), "%s%s%s ", opcd[(val>>21) & 15], cond[val>>28], setc[(val>>20) & 31]?"s":" "); | 191 | sprintf(stg+strlen(stg), "%s%s%s ", opcd[(val>>21) & 15], cond[val>>28], setc[(val>>20) & 31]?"s":" "); |
192 | 192 | ||
193 | des = (val>>12) & 15; | 193 | des = (val>>12) & 15; |
194 | op1 = (val>>16) & 15; | 194 | op1 = (val>>16) & 15; |
195 | 195 | ||
196 | if(val & 0x2000000) // immidiate | 196 | if(val & 0x2000000) // immidiate |
197 | { | 197 | { |
198 | off = (ULONG)((uint64_t)(val&0xff) << (32 - 2 * ((val >> 8) & 15))) | ((val&0xff) >> 2 * ((val >> 8) & 15)); | 198 | off = (ULONG)((uint64_t)(val&0xff) << (32 - 2 * ((val >> 8) & 15))) | ((val&0xff) >> 2 * ((val >> 8) & 15)); |
199 | sprintf(op2, FRMT" ", off); | 199 | sprintf(op2, FRMT" ", off); |
200 | } | 200 | } |
201 | else | 201 | else |
202 | { | 202 | { |
203 | if(val & 16) // shift type | 203 | if(val & 16) // shift type |
204 | sprintf(op2, SHFTFRMR, regs[val&15], shfts[(val>>5)&3], regs[(val>>8)&15]); | 204 | sprintf(op2, SHFTFRMR, regs[val&15], shfts[(val>>5)&3], regs[(val>>8)&15]); |
205 | else | 205 | else |
206 | if((val>>7) & 31) | 206 | if((val>>7) & 31) |
207 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); | 207 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); |
208 | else | 208 | else |
209 | sprintf(op2, "%s ", regs[val&15]); | 209 | sprintf(op2, "%s ", regs[val&15]); |
210 | } | 210 | } |
211 | 211 | ||
212 | switch((val>>21) & 15) | 212 | switch((val>>21) & 15) |
213 | { | 213 | { |
214 | case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 12: | 214 | case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: case 12: |
215 | case 14: sprintf(stg+strlen(stg), "%s, %s, %s", regs[des], regs[op1], op2); break; | 215 | case 14: sprintf(stg+strlen(stg), "%s, %s, %s", regs[des], regs[op1], op2); break; |
216 | 216 | ||
217 | case 8: case 9: case 10: | 217 | case 8: case 9: case 10: |
218 | case 11: if(val & 0x100000) // set status | 218 | case 11: if(val & 0x100000) // set status |
219 | sprintf(stg+strlen(stg), "%s, %s", regs[op1], op2); // standard TEQ,TST,CMP,CMN | 219 | sprintf(stg+strlen(stg), "%s, %s", regs[op1], op2); // standard TEQ,TST,CMP,CMN |
220 | else | 220 | else |
221 | { //special MRS/MSR opcodes | 221 | { //special MRS/MSR opcodes |
222 | if((((val>>23) & 31) == 2) && ((val & 0x3f0fff) == 0x0f0000)) | 222 | if((((val>>23) & 31) == 2) && ((val & 0x3f0fff) == 0x0f0000)) |
223 | { sprintf(st, "mrs%s %s, %s", cnd1[val>>28], regs[des], val&0x400000?"SPSR_xx":"CPSR"); } | 223 | { sprintf(st, "mrs%s %s, %s", cnd1[val>>28], regs[des], val&0x400000?"SPSR_xx":"CPSR"); } |
224 | else | 224 | else |
225 | if((((val>>23) & 31) == 2) && ((val & 0x30fff0) == 0x20f000)) | 225 | if((((val>>23) & 31) == 2) && ((val & 0x30fff0) == 0x20f000)) |
226 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); } | 226 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR", regs[val&15]); } |
227 | else | 227 | else |
228 | if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000)) | 228 | if((((val>>23) & 31) == 6) && ((val & 0x30f000) == 0x20f000)) |
229 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); } | 229 | { sprintf(st, "msr%s %s, %s", cnd1[val>>28], val&0x400000?"SPSR_xx":"CPSR_cf", op2); } |
230 | else | 230 | else |
231 | if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090)) | 231 | if((((val>>23) & 31) == 2) && ((val & 0x300ff0) == 0x000090)) |
232 | { sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); } | 232 | { sprintf(st, "swp%s%s %s, %s, [%s]", val&0x400000?"b":"", cnd1[val>>28], regs[(val>>12)&15], regs[val&15], regs[(val>>16)&15]); } |
233 | else | 233 | else |
234 | { sprintf(stg+strlen(stg), "??????????????"); } | 234 | { sprintf(stg+strlen(stg), "??????????????"); } |
235 | } break; | 235 | } break; |
236 | case 13: | 236 | case 13: |
237 | case 15: sprintf(stg+strlen(stg), "%s, %s", regs[des], op2); break; | 237 | case 15: sprintf(stg+strlen(stg), "%s, %s", regs[des], op2); break; |
238 | } | 238 | } |
239 | } | 239 | } |
240 | 240 | ||
241 | void opcode_cop(char *stg, ULONG val, ULONG off) | 241 | void opcode_cop(char *stg, ULONG val, ULONG off) |
242 | { | 242 | { |
243 | char* op; | 243 | char* op; |
244 | int opcode1 = (val >> 21) & 0x7; | 244 | int opcode1 = (val >> 21) & 0x7; |
245 | int CRn = (val >> 16) & 0xf; | 245 | int CRn = (val >> 16) & 0xf; |
246 | int Rd = (val >> 12) & 0xf; | 246 | int Rd = (val >> 12) & 0xf; |
247 | int cp_num = (val >> 8) & 0xf; | 247 | int cp_num = (val >> 8) & 0xf; |
248 | int opcode2 = (val >> 5) & 0x7; | 248 | int opcode2 = (val >> 5) & 0x7; |
249 | int CRm = val & 0xf; | 249 | int CRm = val & 0xf; |
250 | 250 | ||
251 | 251 | ||
252 | // ee073f5e mcr 15, 0, r3, cr7, cr14, {2} | 252 | // ee073f5e mcr 15, 0, r3, cr7, cr14, {2} |
253 | 253 | ||
254 | if (val & (1<<4)) { | 254 | if (val & (1<<4)) { |
255 | if (val & (1<<20)) { | 255 | if (val & (1<<20)) { |
256 | op = "mrc"; | 256 | op = "mrc"; |
257 | } else { | 257 | } else { |
258 | op = "mcr"; | 258 | op = "mcr"; |
259 | } | 259 | } |
260 | opcode1 = (val >> 21) & 0x7; | 260 | opcode1 = (val >> 21) & 0x7; |
261 | CRn = (val >> 16) & 0xf; | 261 | CRn = (val >> 16) & 0xf; |
262 | Rd = (val >> 12) & 0xf; | 262 | Rd = (val >> 12) & 0xf; |
263 | cp_num = (val >> 8) & 0xf; | 263 | cp_num = (val >> 8) & 0xf; |
264 | opcode2 = (val >> 5) & 0x7; | 264 | opcode2 = (val >> 5) & 0x7; |
265 | CRm = val & 0xf; | 265 | CRm = val & 0xf; |
266 | 266 | ||
267 | sprintf(stg+strlen(stg), "%s%s %d, %d, r%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); | 267 | sprintf(stg+strlen(stg), "%s%s %d, %d, r%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); |
268 | } else { | 268 | } else { |
269 | op = "cdp"; | 269 | op = "cdp"; |
270 | 270 | ||
271 | opcode1 = (val >> 20) & 0xf; | 271 | opcode1 = (val >> 20) & 0xf; |
272 | CRn = (val >> 16) & 0xf; | 272 | CRn = (val >> 16) & 0xf; |
273 | Rd = (val >> 12) & 0xf; | 273 | Rd = (val >> 12) & 0xf; |
274 | cp_num = (val >> 8) & 0xf; | 274 | cp_num = (val >> 8) & 0xf; |
275 | opcode2 = (val >> 5) & 0x7; | 275 | opcode2 = (val >> 5) & 0x7; |
276 | CRm = val & 0xf; | 276 | CRm = val & 0xf; |
277 | 277 | ||
278 | sprintf(stg+strlen(stg), "%s%s %d, %d, cr%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); | 278 | sprintf(stg+strlen(stg), "%s%s %d, %d, cr%d, cr%d, cr%d, {%d}", op, cnd1[val>>28], cp_num, opcode1, Rd, CRn, CRm, opcode2); |
279 | } | 279 | } |
280 | 280 | ||
281 | } | 281 | } |
282 | 282 | ||
283 | 283 | ||
284 | void single_data(char *stg, ULONG val) | 284 | void single_data(char *stg, ULONG val) |
285 | { | 285 | { |
286 | char op2[80]; | 286 | char op2[80]; |
287 | 287 | ||
288 | if(((val & 0x0e000000) == 0x06000000) && (val & 16)) | 288 | if(((val & 0x0e000000) == 0x06000000) && (val & 16)) |
289 | { sprintf(stg+strlen(stg), "undef%s", cond[val>>28]); | 289 | { sprintf(stg+strlen(stg), "undef%s", cond[val>>28]); |
290 | return; | 290 | return; |
291 | } | 291 | } |
292 | 292 | ||
293 | if(val & 0x400000) | 293 | if(val & 0x400000) |
294 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%sb ", cond[val>>28]); | 294 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%sb ", cond[val>>28]); |
295 | else sprintf(stg+strlen(stg), "str%sb ", cond[val>>28]); | 295 | else sprintf(stg+strlen(stg), "str%sb ", cond[val>>28]); |
296 | else | 296 | else |
297 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]); | 297 | if(val & 0x100000) sprintf(stg+strlen(stg), "ldr%s ", cnd1[val>>28]); |
298 | else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]); | 298 | else sprintf(stg+strlen(stg), "str%s ", cnd1[val>>28]); |
299 | 299 | ||
300 | if(val & 0x2000000) {// reg offset | 300 | if(val & 0x2000000) {// reg offset |
301 | if(val & 16) // shift type | 301 | if(val & 16) // shift type |
302 | sprintf(op2, "error: reg defined shift"); | 302 | sprintf(op2, "error: reg defined shift"); |
303 | else | 303 | else |
304 | if((val>>7) & 31) | 304 | if((val>>7) & 31) |
305 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); | 305 | sprintf(op2, SHFTFRMC, regs[val&15], shfts[(val>>5)&3], (val>>7) & 31); |
306 | else | 306 | else |
307 | sprintf(op2, "%s", regs[val&15]); | 307 | sprintf(op2, "%s", regs[val&15]); |
308 | } | 308 | } |
309 | 309 | ||
310 | if(val & 0x2000000) // reg offset | 310 | if(val & 0x2000000) // reg offset |
311 | if(val & 0x1000000) // pre index | 311 | if(val & 0x1000000) // pre index |
312 | if(val & 0x800000) // up offset (+) | 312 | if(val & 0x800000) // up offset (+) |
313 | if(val & 0x200000) // write back | 313 | if(val & 0x200000) // write back |
314 | sprintf(stg+strlen(stg), "%s, [%s, %s]!", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 314 | sprintf(stg+strlen(stg), "%s, [%s, %s]!", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
315 | else | 315 | else |
316 | sprintf(stg+strlen(stg), "%s, [%s, %s]", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 316 | sprintf(stg+strlen(stg), "%s, [%s, %s]", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
317 | else | 317 | else |
318 | if(val & 0x200000) // write back | 318 | if(val & 0x200000) // write back |
319 | sprintf(stg+strlen(stg), "%s, [%s, -%s]!", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 319 | sprintf(stg+strlen(stg), "%s, [%s, -%s]!", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
320 | else | 320 | else |
321 | sprintf(stg+strlen(stg), "%s, [%s, -%s]", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 321 | sprintf(stg+strlen(stg), "%s, [%s, -%s]", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
322 | else | 322 | else |
323 | if(val & 0x200000) // write back | 323 | if(val & 0x200000) // write back |
324 | sprintf(stg+strlen(stg), "error 'write back' set"); | 324 | sprintf(stg+strlen(stg), "error 'write back' set"); |
325 | else | 325 | else |
326 | if(val & 0x800000) // up offset (+) | 326 | if(val & 0x800000) // up offset (+) |
327 | sprintf(stg+strlen(stg), "%s, [%s], %s", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 327 | sprintf(stg+strlen(stg), "%s, [%s], %s", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
328 | else | 328 | else |
329 | sprintf(stg+strlen(stg), "%s, [%s], -%s", regs[(val>>12)&15], regs[(val>>16)&15], op2); | 329 | sprintf(stg+strlen(stg), "%s, [%s], -%s", regs[(val>>12)&15], regs[(val>>16)&15], op2); |
330 | else | 330 | else |
331 | if(val & 0x1000000) // pre index | 331 | if(val & 0x1000000) // pre index |
332 | if(val & 0x800000) // up offset (+) | 332 | if(val & 0x800000) // up offset (+) |
333 | if(val & 0x200000) // write back | 333 | if(val & 0x200000) // write back |
334 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 334 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
335 | else sprintf(stg+strlen(stg), "%s, [%s]!", regs[(val>>12)&15], regs[(val>>16)&15]); | 335 | else sprintf(stg+strlen(stg), "%s, [%s]!", regs[(val>>12)&15], regs[(val>>16)&15]); |
336 | else | 336 | else |
337 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 337 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, "FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
338 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); | 338 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); |
339 | else | 339 | else |
340 | if(val & 0x200000) // write back | 340 | if(val & 0x200000) // write back |
341 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 341 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]!", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
342 | else sprintf(stg+strlen(stg), "%s, [%s]!", regs[(val>>12)&15], regs[(val>>16)&15]); | 342 | else sprintf(stg+strlen(stg), "%s, [%s]!", regs[(val>>12)&15], regs[(val>>16)&15]); |
343 | else | 343 | else |
344 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 344 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s, -"FRMT"]", regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
345 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); | 345 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); |
346 | else | 346 | else |
347 | if(val & 0x200000) // write back | 347 | if(val & 0x200000) // write back |
348 | sprintf(stg+strlen(stg), "error 'write back' set"); | 348 | sprintf(stg+strlen(stg), "error 'write back' set"); |
349 | else | 349 | else |
350 | if(val & 0x800000) // up offset (+) | 350 | if(val & 0x800000) // up offset (+) |
351 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s], "FRMT, regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 351 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s], "FRMT, regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
352 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); | 352 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); |
353 | else | 353 | else |
354 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s], -"FRMT, regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); | 354 | if(val & 0xfff) sprintf(stg+strlen(stg), "%s, [%s], -"FRMT, regs[(val>>12)&15], regs[(val>>16)&15], val & 0xfff); |
355 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); | 355 | else sprintf(stg+strlen(stg), "%s, [%s]", regs[(val>>12)&15], regs[(val>>16)&15]); |
356 | } | 356 | } |
357 | 357 | ||
358 | void block_data(char *stg, ULONG val) | 358 | void block_data(char *stg, ULONG val) |
359 | { | 359 | { |
360 | char lst[80]; | 360 | char lst[80]; |
361 | int i; | 361 | int i; |
362 | 362 | ||
363 | strcpy(lst, "{"); | 363 | strcpy(lst, "{"); |
364 | for(i=0; i<16; i++) | 364 | for(i=0; i<16; i++) |
365 | if(val & (1<<i)) | 365 | if(val & (1<<i)) |
366 | sprintf(lst+strlen(lst), "%s, ", regs[i]); | 366 | sprintf(lst+strlen(lst), "%s, ", regs[i]); |
367 | if(strlen(lst)>2) | 367 | if(strlen(lst)>2) |
368 | strcpy(lst+strlen(lst)-2, "}"); | 368 | strcpy(lst+strlen(lst)-2, "}"); |
369 | else | 369 | else |
370 | strcpy(lst+strlen(lst), "}"); | 370 | strcpy(lst+strlen(lst), "}"); |
371 | 371 | ||
372 | if(val & 0x400000) // load psr or force user mode | 372 | if(val & 0x400000) // load psr or force user mode |
373 | strcpy(lst+strlen(lst), "^"); | 373 | strcpy(lst+strlen(lst), "^"); |
374 | 374 | ||
375 | 375 | ||
376 | if(val & 0x100000) // load | 376 | if(val & 0x100000) // load |
377 | if(val & 0x1000000) // pre offset | 377 | if(val & 0x1000000) // pre offset |
378 | if(val & 0x800000) sprintf(stg+strlen(stg), "ldm%sib ", cond[val>>28]); | 378 | if(val & 0x800000) sprintf(stg+strlen(stg), "ldm%sib ", cond[val>>28]); |
379 | else sprintf(stg+strlen(stg), "ldm%sdb ", cond[val>>28]); | 379 | else sprintf(stg+strlen(stg), "ldm%sdb ", cond[val>>28]); |
380 | else | 380 | else |
381 | if(val & 0x800000) sprintf(stg+strlen(stg), "ldm%sia ", cond[val>>28]); | 381 | if(val & 0x800000) sprintf(stg+strlen(stg), "ldm%sia ", cond[val>>28]); |
382 | else sprintf(stg+strlen(stg), "ldm%sda ", cond[val>>28]); | 382 | else sprintf(stg+strlen(stg), "ldm%sda ", cond[val>>28]); |
383 | else | 383 | else |
384 | if(val & 0x1000000) | 384 | if(val & 0x1000000) |
385 | if(val & 0x800000) sprintf(stg+strlen(stg), "stm%sib ", cond[val>>28]); | 385 | if(val & 0x800000) sprintf(stg+strlen(stg), "stm%sib ", cond[val>>28]); |
386 | else sprintf(stg+strlen(stg), "stm%sdb ", cond[val>>28]); | 386 | else sprintf(stg+strlen(stg), "stm%sdb ", cond[val>>28]); |
387 | else | 387 | else |
388 | if(val & 0x800000) sprintf(stg+strlen(stg), "stm%sia ", cond[val>>28]); | 388 | if(val & 0x800000) sprintf(stg+strlen(stg), "stm%sia ", cond[val>>28]); |
389 | else sprintf(stg+strlen(stg), "stm%sda ", cond[val>>28]); | 389 | else sprintf(stg+strlen(stg), "stm%sda ", cond[val>>28]); |
390 | 390 | ||
391 | switch((val>>21)&3) | 391 | switch((val>>21)&3) |
392 | { | 392 | { |
393 | case 0: sprintf(stg+strlen(stg), "%s, %s", regs[(val>>16)&15], lst); break; | 393 | case 0: sprintf(stg+strlen(stg), "%s, %s", regs[(val>>16)&15], lst); break; |
394 | case 1: sprintf(stg+strlen(stg), "%s!, %s", regs[(val>>16)&15], lst); break; | 394 | case 1: sprintf(stg+strlen(stg), "%s!, %s", regs[(val>>16)&15], lst); break; |
395 | case 2: sprintf(stg+strlen(stg), "%s, %s", regs[(val>>16)&15], lst); break; | 395 | case 2: sprintf(stg+strlen(stg), "%s, %s", regs[(val>>16)&15], lst); break; |
396 | case 3: sprintf(stg+strlen(stg), "%s!, %s", regs[(val>>16)&15], lst); break; | 396 | case 3: sprintf(stg+strlen(stg), "%s!, %s", regs[(val>>16)&15], lst); break; |
397 | } | 397 | } |
398 | } | 398 | } |
399 | 399 | ||
400 | void dis_asm(ULONG off, ULONG val, char *stg) | 400 | void dis_asm(ULONG off, ULONG val, char *stg) |
401 | { | 401 | { |
402 | sprintf(stg, "%6x: %08x ", off, val); | 402 | sprintf(stg, "%6x: %08x ", off, val); |
403 | 403 | ||
404 | switch((val >> 24) & 15) | 404 | switch((val >> 24) & 15) |
405 | { | 405 | { |
406 | case 0: | 406 | case 0: |
407 | case 1: | 407 | case 1: |
408 | case 2: | 408 | case 2: |
409 | case 3: opcode_stg(stg, val, off); break; | 409 | case 3: opcode_stg(stg, val, off); break; |
410 | case 4: | 410 | case 4: |
411 | case 5: | 411 | case 5: |
412 | case 6: | 412 | case 6: |
413 | case 7: single_data(stg, val); break; | 413 | case 7: single_data(stg, val); break; |
414 | case 8: | 414 | case 8: |
415 | case 9: block_data(stg, val); break; | 415 | case 9: block_data(stg, val); break; |
416 | case 10: | 416 | case 10: |
417 | case 11: branch_stg(stg, val, off); break; | 417 | case 11: branch_stg(stg, val, off); break; |
418 | case 12: | 418 | case 12: |
419 | case 13: sprintf(stg+strlen(stg), "cop%s", cnd1[val>>28]); break; | 419 | case 13: sprintf(stg+strlen(stg), "cop%s", cnd1[val>>28]); break; |
420 | case 14: opcode_cop(stg, val, off); break; | 420 | case 14: opcode_cop(stg, val, off); break; |
421 | case 15: sprintf(stg+strlen(stg), "swi%s", cnd1[val>>28]); break; | 421 | case 15: sprintf(stg+strlen(stg), "swi%s", cnd1[val>>28]); break; |
422 | } | 422 | } |
423 | } | 423 | } |
diff --git a/utils/disassembler/arm/main.c b/utils/disassembler/arm/main.c index 0edc633785..674696405c 100644 --- a/utils/disassembler/arm/main.c +++ b/utils/disassembler/arm/main.c | |||
@@ -1,132 +1,132 @@ | |||
1 | #include <stdio.h> | 1 | #include <stdio.h> |
2 | #include <string.h> | 2 | #include <string.h> |
3 | #include <stdlib.h> | 3 | #include <stdlib.h> |
4 | #include <stdint.h> | 4 | #include <stdint.h> |
5 | 5 | ||
6 | #define ULONG uint32_t | 6 | #define ULONG uint32_t |
7 | #define USHORT uint16_t | 7 | #define USHORT uint16_t |
8 | #define UCHAR uint8_t | 8 | #define UCHAR uint8_t |
9 | 9 | ||
10 | ULONG isdata[1000000]; /* each bit defines one byte as: code=0, data=1 */ | 10 | ULONG isdata[1000000]; /* each bit defines one byte as: code=0, data=1 */ |
11 | 11 | ||
12 | extern void dis_asm(ULONG off, ULONG val, char *stg); | 12 | extern void dis_asm(ULONG off, ULONG val, char *stg); |
13 | 13 | ||
14 | int static inline le2int(unsigned char* buf) | 14 | int static inline le2int(unsigned char* buf) |
15 | { | 15 | { |
16 | int32_t res = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; | 16 | int32_t res = (buf[3] << 24) | (buf[2] << 16) | (buf[1] << 8) | buf[0]; |
17 | 17 | ||
18 | return res; | 18 | return res; |
19 | } | 19 | } |
20 | 20 | ||
21 | int main(int argc, char **argv) | 21 | int main(int argc, char **argv) |
22 | { | 22 | { |
23 | FILE *in, *out; | 23 | FILE *in, *out; |
24 | char *ptr, stg[256]; | 24 | char *ptr, stg[256]; |
25 | unsigned char buf[4]; | 25 | unsigned char buf[4]; |
26 | ULONG pos, sz, val, loop; | 26 | ULONG pos, sz, val, loop; |
27 | int offset, offset1; | 27 | int offset, offset1; |
28 | USHORT regid; | 28 | USHORT regid; |
29 | 29 | ||
30 | if(argc == 1 || strcmp(argv[1], "--help") == 0) | 30 | if(argc == 1 || strcmp(argv[1], "--help") == 0) |
31 | { printf("Usage: arm_disass [input file]\n"); | 31 | { printf("Usage: arm_disass [input file]\n"); |
32 | printf(" disassembles input file to 'disasm.txt'\n"); | 32 | printf(" disassembles input file to 'disasm.txt'\n"); |
33 | exit(-1); | 33 | exit(-1); |
34 | } | 34 | } |
35 | 35 | ||
36 | in = fopen(argv[1], "rb"); | 36 | in = fopen(argv[1], "rb"); |
37 | if(in == NULL) | 37 | if(in == NULL) |
38 | { printf("Cannot open %s", argv[1]); | 38 | { printf("Cannot open %s", argv[1]); |
39 | exit(-1); | 39 | exit(-1); |
40 | } | 40 | } |
41 | 41 | ||
42 | out = fopen("disasm.txt", "w"); | 42 | out = fopen("disasm.txt", "w"); |
43 | if(out == NULL) exit(-1); | 43 | if(out == NULL) exit(-1); |
44 | 44 | ||
45 | fseek(in, 0, SEEK_END); | 45 | fseek(in, 0, SEEK_END); |
46 | sz = ftell(in); | 46 | sz = ftell(in); |
47 | 47 | ||
48 | /* first loop only sets data/code tags */ | 48 | /* first loop only sets data/code tags */ |
49 | for(loop=0; loop<2; loop++) | 49 | for(loop=0; loop<2; loop++) |
50 | { | 50 | { |
51 | for(pos=0; pos<sz; pos+=4) | 51 | for(pos=0; pos<sz; pos+=4) |
52 | { | 52 | { |
53 | /* clear disassembler string start */ | 53 | /* clear disassembler string start */ |
54 | memset(stg, 0, 40); | 54 | memset(stg, 0, 40); |
55 | /* read next code dword */ | 55 | /* read next code dword */ |
56 | fseek(in, pos, SEEK_SET); | 56 | fseek(in, pos, SEEK_SET); |
57 | fread(buf, 1, 4, in); | 57 | fread(buf, 1, 4, in); |
58 | 58 | ||
59 | val = le2int(buf); | 59 | val = le2int(buf); |
60 | 60 | ||
61 | /* check for data tag set: if 1 byte out of 4 is marked => assume data */ | 61 | /* check for data tag set: if 1 byte out of 4 is marked => assume data */ |
62 | if((isdata[pos>>5] & (0xf << (pos & 31))) || (val & 0xffff0000) == 0) | 62 | if((isdata[pos>>5] & (0xf << (pos & 31))) || (val & 0xffff0000) == 0) |
63 | { | 63 | { |
64 | sprintf(stg, "%6x: %08x", pos, val); | 64 | sprintf(stg, "%6x: %08x", pos, val); |
65 | } | 65 | } |
66 | else | 66 | else |
67 | { | 67 | { |
68 | dis_asm(pos, val, stg); | 68 | dis_asm(pos, val, stg); |
69 | 69 | ||
70 | /* check for instant mov operation */ | 70 | /* check for instant mov operation */ |
71 | if(memcmp(stg+17, "mov ", 4) == 0 && (ptr=strstr(stg, "0x")) != NULL) | 71 | if(memcmp(stg+17, "mov ", 4) == 0 && (ptr=strstr(stg, "0x")) != NULL) |
72 | { | 72 | { |
73 | regid = *(USHORT*)(stg+22); | 73 | regid = *(USHORT*)(stg+22); |
74 | 74 | ||
75 | sscanf(ptr+2, "%x", &offset); | 75 | sscanf(ptr+2, "%x", &offset); |
76 | if(ptr[-1] == '-') | 76 | if(ptr[-1] == '-') |
77 | offset = -offset; | 77 | offset = -offset; |
78 | } | 78 | } |
79 | else | 79 | else |
80 | /* check for add/sub operation */ | 80 | /* check for add/sub operation */ |
81 | if((ptr=strstr(stg, "0x")) != NULL | 81 | if((ptr=strstr(stg, "0x")) != NULL |
82 | && (memcmp(stg+17, "add ", 4) == 0 || memcmp(stg+17, "sub ", 4) == 0)) | 82 | && (memcmp(stg+17, "add ", 4) == 0 || memcmp(stg+17, "sub ", 4) == 0)) |
83 | { | 83 | { |
84 | if(regid == *(USHORT*)(stg+22) && regid == *(USHORT*)(stg+26)) | 84 | if(regid == *(USHORT*)(stg+22) && regid == *(USHORT*)(stg+26)) |
85 | { | 85 | { |
86 | sscanf(ptr+2, "%x", &offset1); | 86 | sscanf(ptr+2, "%x", &offset1); |
87 | if(ptr[-1] == '-') | 87 | if(ptr[-1] == '-') |
88 | offset1 = -offset1; | 88 | offset1 = -offset1; |
89 | 89 | ||
90 | if(memcmp(stg+17, "add ", 4) == 0) offset += offset1; | 90 | if(memcmp(stg+17, "add ", 4) == 0) offset += offset1; |
91 | else offset -= offset1; | 91 | else offset -= offset1; |
92 | 92 | ||
93 | /* add result to disassembler string */ | 93 | /* add result to disassembler string */ |
94 | sprintf(stg+strlen(stg), " <- 0x%x", offset); | 94 | sprintf(stg+strlen(stg), " <- 0x%x", offset); |
95 | } | 95 | } |
96 | else | 96 | else |
97 | regid = 0; | 97 | regid = 0; |
98 | } | 98 | } |
99 | else | 99 | else |
100 | regid = 0; | 100 | regid = 0; |
101 | 101 | ||
102 | /* check for const data */ | 102 | /* check for const data */ |
103 | if(memcmp(stg+26, "[pc, ", 5) == 0 && (ptr=strstr(stg, "0x")) != NULL) | 103 | if(memcmp(stg+26, "[pc, ", 5) == 0 && (ptr=strstr(stg, "0x")) != NULL) |
104 | { | 104 | { |
105 | sscanf(ptr+2, "%x", &offset); | 105 | sscanf(ptr+2, "%x", &offset); |
106 | if(ptr[-1] == '-') | 106 | if(ptr[-1] == '-') |
107 | offset = -offset; | 107 | offset = -offset; |
108 | 108 | ||
109 | /* add data tag */ | 109 | /* add data tag */ |
110 | isdata[(pos+offset+8)>>5] |= 1 << ((pos+offset+8) & 31); | 110 | isdata[(pos+offset+8)>>5] |= 1 << ((pos+offset+8) & 31); |
111 | 111 | ||
112 | /* add const data to disassembler string */ | 112 | /* add const data to disassembler string */ |
113 | fseek(in, pos+offset+8, SEEK_SET); | 113 | fseek(in, pos+offset+8, SEEK_SET); |
114 | fread(&buf, 1, 4, in); | 114 | fread(&buf, 1, 4, in); |
115 | offset = le2int(buf); | 115 | offset = le2int(buf); |
116 | 116 | ||
117 | sprintf(stg+strlen(stg), " <- 0x%x", offset); | 117 | sprintf(stg+strlen(stg), " <- 0x%x", offset); |
118 | } | 118 | } |
119 | } | 119 | } |
120 | 120 | ||
121 | /* remove trailing spaces */ | 121 | /* remove trailing spaces */ |
122 | while(stg[strlen(stg)-1] == 32) | 122 | while(stg[strlen(stg)-1] == 32) |
123 | stg[strlen(stg)-1] = 0; | 123 | stg[strlen(stg)-1] = 0; |
124 | 124 | ||
125 | if(loop == 1) | 125 | if(loop == 1) |
126 | fprintf(out, "%s\n", stg); | 126 | fprintf(out, "%s\n", stg); |
127 | } | 127 | } |
128 | } | 128 | } |
129 | 129 | ||
130 | fclose(in); | 130 | fclose(in); |
131 | return 0; | 131 | return 0; |
132 | } | 132 | } |