diff options
Diffstat (limited to 'lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h')
-rw-r--r-- | lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h | 103 |
1 files changed, 103 insertions, 0 deletions
diff --git a/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h new file mode 100644 index 0000000000..58df6c2e2b --- /dev/null +++ b/lib/rbcodec/codecs/libopus/silk/arm/macros_armv4.h | |||
@@ -0,0 +1,103 @@ | |||
1 | /*********************************************************************** | ||
2 | Copyright (C) 2013 Xiph.Org Foundation and contributors. | ||
3 | Redistribution and use in source and binary forms, with or without | ||
4 | modification, are permitted provided that the following conditions | ||
5 | are met: | ||
6 | - Redistributions of source code must retain the above copyright notice, | ||
7 | this list of conditions and the following disclaimer. | ||
8 | - Redistributions in binary form must reproduce the above copyright | ||
9 | notice, this list of conditions and the following disclaimer in the | ||
10 | documentation and/or other materials provided with the distribution. | ||
11 | - Neither the name of Internet Society, IETF or IETF Trust, nor the | ||
12 | names of specific contributors, may be used to endorse or promote | ||
13 | products derived from this software without specific prior written | ||
14 | permission. | ||
15 | THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
16 | AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | ||
17 | IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | ||
18 | ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | ||
19 | LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | ||
20 | CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | ||
21 | SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | ||
22 | INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | ||
23 | CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | ||
24 | ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | ||
25 | POSSIBILITY OF SUCH DAMAGE. | ||
26 | ***********************************************************************/ | ||
27 | |||
28 | #ifndef SILK_MACROS_ARMv4_H | ||
29 | #define SILK_MACROS_ARMv4_H | ||
30 | |||
31 | /* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */ | ||
32 | #undef silk_SMULWB | ||
33 | static inline opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b) | ||
34 | { | ||
35 | unsigned rd_lo; | ||
36 | int rd_hi; | ||
37 | __asm__( | ||
38 | "#silk_SMULWB\n\t" | ||
39 | "smull %0, %1, %2, %3\n\t" | ||
40 | : "=&r"(rd_lo), "=&r"(rd_hi) | ||
41 | : "%r"(a), "r"(b<<16) | ||
42 | ); | ||
43 | return rd_hi; | ||
44 | } | ||
45 | #define silk_SMULWB(a, b) (silk_SMULWB_armv4(a, b)) | ||
46 | |||
47 | /* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */ | ||
48 | #undef silk_SMLAWB | ||
49 | #define silk_SMLAWB(a, b, c) ((a) + silk_SMULWB(b, c)) | ||
50 | |||
51 | /* (a32 * (b32 >> 16)) >> 16 */ | ||
52 | #undef silk_SMULWT | ||
53 | static inline opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b) | ||
54 | { | ||
55 | unsigned rd_lo; | ||
56 | int rd_hi; | ||
57 | __asm__( | ||
58 | "#silk_SMULWT\n\t" | ||
59 | "smull %0, %1, %2, %3\n\t" | ||
60 | : "=&r"(rd_lo), "=&r"(rd_hi) | ||
61 | : "%r"(a), "r"(b&~0xFFFF) | ||
62 | ); | ||
63 | return rd_hi; | ||
64 | } | ||
65 | #define silk_SMULWT(a, b) (silk_SMULWT_armv4(a, b)) | ||
66 | |||
67 | /* a32 + (b32 * (c32 >> 16)) >> 16 */ | ||
68 | #undef silk_SMLAWT | ||
69 | #define silk_SMLAWT(a, b, c) ((a) + silk_SMULWT(b, c)) | ||
70 | |||
71 | /* (a32 * b32) >> 16 */ | ||
72 | #undef silk_SMULWW | ||
73 | static inline opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b) | ||
74 | { | ||
75 | unsigned rd_lo; | ||
76 | int rd_hi; | ||
77 | __asm__( | ||
78 | "#silk_SMULWW\n\t" | ||
79 | "smull %0, %1, %2, %3\n\t" | ||
80 | : "=&r"(rd_lo), "=&r"(rd_hi) | ||
81 | : "%r"(a), "r"(b) | ||
82 | ); | ||
83 | return (rd_hi<<16)+(rd_lo>>16); | ||
84 | } | ||
85 | #define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b)) | ||
86 | |||
87 | #undef silk_SMLAWW | ||
88 | static inline opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b, | ||
89 | opus_int32 c) | ||
90 | { | ||
91 | unsigned rd_lo; | ||
92 | int rd_hi; | ||
93 | __asm__( | ||
94 | "#silk_SMLAWW\n\t" | ||
95 | "smull %0, %1, %2, %3\n\t" | ||
96 | : "=&r"(rd_lo), "=&r"(rd_hi) | ||
97 | : "%r"(b), "r"(c) | ||
98 | ); | ||
99 | return a+(rd_hi<<16)+(rd_lo>>16); | ||
100 | } | ||
101 | #define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c)) | ||
102 | |||
103 | #endif /* SILK_MACROS_ARMv4_H */ | ||