summaryrefslogtreecommitdiff
path: root/firmware
diff options
context:
space:
mode:
Diffstat (limited to 'firmware')
-rw-r--r--firmware/export/config-ipodmini2g.h4
-rw-r--r--firmware/export/config-ipodnano.h6
-rw-r--r--firmware/export/config-ipodvideo.h6
-rw-r--r--firmware/export/config.h8
-rw-r--r--firmware/export/cpu.h2
-rw-r--r--firmware/rolo.c4
-rw-r--r--firmware/target/arm/ata-as-arm.S4
-rw-r--r--firmware/target/arm/ata-target.h4
-rw-r--r--firmware/target/arm/ipod/lcd-gray.c2
-rw-r--r--firmware/target/arm/pcm-pp.c34
-rw-r--r--firmware/target/arm/system-pp502x.c41
-rw-r--r--firmware/target/arm/system-target.h2
-rw-r--r--firmware/target/arm/wmcodec-pp.c2
13 files changed, 54 insertions, 65 deletions
diff --git a/firmware/export/config-ipodmini2g.h b/firmware/export/config-ipodmini2g.h
index 55831c4cb3..032d32ad4c 100644
--- a/firmware/export/config-ipodmini2g.h
+++ b/firmware/export/config-ipodmini2g.h
@@ -76,8 +76,8 @@
76 76
77#ifndef SIMULATOR 77#ifndef SIMULATOR
78 78
79/* Define this if you have a PortalPlayer PP5020 */ 79/* Define this if you have a PortalPlayer PP5022 */
80#define CONFIG_CPU PP5020 80#define CONFIG_CPU PP5022
81 81
82/* Define this if you want to use the PP5020 i2c interface */ 82/* Define this if you want to use the PP5020 i2c interface */
83#define CONFIG_I2C I2C_PP5020 83#define CONFIG_I2C I2C_PP5020
diff --git a/firmware/export/config-ipodnano.h b/firmware/export/config-ipodnano.h
index 1d024d8565..37935786b7 100644
--- a/firmware/export/config-ipodnano.h
+++ b/firmware/export/config-ipodnano.h
@@ -74,10 +74,8 @@
74 74
75#ifndef SIMULATOR 75#ifndef SIMULATOR
76 76
77/* The Nano actually has a PP5021 - but it's register compatible with 77/* Define this if you have a PortalPlayer PP5022 */
78 the 5020 so Rockbox doesn't care. */ 78#define CONFIG_CPU PP5022
79/* Define this if you have a PortalPlayer PP5020 */
80#define CONFIG_CPU PP5020
81 79
82/* Define this if you want to use the PP5020 i2c interface */ 80/* Define this if you want to use the PP5020 i2c interface */
83#define CONFIG_I2C I2C_PP5020 81#define CONFIG_I2C I2C_PP5020
diff --git a/firmware/export/config-ipodvideo.h b/firmware/export/config-ipodvideo.h
index 46411a7784..e954859eb0 100644
--- a/firmware/export/config-ipodvideo.h
+++ b/firmware/export/config-ipodvideo.h
@@ -74,10 +74,8 @@
74 74
75#ifndef SIMULATOR 75#ifndef SIMULATOR
76 76
77/* The Nano actually has a PP5021 - but it's register compatible with 77/* Define this if you have a PortalPlayer PP5022 */
78 the 5020 so Rockbox doesn't care. */ 78#define CONFIG_CPU PP5022
79/* Define this if you have a PortalPlayer PP5020 */
80#define CONFIG_CPU PP5020
81 79
82/* Define this if you want to use the PP5020 i2c interface */ 80/* Define this if you want to use the PP5020 i2c interface */
83#define CONFIG_I2C I2C_PP5020 81#define CONFIG_I2C I2C_PP5020
diff --git a/firmware/export/config.h b/firmware/export/config.h
index ffcbf688ea..86e27d0031 100644
--- a/firmware/export/config.h
+++ b/firmware/export/config.h
@@ -43,9 +43,10 @@
43#define MCF5250 5250 43#define MCF5250 5250
44#define PP5002 5002 44#define PP5002 5002
45#define PP5020 5020 45#define PP5020 5020
46#define PP5022 5022
47#define PP5024 5024
46#define PNX0101 101 48#define PNX0101 101
47#define S3C2440 2440 49#define S3C2440 2440
48#define PP5024 5024
49#define TMS320DSC25 25 50#define TMS320DSC25 25
50 51
51/* CONFIG_KEYPAD */ 52/* CONFIG_KEYPAD */
@@ -279,8 +280,11 @@
279#endif 280#endif
280 281
281/* define for all cpus from PP family */ 282/* define for all cpus from PP family */
282#if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5024) 283#if (CONFIG_CPU == PP5002)
284#define CPU_PP
285#elif (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
283#define CPU_PP 286#define CPU_PP
287#define CPU_PP502x
284#endif 288#endif
285 289
286/* define for all cpus from ARM family */ 290/* define for all cpus from ARM family */
diff --git a/firmware/export/cpu.h b/firmware/export/cpu.h
index 6adf52ba5e..eb1c57b646 100644
--- a/firmware/export/cpu.h
+++ b/firmware/export/cpu.h
@@ -27,7 +27,7 @@
27#if CONFIG_CPU == MCF5250 27#if CONFIG_CPU == MCF5250
28#include "mcf5250.h" 28#include "mcf5250.h"
29#endif 29#endif
30#if CONFIG_CPU == PP5020 30#if (CONFIG_CPU == PP5020) || (CONFIG_CPU == PP5022)
31#include "pp5020.h" 31#include "pp5020.h"
32#endif 32#endif
33#if CONFIG_CPU == PP5002 33#if CONFIG_CPU == PP5002
diff --git a/firmware/rolo.c b/firmware/rolo.c
index 0b8a4f28ba..1ad59e216b 100644
--- a/firmware/rolo.c
+++ b/firmware/rolo.c
@@ -105,7 +105,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
105{ 105{
106 long i; 106 long i;
107 unsigned char* localdest = dest; 107 unsigned char* localdest = dest;
108#if (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024) 108#ifdef CPU_PP502x
109 unsigned long* memmapregs = (unsigned long*)0xf000f000; 109 unsigned long* memmapregs = (unsigned long*)0xf000f000;
110#endif 110#endif
111 111
@@ -120,7 +120,7 @@ void rolo_restart(const unsigned char* source, unsigned char* dest,
120 "jmp (%0) \n" 120 "jmp (%0) \n"
121 : : "a"(dest) 121 : : "a"(dest)
122 ); 122 );
123#elif (CONFIG_CPU==PP5020) || (CONFIG_CPU==PP5024) 123#elif defined(CPU_PP502x)
124 124
125 /* Tell the COP that we've finished loading and started rebooting */ 125 /* Tell the COP that we've finished loading and started rebooting */
126 cpu_message = 0; 126 cpu_message = 0;
diff --git a/firmware/target/arm/ata-as-arm.S b/firmware/target/arm/ata-as-arm.S
index 32fc28c4e0..5c0a1f9660 100644
--- a/firmware/target/arm/ata-as-arm.S
+++ b/firmware/target/arm/ata-as-arm.S
@@ -25,8 +25,8 @@
25 * setup. Needs investigation. */ 25 * setup. Needs investigation. */
26 .section .icode,"ax",%progbits 26 .section .icode,"ax",%progbits
27 .equ .ata_port, 0xc00031e0 27 .equ .ata_port, 0xc00031e0
28#elif CONFIG_CPU == PP5020 28#elif defined CPU_PP502x
29 /* Verified working on (PP5020, PP5021, PP5022) targets */ 29 /* Verified working on (PP5020, PP5022) targets */
30 .section .icode,"ax",%progbits 30 .section .icode,"ax",%progbits
31 .equ .ata_port, 0xc30001e0 31 .equ .ata_port, 0xc30001e0
32#elif CONFIG_CPU == S3C2440 32#elif CONFIG_CPU == S3C2440
diff --git a/firmware/target/arm/ata-target.h b/firmware/target/arm/ata-target.h
index d6c5f512e6..d65a7b2822 100644
--- a/firmware/target/arm/ata-target.h
+++ b/firmware/target/arm/ata-target.h
@@ -17,7 +17,7 @@
17 * 17 *
18 ****************************************************************************/ 18 ****************************************************************************/
19 19
20#if (CONFIG_CPU == PP5002) || (CONFIG_CPU == PP5020) 20#ifdef CPU_PP
21 21
22#if (CONFIG_CPU == PP5002) 22#if (CONFIG_CPU == PP5002)
23 23
@@ -26,7 +26,7 @@
26#define ATA_IOBASE 0xc00031e0 26#define ATA_IOBASE 0xc00031e0
27#define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8))) 27#define ATA_CONTROL (*((volatile unsigned char*)(0xc00033f8)))
28 28
29#elif (CONFIG_CPU == PP5020) 29#elif defined CPU_PP502x
30 30
31/* asm optimized reading and writing */ 31/* asm optimized reading and writing */
32#define ATA_OPTIMIZED_READING 32#define ATA_OPTIMIZED_READING
diff --git a/firmware/target/arm/ipod/lcd-gray.c b/firmware/target/arm/ipod/lcd-gray.c
index 1493751c3b..0a3a4ae797 100644
--- a/firmware/target/arm/ipod/lcd-gray.c
+++ b/firmware/target/arm/ipod/lcd-gray.c
@@ -41,7 +41,7 @@ static inline bool timer_check(int clock_start, int usecs)
41#if CONFIG_CPU == PP5002 41#if CONFIG_CPU == PP5002
42#define IPOD_LCD_BASE 0xc0001000 42#define IPOD_LCD_BASE 0xc0001000
43#define IPOD_LCD_BUSY_MASK 0x80000000 43#define IPOD_LCD_BUSY_MASK 0x80000000
44#else /* PP5020 */ 44#else /* PP502x */
45#define IPOD_LCD_BASE 0x70003000 45#define IPOD_LCD_BASE 0x70003000
46#define IPOD_LCD_BUSY_MASK 0x00008000 46#define IPOD_LCD_BUSY_MASK 0x00008000
47#endif 47#endif
diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c
index 0608c208eb..35bcd343cb 100644
--- a/firmware/target/arm/pcm-pp.c
+++ b/firmware/target/arm/pcm-pp.c
@@ -30,7 +30,7 @@ static int rec_peak_left, rec_peak_right;
30#endif 30#endif
31 31
32/** DMA **/ 32/** DMA **/
33#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 33#ifdef CPU_PP502x
34#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x3f000000) >> 24) 34#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x3f000000) >> 24)
35#elif CONFIG_CPU == PP5002 35#elif CONFIG_CPU == PP5002
36#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x7800000) >> 23) 36#define FIFO_FREE_COUNT ((IISFIFO_CFG & 0x7800000) >> 23)
@@ -52,7 +52,7 @@ size_t p_size IBSS_ATTR;
52 actually needs to do so when calling pcm_callback_for_more. C version is 52 actually needs to do so when calling pcm_callback_for_more. C version is
53 still included below for reference. 53 still included below for reference.
54 */ 54 */
55#ifdef CPU_PP 55#if 1
56void fiq(void) ICODE_ATTR __attribute__((naked)); 56void fiq(void) ICODE_ATTR __attribute__((naked));
57void fiq(void) 57void fiq(void)
58{ 58{
@@ -154,12 +154,12 @@ void fiq(void)
154 "b .exit \n\t" 154 "b .exit \n\t"
155 ); 155 );
156} 156}
157#else /* !(CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002) */ 157#else /* C version for reference */
158void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ"))); 158void fiq(void) ICODE_ATTR __attribute__ ((interrupt ("FIQ")));
159void fiq(void) 159void fiq(void)
160{ 160{
161 /* Clear interrupt */ 161 /* Clear interrupt */
162#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 162#ifdef CPU_PP502x
163 IISCONFIG &= ~(1 << 1); 163 IISCONFIG &= ~(1 << 1);
164#elif CONFIG_CPU == PP5002 164#elif CONFIG_CPU == PP5002
165 inl(0xcf001040); 165 inl(0xcf001040);
@@ -170,7 +170,7 @@ void fiq(void)
170 while (p_size) { 170 while (p_size) {
171 if (FIFO_FREE_COUNT < 2) { 171 if (FIFO_FREE_COUNT < 2) {
172 /* Enable interrupt */ 172 /* Enable interrupt */
173#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 173#ifdef CPU_PP502x
174 IISCONFIG |= (1 << 1); 174 IISCONFIG |= (1 << 1);
175#elif CONFIG_CPU == PP5002 175#elif CONFIG_CPU == PP5002
176 IISFIFO_CFG |= (1<<9); 176 IISFIFO_CFG |= (1<<9);
@@ -197,7 +197,7 @@ void fiq(void)
197 /* No more data, so disable the FIFO/FIQ */ 197 /* No more data, so disable the FIFO/FIQ */
198 pcm_play_dma_stop(); 198 pcm_play_dma_stop();
199} 199}
200#endif /* CONFIG_CPU == PP5020 || CONFIG_CPU == PP5002 */ 200#endif /* ASM / C selection */
201 201
202void pcm_play_dma_start(const void *addr, size_t size) 202void pcm_play_dma_start(const void *addr, size_t size)
203{ 203{
@@ -206,7 +206,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
206 206
207 pcm_playing = true; 207 pcm_playing = true;
208 208
209#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 209#ifdef CPU_PP502x
210 CPU_INT_PRIORITY |= I2S_MASK; /* FIQ priority for I2S */ 210 CPU_INT_PRIORITY |= I2S_MASK; /* FIQ priority for I2S */
211 CPU_INT_EN = I2S_MASK; /* Enable I2S interrupt */ 211 CPU_INT_EN = I2S_MASK; /* Enable I2S interrupt */
212#else 212#else
@@ -220,7 +220,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
220 enable_fiq(); 220 enable_fiq();
221 221
222 /* Enable playback FIFO */ 222 /* Enable playback FIFO */
223#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 223#ifdef CPU_PP502x
224 IISCONFIG |= (1 << 29); 224 IISCONFIG |= (1 << 29);
225#elif CONFIG_CPU == PP5002 225#elif CONFIG_CPU == PP5002
226 IISCONFIG |= 0x4; 226 IISCONFIG |= 0x4;
@@ -231,7 +231,7 @@ void pcm_play_dma_start(const void *addr, size_t size)
231 while (p_size > 0) { 231 while (p_size > 0) {
232 if (FIFO_FREE_COUNT < 2) { 232 if (FIFO_FREE_COUNT < 2) {
233 /* Enable interrupt */ 233 /* Enable interrupt */
234#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 234#ifdef CPU_PP502x
235 IISCONFIG |= (1 << 1); 235 IISCONFIG |= (1 << 1);
236#elif CONFIG_CPU == PP5002 236#elif CONFIG_CPU == PP5002
237 IISFIFO_CFG |= (1<<9); 237 IISFIFO_CFG |= (1<<9);
@@ -256,7 +256,7 @@ void pcm_play_dma_stop(void)
256 pcm_playing = false; 256 pcm_playing = false;
257 pcm_paused = false; 257 pcm_paused = false;
258 258
259#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 259#ifdef CPU_PP502x
260 /* Disable playback FIFO and interrupt */ 260 /* Disable playback FIFO and interrupt */
261 IISCONFIG &= ~((1 << 29) | (1 << 1)); 261 IISCONFIG &= ~((1 << 29) | (1 << 1));
262#elif CONFIG_CPU == PP5002 262#elif CONFIG_CPU == PP5002
@@ -273,7 +273,7 @@ void pcm_play_dma_stop(void)
273 273
274void pcm_play_pause_pause(void) 274void pcm_play_pause_pause(void)
275{ 275{
276#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 276#ifdef CPU_PP502x
277 /* Disable playback FIFO and interrupt */ 277 /* Disable playback FIFO and interrupt */
278 IISCONFIG &= ~((1 << 29) | (1 << 1)); 278 IISCONFIG &= ~((1 << 29) | (1 << 1));
279#elif CONFIG_CPU == PP5002 279#elif CONFIG_CPU == PP5002
@@ -293,7 +293,7 @@ void pcm_play_pause_unpause(void)
293 enable_fiq(); 293 enable_fiq();
294 294
295 /* Enable playback FIFO */ 295 /* Enable playback FIFO */
296#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 296#ifdef CPU_PP502x
297 IISCONFIG |= (1 << 29); 297 IISCONFIG |= (1 << 29);
298#elif CONFIG_CPU == PP5002 298#elif CONFIG_CPU == PP5002
299 IISCONFIG |= 0x4; 299 IISCONFIG |= 0x4;
@@ -304,7 +304,7 @@ void pcm_play_pause_unpause(void)
304 while (p_size > 0) { 304 while (p_size > 0) {
305 if (FIFO_FREE_COUNT < 2) { 305 if (FIFO_FREE_COUNT < 2) {
306 /* Enable interrupt */ 306 /* Enable interrupt */
307#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 307#ifdef CPU_PP502x
308 IISCONFIG |= (1 << 1); 308 IISCONFIG |= (1 << 1);
309#elif CONFIG_CPU == PP5002 309#elif CONFIG_CPU == PP5002
310 IISFIFO_CFG |= (1<<9); 310 IISFIFO_CFG |= (1<<9);
@@ -445,7 +445,7 @@ void fiq_record(void)
445 int status = 0; 445 int status = 0;
446 446
447 /* Clear interrupt */ 447 /* Clear interrupt */
448#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 448#ifdef CPU_PP502x
449 IISCONFIG &= ~(1 << 0); 449 IISCONFIG &= ~(1 << 0);
450#elif CONFIG_CPU == PP5002 450#elif CONFIG_CPU == PP5002
451 /* TODO */ 451 /* TODO */
@@ -454,7 +454,7 @@ void fiq_record(void)
454 while (p_size > 0) { 454 while (p_size > 0) {
455 if (FIFO_FREE_COUNT < 2) { 455 if (FIFO_FREE_COUNT < 2) {
456 /* enable interrupt */ 456 /* enable interrupt */
457#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 457#ifdef CPU_PP502x
458 IISCONFIG |= (1 << 0); 458 IISCONFIG |= (1 << 0);
459#elif CONFIG_CPU == PP5002 459#elif CONFIG_CPU == PP5002
460 /* TODO */ 460 /* TODO */
@@ -499,7 +499,7 @@ void pcm_record_more(void *start, size_t size)
499 rec_peak_addr = start; /* Start peaking at dest */ 499 rec_peak_addr = start; /* Start peaking at dest */
500 p = start; /* Start of RX buffer */ 500 p = start; /* Start of RX buffer */
501 p_size = size; /* Bytes to transfer */ 501 p_size = size; /* Bytes to transfer */
502#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 502#ifdef CPU_PP502x
503 IISCONFIG |= (1 << 0); 503 IISCONFIG |= (1 << 0);
504#elif CONFIG_CPU == PP5002 504#elif CONFIG_CPU == PP5002
505 /* TODO */ 505 /* TODO */
@@ -558,7 +558,7 @@ void pcm_init_recording(void)
558 pcm_recording = false; 558 pcm_recording = false;
559 pcm_callback_more_ready = NULL; 559 pcm_callback_more_ready = NULL;
560 560
561#if (CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024) 561#ifdef CPU_PP502x
562#if defined(IPOD_COLOR) || defined (IPOD_4G) 562#if defined(IPOD_COLOR) || defined (IPOD_4G)
563 /* The usual magic from IPL - I'm guessing this configures the headphone 563 /* The usual magic from IPL - I'm guessing this configures the headphone
564 socket to be input or output - in this case, input. */ 564 socket to be input or output - in this case, input. */
diff --git a/firmware/target/arm/system-pp502x.c b/firmware/target/arm/system-pp502x.c
index 49ffdd300b..658ea0eeb3 100644
--- a/firmware/target/arm/system-pp502x.c
+++ b/firmware/target/arm/system-pp502x.c
@@ -151,7 +151,7 @@ static void ipod_init_cache(void)
151#ifdef HAVE_ADJUSTABLE_CPU_FREQ 151#ifdef HAVE_ADJUSTABLE_CPU_FREQ
152void set_cpu_frequency(long frequency) 152void set_cpu_frequency(long frequency)
153{ 153{
154 unsigned long postmult; 154 unsigned long postmult, pll_control;
155 155
156# if NUM_CORES > 1 156# if NUM_CORES > 1
157 /* Using mutex or spinlock isn't safe here. */ 157 /* Using mutex or spinlock isn't safe here. */
@@ -168,35 +168,24 @@ void set_cpu_frequency(long frequency)
168 168
169 /* Enable PLL? */ 169 /* Enable PLL? */
170 outl(inl(0x70000020) | (1<<30), 0x70000020); 170 outl(inl(0x70000020) | (1<<30), 0x70000020);
171 171
172 /* Select 24MHz crystal as clock source? */ 172 /* Select 24MHz crystal as clock source? */
173 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); 173 outl((inl(0x60006020) & 0x0ffffff0) | 0x10000002, 0x60006020);
174 174
175 /* Clock frequency = (24/8)*postmult */ 175 /* Clock frequency = (24/8)*postmult */
176 outl(0xaa020000 | 8 | (postmult << 8), 0x60006034); 176 pll_control = 0x8a020000 | 8 | (postmult << 8);
177 177 outl(pll_control, 0x60006034);
178 /* Wait for PLL relock? */ 178# if CONFIG_CPU == PP5020
179 udelay(2000); 179 outl(0xd198, 0x6000603c); /* magic sequence */
180 outl(pll_control, 0x60006034);
181 udelay(500); /* wait for relock */
182# else /* PP5022, PP5024 */
183 while (!(inl(0x6000603c) & 0x80000000)); /* wait for relock */
184# endif
180 185
181 /* Select PLL as clock source? */ 186 /* Select PLL as clock source? */
182 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); 187 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
183 188
184# if defined(IPOD_COLOR) || defined(IPOD_4G) || defined(IPOD_MINI) || defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
185 /* We don't know why the timer interrupt gets disabled on the PP5020
186 based ipods, but without the following line, the 4Gs will freeze
187 when CPU frequency changing is enabled.
188
189 Note also that a simple "CPU_INT_EN = TIMER1_MASK;" (as used
190 elsewhere to enable interrupts) doesn't work, we need "|=".
191
192 It's not needed on the PP5021 and PP5022 ipods.
193 */
194
195 /* unmask interrupt source */
196 CPU_INT_EN |= TIMER1_MASK;
197 COP_INT_EN |= TIMER1_MASK;
198# endif
199
200# if NUM_CORES > 1 189# if NUM_CORES > 1
201 boostctrl_mtx.locked = 0; 190 boostctrl_mtx.locked = 0;
202# endif 191# endif
@@ -213,9 +202,9 @@ void ipod_set_cpu_frequency(void)
213 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020); 202 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
214 203
215 /* Clock frequency = (24/8)*25 = 75MHz */ 204 /* Clock frequency = (24/8)*25 = 75MHz */
216 outl(0xaa020000 | 8 | (25 << 8), 0x60006034); 205 outl(0x8a020000 | 8 | (25 << 8), 0x60006034);
217 /* Wait for PLL relock? */ 206 /* Wait for PLL relock? */
218 udelay(2000); 207 udelay(500);
219 208
220 /* Select PLL as clock source? */ 209 /* Select PLL as clock source? */
221 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020); 210 outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
diff --git a/firmware/target/arm/system-target.h b/firmware/target/arm/system-target.h
index 7a4c8b603c..afb1ce7314 100644
--- a/firmware/target/arm/system-target.h
+++ b/firmware/target/arm/system-target.h
@@ -36,7 +36,7 @@ static inline void udelay(unsigned usecs)
36 while (TIME_BEFORE(USEC_TIMER, stop)); 36 while (TIME_BEFORE(USEC_TIMER, stop));
37} 37}
38 38
39#if CONFIG_CPU == PP5020 || CONFIG_CPU == PP5024 39#ifdef CPU_PP502x
40static inline unsigned int current_core(void) 40static inline unsigned int current_core(void)
41{ 41{
42 /* 42 /*
diff --git a/firmware/target/arm/wmcodec-pp.c b/firmware/target/arm/wmcodec-pp.c
index 505a31deb4..7d00369bf0 100644
--- a/firmware/target/arm/wmcodec-pp.c
+++ b/firmware/target/arm/wmcodec-pp.c
@@ -43,7 +43,7 @@ int audiohw_init(void) {
43 /* reset I2C */ 43 /* reset I2C */
44 i2c_init(); 44 i2c_init();
45 45
46#if CONFIG_CPU == PP5020 46#ifdef CPU_PP502x
47 /* normal outputs for CDI and I2S pin groups */ 47 /* normal outputs for CDI and I2S pin groups */
48 DEV_INIT &= ~0x300; 48 DEV_INIT &= ~0x300;
49 49