diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/target/arm/s5l8702/system-s5l8702.c | 300 |
1 files changed, 152 insertions, 148 deletions
diff --git a/firmware/target/arm/s5l8702/system-s5l8702.c b/firmware/target/arm/s5l8702/system-s5l8702.c index a4e82feef9..b9d8094b3f 100644 --- a/firmware/target/arm/s5l8702/system-s5l8702.c +++ b/firmware/target/arm/s5l8702/system-s5l8702.c | |||
@@ -25,6 +25,8 @@ | |||
25 | #include "system-target.h" | 25 | #include "system-target.h" |
26 | #include "pmu-target.h" | 26 | #include "pmu-target.h" |
27 | 27 | ||
28 | extern long sleepin, slept; | ||
29 | |||
28 | #define default_interrupt(name) \ | 30 | #define default_interrupt(name) \ |
29 | extern __attribute__((weak,alias("UIRQ"))) void name (void) | 31 | extern __attribute__((weak,alias("UIRQ"))) void name (void) |
30 | 32 | ||
@@ -32,146 +34,146 @@ void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); | |||
32 | void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked, \ | 34 | void fiq_handler(void) __attribute__((interrupt ("FIQ"), naked, \ |
33 | weak, alias("fiq_dummy"))); | 35 | weak, alias("fiq_dummy"))); |
34 | 36 | ||
35 | default_interrupt(INT_IRQ0); | 37 | default_interrupt(INT_IRQ0); |
36 | default_interrupt(INT_IRQ1); | 38 | default_interrupt(INT_IRQ1); |
37 | default_interrupt(INT_IRQ2); | 39 | default_interrupt(INT_IRQ2); |
38 | default_interrupt(INT_IRQ3); | 40 | default_interrupt(INT_IRQ3); |
39 | default_interrupt(INT_IRQ4); | 41 | default_interrupt(INT_IRQ4); |
40 | default_interrupt(INT_IRQ5); | 42 | default_interrupt(INT_IRQ5); |
41 | default_interrupt(INT_IRQ6); | 43 | default_interrupt(INT_IRQ6); |
42 | default_interrupt(INT_IRQ7); | 44 | default_interrupt(INT_IRQ7); |
43 | default_interrupt(INT_TIMERA); | 45 | default_interrupt(INT_TIMERA); |
44 | default_interrupt(INT_TIMERB); | 46 | default_interrupt(INT_TIMERB); |
45 | default_interrupt(INT_TIMERC); | 47 | default_interrupt(INT_TIMERC); |
46 | default_interrupt(INT_TIMERD); | 48 | default_interrupt(INT_TIMERD); |
47 | default_interrupt(INT_TIMERE); | 49 | default_interrupt(INT_TIMERE); |
48 | default_interrupt(INT_TIMERF); | 50 | default_interrupt(INT_TIMERF); |
49 | default_interrupt(INT_TIMERG); | 51 | default_interrupt(INT_TIMERG); |
50 | default_interrupt(INT_TIMERH); | 52 | default_interrupt(INT_TIMERH); |
51 | default_interrupt(INT_IRQ9); | 53 | default_interrupt(INT_IRQ9); |
52 | default_interrupt(INT_IRQ10); | 54 | default_interrupt(INT_IRQ10); |
53 | default_interrupt(INT_IRQ11); | 55 | default_interrupt(INT_IRQ11); |
54 | default_interrupt(INT_IRQ12); | 56 | default_interrupt(INT_IRQ12); |
55 | default_interrupt(INT_IRQ13); | 57 | default_interrupt(INT_IRQ13); |
56 | default_interrupt(INT_IRQ14); | 58 | default_interrupt(INT_IRQ14); |
57 | default_interrupt(INT_IRQ15); | 59 | default_interrupt(INT_IRQ15); |
58 | default_interrupt(INT_DMAC0C0); | 60 | default_interrupt(INT_DMAC0C0); |
59 | default_interrupt(INT_DMAC0C1); | 61 | default_interrupt(INT_DMAC0C1); |
60 | default_interrupt(INT_DMAC0C2); | 62 | default_interrupt(INT_DMAC0C2); |
61 | default_interrupt(INT_DMAC0C3); | 63 | default_interrupt(INT_DMAC0C3); |
62 | default_interrupt(INT_DMAC0C4); | 64 | default_interrupt(INT_DMAC0C4); |
63 | default_interrupt(INT_DMAC0C5); | 65 | default_interrupt(INT_DMAC0C5); |
64 | default_interrupt(INT_DMAC0C6); | 66 | default_interrupt(INT_DMAC0C6); |
65 | default_interrupt(INT_DMAC0C7); | 67 | default_interrupt(INT_DMAC0C7); |
66 | default_interrupt(INT_DMAC1C0); | 68 | default_interrupt(INT_DMAC1C0); |
67 | default_interrupt(INT_DMAC1C1); | 69 | default_interrupt(INT_DMAC1C1); |
68 | default_interrupt(INT_DMAC1C2); | 70 | default_interrupt(INT_DMAC1C2); |
69 | default_interrupt(INT_DMAC1C3); | 71 | default_interrupt(INT_DMAC1C3); |
70 | default_interrupt(INT_DMAC1C4); | 72 | default_interrupt(INT_DMAC1C4); |
71 | default_interrupt(INT_DMAC1C5); | 73 | default_interrupt(INT_DMAC1C5); |
72 | default_interrupt(INT_DMAC1C6); | 74 | default_interrupt(INT_DMAC1C6); |
73 | default_interrupt(INT_DMAC1C7); | 75 | default_interrupt(INT_DMAC1C7); |
74 | default_interrupt(INT_IRQ18); | 76 | default_interrupt(INT_IRQ18); |
75 | default_interrupt(INT_USB_FUNC); | 77 | default_interrupt(INT_USB_FUNC); |
76 | default_interrupt(INT_IRQ20); | 78 | default_interrupt(INT_IRQ20); |
77 | default_interrupt(INT_IRQ21); | 79 | default_interrupt(INT_IRQ21); |
78 | default_interrupt(INT_IRQ22); | 80 | default_interrupt(INT_IRQ22); |
79 | default_interrupt(INT_WHEEL); | 81 | default_interrupt(INT_WHEEL); |
80 | default_interrupt(INT_IRQ24); | 82 | default_interrupt(INT_IRQ24); |
81 | default_interrupt(INT_IRQ25); | 83 | default_interrupt(INT_IRQ25); |
82 | default_interrupt(INT_IRQ26); | 84 | default_interrupt(INT_IRQ26); |
83 | default_interrupt(INT_IRQ27); | 85 | default_interrupt(INT_IRQ27); |
84 | default_interrupt(INT_IRQ28); | 86 | default_interrupt(INT_IRQ28); |
85 | default_interrupt(INT_ATA); | 87 | default_interrupt(INT_ATA); |
86 | default_interrupt(INT_IRQ30); | 88 | default_interrupt(INT_IRQ30); |
87 | default_interrupt(INT_IRQ31); | 89 | default_interrupt(INT_IRQ31); |
88 | default_interrupt(INT_IRQ32); | 90 | default_interrupt(INT_IRQ32); |
89 | default_interrupt(INT_IRQ33); | 91 | default_interrupt(INT_IRQ33); |
90 | default_interrupt(INT_IRQ34); | 92 | default_interrupt(INT_IRQ34); |
91 | default_interrupt(INT_IRQ35); | 93 | default_interrupt(INT_IRQ35); |
92 | default_interrupt(INT_IRQ36); | 94 | default_interrupt(INT_IRQ36); |
93 | default_interrupt(INT_IRQ37); | 95 | default_interrupt(INT_IRQ37); |
94 | default_interrupt(INT_IRQ38); | 96 | default_interrupt(INT_IRQ38); |
95 | default_interrupt(INT_IRQ39); | 97 | default_interrupt(INT_IRQ39); |
96 | default_interrupt(INT_IRQ40); | 98 | default_interrupt(INT_IRQ40); |
97 | default_interrupt(INT_IRQ41); | 99 | default_interrupt(INT_IRQ41); |
98 | default_interrupt(INT_IRQ42); | 100 | default_interrupt(INT_IRQ42); |
99 | default_interrupt(INT_IRQ43); | 101 | default_interrupt(INT_IRQ43); |
100 | default_interrupt(INT_IRQ44); | 102 | default_interrupt(INT_IRQ44); |
101 | default_interrupt(INT_IRQ45); | 103 | default_interrupt(INT_IRQ45); |
102 | default_interrupt(INT_IRQ46); | 104 | default_interrupt(INT_IRQ46); |
103 | default_interrupt(INT_IRQ47); | 105 | default_interrupt(INT_IRQ47); |
104 | default_interrupt(INT_IRQ48); | 106 | default_interrupt(INT_IRQ48); |
105 | default_interrupt(INT_IRQ49); | 107 | default_interrupt(INT_IRQ49); |
106 | default_interrupt(INT_IRQ50); | 108 | default_interrupt(INT_IRQ50); |
107 | default_interrupt(INT_IRQ51); | 109 | default_interrupt(INT_IRQ51); |
108 | default_interrupt(INT_IRQ52); | 110 | default_interrupt(INT_IRQ52); |
109 | default_interrupt(INT_IRQ53); | 111 | default_interrupt(INT_IRQ53); |
110 | default_interrupt(INT_IRQ54); | 112 | default_interrupt(INT_IRQ54); |
111 | default_interrupt(INT_IRQ55); | 113 | default_interrupt(INT_IRQ55); |
112 | default_interrupt(INT_IRQ56); | 114 | default_interrupt(INT_IRQ56); |
113 | default_interrupt(INT_IRQ57); | 115 | default_interrupt(INT_IRQ57); |
114 | default_interrupt(INT_IRQ58); | 116 | default_interrupt(INT_IRQ58); |
115 | default_interrupt(INT_IRQ59); | 117 | default_interrupt(INT_IRQ59); |
116 | default_interrupt(INT_IRQ60); | 118 | default_interrupt(INT_IRQ60); |
117 | default_interrupt(INT_IRQ61); | 119 | default_interrupt(INT_IRQ61); |
118 | default_interrupt(INT_IRQ62); | 120 | default_interrupt(INT_IRQ62); |
119 | default_interrupt(INT_IRQ63); | 121 | default_interrupt(INT_IRQ63); |
120 | 122 | ||
121 | 123 | ||
122 | int current_irq; | 124 | int current_irq; |
123 | 125 | ||
124 | |||
125 | void INT_TIMER(void) ICODE_ATTR; | ||
126 | void INT_TIMER() | ||
127 | { | ||
128 | if (TACON & (TACON >> 4) & 0x7000) INT_TIMERA(); | ||
129 | if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB(); | ||
130 | if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC(); | ||
131 | if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD(); | ||
132 | if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF(); | ||
133 | if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG(); | ||
134 | if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH(); | ||
135 | } | ||
136 | 126 | ||
137 | void INT_DMAC0(void) ICODE_ATTR; | 127 | void INT_TIMER(void) ICODE_ATTR; |
138 | void INT_DMAC0() | 128 | void INT_TIMER() |
139 | { | 129 | { |
140 | uint32_t intsts = DMAC0INTSTS; | 130 | if (TACON & (TACON >> 4) & 0x7000) INT_TIMERA(); |
141 | if (intsts & 1) INT_DMAC0C0(); | 131 | if (TBCON & (TBCON >> 4) & 0x7000) INT_TIMERB(); |
142 | if (intsts & 2) INT_DMAC0C1(); | 132 | if (TCCON & (TCCON >> 4) & 0x7000) INT_TIMERC(); |
143 | if (intsts & 4) INT_DMAC0C2(); | 133 | if (TDCON & (TDCON >> 4) & 0x7000) INT_TIMERD(); |
144 | if (intsts & 8) INT_DMAC0C3(); | 134 | if (TFCON & (TFCON >> 4) & 0x7000) INT_TIMERF(); |
145 | if (intsts & 0x10) INT_DMAC0C4(); | 135 | if (TGCON & (TGCON >> 4) & 0x7000) INT_TIMERG(); |
146 | if (intsts & 0x20) INT_DMAC0C5(); | 136 | if (THCON & (THCON >> 4) & 0x7000) INT_TIMERH(); |
147 | if (intsts & 0x40) INT_DMAC0C6(); | 137 | } |
148 | if (intsts & 0x80) INT_DMAC0C7(); | 138 | |
149 | } | 139 | void INT_DMAC0(void) ICODE_ATTR; |
150 | 140 | void INT_DMAC0() | |
151 | void INT_DMAC1(void) ICODE_ATTR; | 141 | { |
152 | void INT_DMAC1() | 142 | uint32_t intsts = DMAC0INTSTS; |
153 | { | 143 | if (intsts & 1) INT_DMAC0C0(); |
154 | uint32_t intsts = DMAC1INTSTS; | 144 | if (intsts & 2) INT_DMAC0C1(); |
155 | if (intsts & 1) INT_DMAC1C0(); | 145 | if (intsts & 4) INT_DMAC0C2(); |
156 | if (intsts & 2) INT_DMAC1C1(); | 146 | if (intsts & 8) INT_DMAC0C3(); |
157 | if (intsts & 4) INT_DMAC1C2(); | 147 | if (intsts & 0x10) INT_DMAC0C4(); |
158 | if (intsts & 8) INT_DMAC1C3(); | 148 | if (intsts & 0x20) INT_DMAC0C5(); |
159 | if (intsts & 0x10) INT_DMAC1C4(); | 149 | if (intsts & 0x40) INT_DMAC0C6(); |
160 | if (intsts & 0x20) INT_DMAC1C5(); | 150 | if (intsts & 0x80) INT_DMAC0C7(); |
161 | if (intsts & 0x40) INT_DMAC1C6(); | 151 | } |
162 | if (intsts & 0x80) INT_DMAC1C7(); | 152 | |
163 | } | 153 | void INT_DMAC1(void) ICODE_ATTR; |
154 | void INT_DMAC1() | ||
155 | { | ||
156 | uint32_t intsts = DMAC1INTSTS; | ||
157 | if (intsts & 1) INT_DMAC1C0(); | ||
158 | if (intsts & 2) INT_DMAC1C1(); | ||
159 | if (intsts & 4) INT_DMAC1C2(); | ||
160 | if (intsts & 8) INT_DMAC1C3(); | ||
161 | if (intsts & 0x10) INT_DMAC1C4(); | ||
162 | if (intsts & 0x20) INT_DMAC1C5(); | ||
163 | if (intsts & 0x40) INT_DMAC1C6(); | ||
164 | if (intsts & 0x80) INT_DMAC1C7(); | ||
165 | } | ||
164 | 166 | ||
165 | static void (* const irqvector[])(void) = | 167 | static void (* const irqvector[])(void) = |
166 | { | 168 | { |
167 | INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7, | 169 | INT_IRQ0,INT_IRQ1,INT_IRQ2,INT_IRQ3,INT_IRQ4,INT_IRQ5,INT_IRQ6,INT_IRQ7, |
168 | INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15, | 170 | INT_TIMER,INT_IRQ9,INT_IRQ10,INT_IRQ11,INT_IRQ12,INT_IRQ13,INT_IRQ14,INT_IRQ15, |
169 | INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL, | 171 | INT_DMAC0,INT_DMAC1,INT_IRQ18,INT_USB_FUNC,INT_IRQ20,INT_IRQ21,INT_IRQ22,INT_WHEEL, |
170 | INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31, | 172 | INT_IRQ24,INT_IRQ25,INT_IRQ26,INT_IRQ27,INT_IRQ28,INT_ATA,INT_IRQ30,INT_IRQ31, |
171 | INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39, | 173 | INT_IRQ32,INT_IRQ33,INT_IRQ34,INT_IRQ35,INT_IRQ36,INT_IRQ37,INT_IRQ38,INT_IRQ39, |
172 | INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58, | 174 | INT_IRQ40,INT_IRQ41,INT_IRQ42,INT_IRQ43,INT_IRQ55,INT_IRQ56,INT_IRQ57,INT_IRQ58, |
173 | INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55, | 175 | INT_IRQ48,INT_IRQ49,INT_IRQ50,INT_IRQ51,INT_IRQ52,INT_IRQ53,INT_IRQ54,INT_IRQ55, |
174 | INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63 | 176 | INT_IRQ56,INT_IRQ57,INT_IRQ58,INT_IRQ59,INT_IRQ60,INT_IRQ61,INT_IRQ62,INT_IRQ63 |
175 | }; | 177 | }; |
176 | 178 | ||
177 | static void UIRQ(void) | 179 | static void UIRQ(void) |
@@ -188,18 +190,20 @@ void irq_handler(void) | |||
188 | asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ | 190 | asm volatile( "stmfd sp!, {r0-r7, ip, lr} \n" /* Store context */ |
189 | "sub sp, sp, #8 \n"); /* Reserve stack */ | 191 | "sub sp, sp, #8 \n"); /* Reserve stack */ |
190 | 192 | ||
191 | void* dummy = VIC0ADDRESS; | 193 | if (sleepin) slept += USEC_TIMER - sleepin; |
192 | dummy = VIC1ADDRESS; | 194 | sleepin = 0; |
193 | uint32_t irqs0 = VIC0IRQSTATUS; | 195 | void* dummy = VIC0ADDRESS; |
194 | uint32_t irqs1 = VIC1IRQSTATUS; | 196 | dummy = VIC1ADDRESS; |
195 | for (current_irq = 0; irqs0; current_irq++, irqs0 >>= 1) | 197 | uint32_t irqs0 = VIC0IRQSTATUS; |
196 | if (irqs0 & 1) | 198 | uint32_t irqs1 = VIC1IRQSTATUS; |
197 | irqvector[current_irq](); | 199 | for (current_irq = 0; irqs0; current_irq++, irqs0 >>= 1) |
198 | for (current_irq = 32; irqs1; current_irq++, irqs1 >>= 1) | 200 | if (irqs0 & 1) |
199 | if (irqs1 & 1) | 201 | irqvector[current_irq](); |
200 | irqvector[current_irq](); | 202 | for (current_irq = 32; irqs1; current_irq++, irqs1 >>= 1) |
201 | VIC0ADDRESS = NULL; | 203 | if (irqs1 & 1) |
202 | VIC1ADDRESS = NULL; | 204 | irqvector[current_irq](); |
205 | VIC0ADDRESS = NULL; | ||
206 | VIC1ADDRESS = NULL; | ||
203 | 207 | ||
204 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ | 208 | asm volatile( "add sp, sp, #8 \n" /* Cleanup stack */ |
205 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ | 209 | "ldmfd sp!, {r0-r7, ip, lr} \n" /* Restore context */ |
@@ -256,13 +260,13 @@ void set_cpu_frequency(long frequency) | |||
256 | //TODO: Need to understand this better | 260 | //TODO: Need to understand this better |
257 | if (frequency == CPUFREQ_MAX) | 261 | if (frequency == CPUFREQ_MAX) |
258 | { | 262 | { |
259 | CLKCON0 = 0x3011; | 263 | CLKCON1 = 0x404101; |
260 | CLKCON1 = 0x4001; | 264 | CLKCON0 = 0x3000; |
261 | } | 265 | } |
262 | else | 266 | else |
263 | { | 267 | { |
264 | CLKCON1 = 0x404101; | 268 | CLKCON0 = 0x3011; |
265 | CLKCON0 = 0x3000; | 269 | CLKCON1 = 0x4001; |
266 | } | 270 | } |
267 | 271 | ||
268 | cpu_frequency = frequency; | 272 | cpu_frequency = frequency; |