diff options
Diffstat (limited to 'firmware')
-rw-r--r-- | firmware/SOURCES | 10 | ||||
-rw-r--r-- | firmware/export/config-m200.h | 3 | ||||
-rw-r--r-- | firmware/export/tcc77x.h | 18 | ||||
-rw-r--r-- | firmware/export/tcc780x.h | 29 | ||||
-rw-r--r-- | firmware/target/arm/ata-nand-telechips.c (renamed from firmware/target/arm/tcc780x/ata-nand-tcc780x.c) | 141 | ||||
-rw-r--r-- | firmware/target/arm/tcc77x/ata-nand-target.h (renamed from firmware/target/arm/tcc77x/ata-target.h) | 9 | ||||
-rw-r--r-- | firmware/target/arm/tcc77x/ata-nand-tcc77x.c | 106 | ||||
-rw-r--r-- | firmware/target/arm/tcc780x/ata-nand-target.h (renamed from firmware/target/arm/tcc780x/ata-target.h) | 9 |
8 files changed, 156 insertions, 169 deletions
diff --git a/firmware/SOURCES b/firmware/SOURCES index 60adcbe59c..3617f978ef 100644 --- a/firmware/SOURCES +++ b/firmware/SOURCES | |||
@@ -956,8 +956,8 @@ target/arm/pnx0101/pcm-pnx0101.c | |||
956 | 956 | ||
957 | #ifdef LOGIK_DAX | 957 | #ifdef LOGIK_DAX |
958 | #ifndef SIMULATOR | 958 | #ifndef SIMULATOR |
959 | target/arm/ata-nand-telechips.c | ||
959 | target/arm/tcc77x/adc-tcc77x.c | 960 | target/arm/tcc77x/adc-tcc77x.c |
960 | target/arm/tcc77x/ata-nand-tcc77x.c | ||
961 | target/arm/tcc77x/kernel-tcc77x.c | 961 | target/arm/tcc77x/kernel-tcc77x.c |
962 | target/arm/tcc77x/lcd-ssd1815.c | 962 | target/arm/tcc77x/lcd-ssd1815.c |
963 | target/arm/tcc77x/powermgmt-tcc77x.c | 963 | target/arm/tcc77x/powermgmt-tcc77x.c |
@@ -975,8 +975,8 @@ target/arm/tcc77x/pcm-tcc77x.c | |||
975 | 975 | ||
976 | #ifdef SANSA_M200 | 976 | #ifdef SANSA_M200 |
977 | #ifndef SIMULATOR | 977 | #ifndef SIMULATOR |
978 | target/arm/ata-nand-telechips.c | ||
978 | target/arm/tcc77x/adc-tcc77x.c | 979 | target/arm/tcc77x/adc-tcc77x.c |
979 | target/arm/tcc77x/ata-nand-tcc77x.c | ||
980 | target/arm/tcc77x/kernel-tcc77x.c | 980 | target/arm/tcc77x/kernel-tcc77x.c |
981 | target/arm/tcc77x/lcd-ssd1815.c | 981 | target/arm/tcc77x/lcd-ssd1815.c |
982 | target/arm/tcc77x/powermgmt-tcc77x.c | 982 | target/arm/tcc77x/powermgmt-tcc77x.c |
@@ -994,8 +994,8 @@ target/arm/tcc77x/pcm-tcc77x.c | |||
994 | 994 | ||
995 | #ifdef SANSA_C100 | 995 | #ifdef SANSA_C100 |
996 | #ifndef SIMULATOR | 996 | #ifndef SIMULATOR |
997 | target/arm/ata-nand-telechips.c | ||
997 | target/arm/tcc77x/adc-tcc77x.c | 998 | target/arm/tcc77x/adc-tcc77x.c |
998 | target/arm/tcc77x/ata-nand-tcc77x.c | ||
999 | target/arm/tcc77x/kernel-tcc77x.c | 999 | target/arm/tcc77x/kernel-tcc77x.c |
1000 | target/arm/tcc77x/c100/lcd-S6B33B2.c | 1000 | target/arm/tcc77x/c100/lcd-S6B33B2.c |
1001 | target/arm/tcc77x/powermgmt-tcc77x.c | 1001 | target/arm/tcc77x/powermgmt-tcc77x.c |
@@ -1013,8 +1013,8 @@ target/arm/tcc77x/pcm-tcc77x.c | |||
1013 | 1013 | ||
1014 | #ifdef IAUDIO_7 | 1014 | #ifdef IAUDIO_7 |
1015 | #ifndef SIMULATOR | 1015 | #ifndef SIMULATOR |
1016 | target/arm/ata-nand-telechips.c | ||
1016 | target/arm/tcc77x/adc-tcc77x.c | 1017 | target/arm/tcc77x/adc-tcc77x.c |
1017 | target/arm/tcc77x/ata-nand-tcc77x.c | ||
1018 | target/arm/tcc77x/system-tcc77x.c | 1018 | target/arm/tcc77x/system-tcc77x.c |
1019 | target/arm/tcc77x/iaudio7/lcd-iaudio7.c | 1019 | target/arm/tcc77x/iaudio7/lcd-iaudio7.c |
1020 | target/arm/tcc77x/iaudio7/power-iaudio7.c | 1020 | target/arm/tcc77x/iaudio7/power-iaudio7.c |
@@ -1025,8 +1025,8 @@ target/arm/tcc77x/iaudio7/power-iaudio7.c | |||
1025 | #ifndef SIMULATOR | 1025 | #ifndef SIMULATOR |
1026 | drivers/pcf50606.c | 1026 | drivers/pcf50606.c |
1027 | target/arm/lcd-as-memframe.S | 1027 | target/arm/lcd-as-memframe.S |
1028 | target/arm/ata-nand-telechips.c | ||
1028 | target/arm/tcc780x/adc-tcc780x.c | 1029 | target/arm/tcc780x/adc-tcc780x.c |
1029 | target/arm/tcc780x/ata-nand-tcc780x.c | ||
1030 | target/arm/tcc780x/system-tcc780x.c | 1030 | target/arm/tcc780x/system-tcc780x.c |
1031 | target/arm/tcc780x/cowond2/button-cowond2.c | 1031 | target/arm/tcc780x/cowond2/button-cowond2.c |
1032 | target/arm/tcc780x/cowond2/lcd-cowond2.c | 1032 | target/arm/tcc780x/cowond2/lcd-cowond2.c |
diff --git a/firmware/export/config-m200.h b/firmware/export/config-m200.h index e3cb42e403..875debd257 100644 --- a/firmware/export/config-m200.h +++ b/firmware/export/config-m200.h | |||
@@ -6,6 +6,9 @@ | |||
6 | /* For Rolo and boot loader */ | 6 | /* For Rolo and boot loader */ |
7 | #define MODEL_NUMBER 29 | 7 | #define MODEL_NUMBER 29 |
8 | 8 | ||
9 | /* Enable FAT16 support */ | ||
10 | #define HAVE_FAT16SUPPORT | ||
11 | |||
9 | /* define this if you have recording possibility */ | 12 | /* define this if you have recording possibility */ |
10 | //#define HAVE_RECORDING | 13 | //#define HAVE_RECORDING |
11 | 14 | ||
diff --git a/firmware/export/tcc77x.h b/firmware/export/tcc77x.h index a819e29c2c..b17865e257 100644 --- a/firmware/export/tcc77x.h +++ b/firmware/export/tcc77x.h | |||
@@ -59,6 +59,10 @@ | |||
59 | #define PCLKCFG5 (*(volatile unsigned long *)0x80000430) | 59 | #define PCLKCFG5 (*(volatile unsigned long *)0x80000430) |
60 | #define PCLKCFG6 (*(volatile unsigned long *)0x80000434) | 60 | #define PCLKCFG6 (*(volatile unsigned long *)0x80000434) |
61 | 61 | ||
62 | /* Device bits for SWRESET & BCLKCTR */ | ||
63 | |||
64 | #define DEV_NAND (1<<16) | ||
65 | |||
62 | /* ADC */ | 66 | /* ADC */ |
63 | 67 | ||
64 | #define ADCCON (*(volatile unsigned long *)0x80000a00) | 68 | #define ADCCON (*(volatile unsigned long *)0x80000a00) |
@@ -142,4 +146,18 @@ | |||
142 | #define TI0 (1<<0) /* Timer 0 IRQ flag */ | 146 | #define TI0 (1<<0) /* Timer 0 IRQ flag */ |
143 | #define TI1 (1<<1) /* Timer 1 IRQ flag */ | 147 | #define TI1 (1<<1) /* Timer 1 IRQ flag */ |
144 | 148 | ||
149 | /* NAND Flash Controller */ | ||
150 | |||
151 | #define NFC_CMD (*(volatile unsigned long *)0x90000000) | ||
152 | #define NFC_SADDR (*(volatile unsigned long *)0x9000000C) | ||
153 | #define NFC_SDATA (*(volatile unsigned long *)0x90000040) | ||
154 | #define NFC_WDATA (*(volatile unsigned long *)0x90000010) | ||
155 | #define NFC_CTRL (*(volatile unsigned long *)0x90000050) | ||
156 | #define NFC_16BIT (1<<26) | ||
157 | #define NFC_CS0 (1<<23) | ||
158 | #define NFC_CS1 (1<<22) | ||
159 | #define NFC_READY (1<<20) | ||
160 | #define NFC_IREQ (*(volatile unsigned long *)0x90000060) | ||
161 | #define NFC_RST (*(volatile unsigned long *)0x90000064) | ||
162 | |||
145 | #endif | 163 | #endif |
diff --git a/firmware/export/tcc780x.h b/firmware/export/tcc780x.h index e938067544..22e046a445 100644 --- a/firmware/export/tcc780x.h +++ b/firmware/export/tcc780x.h | |||
@@ -195,4 +195,33 @@ | |||
195 | 195 | ||
196 | #define TCC780_VER (*(volatile unsigned long *)0xE0001FFC) | 196 | #define TCC780_VER (*(volatile unsigned long *)0xE0001FFC) |
197 | 197 | ||
198 | /* NAND Flash Controller */ | ||
199 | |||
200 | #define NFC_CMD (*(volatile unsigned long *)0xF0053000) | ||
201 | #define NFC_SADDR (*(volatile unsigned long *)0xF005300C) | ||
202 | #define NFC_SDATA (*(volatile unsigned long *)0xF0053040) | ||
203 | #define NFC_WDATA (*(volatile unsigned long *)0xF0053010) | ||
204 | #define NFC_CTRL (*(volatile unsigned long *)0xF0053050) | ||
205 | #define NFC_16BIT (1<<26) | ||
206 | #define NFC_CS0 (1<<23) | ||
207 | #define NFC_CS1 (1<<22) | ||
208 | #define NFC_READY (1<<20) | ||
209 | #define NFC_IREQ (*(volatile unsigned long *)0xF0053060) | ||
210 | #define NFC_RST (*(volatile unsigned long *)0xF0053064) | ||
211 | |||
212 | /* ECC Controller */ | ||
213 | |||
214 | #define ECC_CTRL (*(volatile unsigned long *)0xF005B000) | ||
215 | #define ECC_M4EN (1<<6) | ||
216 | #define ECC_ENC (1<<27) | ||
217 | #define ECC_READY (1<<26) | ||
218 | #define ECC_BASE (*(volatile unsigned long *)0xF005B004) | ||
219 | #define ECC_CLR (*(volatile unsigned long *)0xF005B00C) | ||
220 | #define ECC_MLC0W (*(volatile unsigned long *)0xF005B030) | ||
221 | #define ECC_MLC1W (*(volatile unsigned long *)0xF005B034) | ||
222 | #define ECC_MLC2W (*(volatile unsigned long *)0xF005B038) | ||
223 | #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050) | ||
224 | #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060) | ||
225 | #define ECC_ERR (*(volatile unsigned long *)0xF005B070) | ||
226 | |||
198 | #endif | 227 | #endif |
diff --git a/firmware/target/arm/tcc780x/ata-nand-tcc780x.c b/firmware/target/arm/ata-nand-telechips.c index 80245c91bd..fc4418cc44 100644 --- a/firmware/target/arm/tcc780x/ata-nand-tcc780x.c +++ b/firmware/target/arm/ata-nand-telechips.c | |||
@@ -19,7 +19,7 @@ | |||
19 | * | 19 | * |
20 | ****************************************************************************/ | 20 | ****************************************************************************/ |
21 | #include "ata.h" | 21 | #include "ata.h" |
22 | #include "ata-target.h" | 22 | #include "ata-nand-target.h" |
23 | #include "system.h" | 23 | #include "system.h" |
24 | #include <string.h> | 24 | #include <string.h> |
25 | #include "led.h" | 25 | #include "led.h" |
@@ -47,43 +47,38 @@ static struct mutex ata_mtx SHAREDBSS_ATTR; | |||
47 | 47 | ||
48 | #define SECTOR_SIZE 512 | 48 | #define SECTOR_SIZE 512 |
49 | 49 | ||
50 | /* TCC780x NAND Flash Controller */ | 50 | #ifdef COWON_D2 |
51 | 51 | #define SEGMENT_ID_BIGENDIAN | |
52 | #define NFC_CMD (*(volatile unsigned long *)0xF0053000) | 52 | #define BLOCKS_PER_SEGMENT 4 |
53 | #define NFC_SADDR (*(volatile unsigned long *)0xF005300C) | 53 | #else |
54 | #define NFC_SDATA (*(volatile unsigned long *)0xF0053040) | 54 | #define BLOCKS_PER_SEGMENT 1 |
55 | #define NFC_WDATA (*(volatile unsigned long *)0xF0053010) | 55 | #endif |
56 | #define NFC_CTRL (*(volatile unsigned long *)0xF0053050) | 56 | /* NB: blocks_per_segment should become a runtime check based on NAND id */ |
57 | #define NFC_16BIT (1<<26) | 57 | |
58 | #define NFC_CS0 (1<<23) | 58 | /* Segment type identifiers - main data area */ |
59 | #define NFC_CS1 (1<<22) | 59 | #define SEGMENT_MAIN_LPT 0x12 |
60 | #define NFC_READY (1<<20) | 60 | #define SEGMENT_MAIN_DATA1 0x13 |
61 | #define NFC_IREQ (*(volatile unsigned long *)0xF0053060) | 61 | #define SEGMENT_MAIN_CACHE 0x15 |
62 | #define NFC_RST (*(volatile unsigned long *)0xF0053064) | 62 | #define SEGMENT_MAIN_DATA2 0x17 |
63 | 63 | ||
64 | /* TCC780x ECC Controller */ | 64 | /* We don't touch the hidden area at all - these are for reference */ |
65 | 65 | #define SEGMENT_HIDDEN_LPT 0x22 | |
66 | #define ECC_CTRL (*(volatile unsigned long *)0xF005B000) | 66 | #define SEGMENT_HIDDEN_DATA1 0x23 |
67 | #define ECC_M4EN (1<<6) | 67 | #define SEGMENT_HIDDEN_CACHE 0x25 |
68 | #define ECC_ENC (1<<27) | 68 | #define SEGMENT_HIDDEN_DATA2 0x27 |
69 | #define ECC_READY (1<<26) | 69 | |
70 | #define ECC_BASE (*(volatile unsigned long *)0xF005B004) | 70 | /* Offsets to spare area data */ |
71 | #define ECC_CLR (*(volatile unsigned long *)0xF005B00C) | 71 | #define OFF_CACHE_PAGE_LOBYTE 2 |
72 | #define ECC_MLC0W (*(volatile unsigned long *)0xF005B030) | 72 | #define OFF_CACHE_PAGE_HIBYTE 3 |
73 | #define ECC_MLC1W (*(volatile unsigned long *)0xF005B034) | 73 | #define OFF_SEGMENT_TYPE 4 |
74 | #define ECC_MLC2W (*(volatile unsigned long *)0xF005B038) | 74 | |
75 | #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050) | 75 | #ifdef SEGMENT_ID_BIGENDIAN |
76 | #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060) | 76 | #define OFF_LOG_SEG_LOBYTE 7 |
77 | #define ECC_ERR (*(volatile unsigned long *)0xF005B070) | 77 | #define OFF_LOG_SEG_HIBYTE 6 |
78 | 78 | #else | |
79 | /* GPIOs */ | 79 | #define OFF_LOG_SEG_LOBYTE 6 |
80 | 80 | #define OFF_LOG_SEG_HIBYTE 7 | |
81 | #define NAND_GPIO_SET(n) GPIOB_SET = n | 81 | #endif |
82 | #define NAND_GPIO_CLEAR(n) GPIOB_CLEAR = n | ||
83 | #define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n | ||
84 | |||
85 | #define WE_GPIO_BIT (1<<19) /* Write Enable */ | ||
86 | #define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */ | ||
87 | 82 | ||
88 | /* Chip characteristics, initialised by nand_get_chip_info() */ | 83 | /* Chip characteristics, initialised by nand_get_chip_info() */ |
89 | 84 | ||
@@ -106,7 +101,6 @@ static int segments_per_bank = 0; | |||
106 | #define MAX_SPARE_SIZE 128 | 101 | #define MAX_SPARE_SIZE 128 |
107 | #define MAX_BLOCKS_PER_BANK 8192 | 102 | #define MAX_BLOCKS_PER_BANK 8192 |
108 | #define MAX_PAGES_PER_BLOCK 128 | 103 | #define MAX_PAGES_PER_BLOCK 128 |
109 | #define BLOCKS_PER_SEGMENT 4 | ||
110 | #define MAX_BANKS 4 | 104 | #define MAX_BANKS 4 |
111 | 105 | ||
112 | #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT) | 106 | #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT) |
@@ -152,6 +146,7 @@ static unsigned int ecc_fail_count = 0; | |||
152 | 146 | ||
153 | static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg) | 147 | static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg) |
154 | { | 148 | { |
149 | #if BLOCKS_PER_SEGMENT == 4 /* D2 */ | ||
155 | int page_addr = phys_segment * pages_per_block * 2; | 150 | int page_addr = phys_segment * pages_per_block * 2; |
156 | 151 | ||
157 | if (page_in_seg & 1) | 152 | if (page_in_seg & 1) |
@@ -167,6 +162,9 @@ static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg) | |||
167 | } | 162 | } |
168 | 163 | ||
169 | page_addr += page_in_seg/4; | 164 | page_addr += page_in_seg/4; |
165 | #elif BLOCKS_PER_SEGMENT == 1 /* M200 */ | ||
166 | int page_addr = (phys_segment * pages_per_block) + page_in_seg; | ||
167 | #endif | ||
170 | 168 | ||
171 | return page_addr; | 169 | return page_addr; |
172 | } | 170 | } |
@@ -386,6 +384,18 @@ static void nand_get_chip_info(void) | |||
386 | 384 | ||
387 | switch(id_buf[1]) /* Chip Id */ | 385 | switch(id_buf[1]) /* Chip Id */ |
388 | { | 386 | { |
387 | case 0xD3: /* K9K8G08UOM */ | ||
388 | |||
389 | page_size = 2048; | ||
390 | spare_size = 64; | ||
391 | pages_per_block = 64; | ||
392 | blocks_per_bank = 8192; | ||
393 | col_cycles = 2; | ||
394 | row_cycles = 3; | ||
395 | |||
396 | found = true; | ||
397 | break; | ||
398 | |||
389 | case 0xD5: /* K9LAG08UOM */ | 399 | case 0xD5: /* K9LAG08UOM */ |
390 | 400 | ||
391 | page_size = 2048; | 401 | page_size = 2048; |
@@ -585,7 +595,8 @@ static void read_lpt_block(int bank, int phys_segment) | |||
585 | SECTOR_SIZE, /* offset */ | 595 | SECTOR_SIZE, /* offset */ |
586 | 16, spare_buf); | 596 | 16, spare_buf); |
587 | 597 | ||
588 | int first_log_segment = (spare_buf[6] << 8) | spare_buf[7]; | 598 | int first_log_segment = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) | |
599 | spare_buf[OFF_LOG_SEG_LOBYTE]; | ||
589 | 600 | ||
590 | lpt_ptr = &lpt_lookup[first_log_segment]; | 601 | lpt_ptr = &lpt_lookup[first_log_segment]; |
591 | 602 | ||
@@ -636,8 +647,11 @@ static void read_write_cache_segment(int bank, int phys_segment) | |||
636 | SECTOR_SIZE, /* offset to first sector's spare */ | 647 | SECTOR_SIZE, /* offset to first sector's spare */ |
637 | 16, spare_buf); | 648 | 16, spare_buf); |
638 | 649 | ||
639 | cached_page = (spare_buf[3] << 8) | spare_buf[2]; /* why does endian */ | 650 | cached_page = (spare_buf[OFF_CACHE_PAGE_HIBYTE] << 8) | |
640 | log_segment = (spare_buf[6] << 8) | spare_buf[7]; /* -ness differ? */ | 651 | spare_buf[OFF_CACHE_PAGE_LOBYTE]; |
652 | |||
653 | log_segment = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) | | ||
654 | spare_buf[OFF_LOG_SEG_LOBYTE]; | ||
641 | 655 | ||
642 | if (cached_page != 0xFFFF) | 656 | if (cached_page != 0xFFFF) |
643 | { | 657 | { |
@@ -751,18 +765,25 @@ int ata_init(void) | |||
751 | 765 | ||
752 | if (initialized) return 0; | 766 | if (initialized) return 0; |
753 | 767 | ||
768 | #ifdef CPU_TCC77X | ||
769 | CSCFG2 = 0x318a8010; | ||
770 | |||
771 | GPIOC_FUNC &= ~(CS_GPIO_BIT | WE_GPIO_BIT); | ||
772 | GPIOC_FUNC |= 0x1; | ||
773 | #endif | ||
774 | |||
754 | /* Set GPIO direction for chip select & write protect */ | 775 | /* Set GPIO direction for chip select & write protect */ |
755 | NAND_GPIO_OUT_EN(CS_GPIO_BIT | WE_GPIO_BIT); | 776 | NAND_GPIO_OUT_EN(CS_GPIO_BIT | WE_GPIO_BIT); |
756 | 777 | ||
757 | /* Get chip characteristics and number of banks */ | 778 | /* Get chip characteristics and number of banks */ |
758 | nand_get_chip_info(); | 779 | nand_get_chip_info(); |
759 | 780 | ||
760 | for (i = 0; i < MAX_SEGMENTS; i++) | 781 | for (i = 0; i < MAX_SEGMENTS; i++) |
761 | { | 782 | { |
762 | lpt_lookup[i].bank = -1; | 783 | lpt_lookup[i].bank = -1; |
763 | lpt_lookup[i].phys_segment = -1; | 784 | lpt_lookup[i].phys_segment = -1; |
764 | } | 785 | } |
765 | 786 | ||
766 | write_caches_in_use = 0; | 787 | write_caches_in_use = 0; |
767 | 788 | ||
768 | for (i = 0; i < MAX_WRITE_CACHES; i++) | 789 | for (i = 0; i < MAX_WRITE_CACHES; i++) |
@@ -773,7 +794,7 @@ int ata_init(void) | |||
773 | write_caches[i].bank = -1; | 794 | write_caches[i].bank = -1; |
774 | write_caches[i].phys_segment = -1; | 795 | write_caches[i].phys_segment = -1; |
775 | 796 | ||
776 | for (page = 0; page < MAX_PAGES_PER_BLOCK * 4; page++) | 797 | for (page = 0; page < MAX_PAGES_PER_BLOCK * BLOCKS_PER_SEGMENT; page++) |
777 | { | 798 | { |
778 | write_caches[i].page_map[page] = -1; | 799 | write_caches[i].page_map[page] = -1; |
779 | } | 800 | } |
@@ -792,28 +813,30 @@ int ata_init(void) | |||
792 | switch (spare_buf[4]) /* block type */ | 813 | switch (spare_buf[4]) /* block type */ |
793 | { | 814 | { |
794 | #ifdef USE_TCC_LPT | 815 | #ifdef USE_TCC_LPT |
795 | case 0x12: | 816 | case SEGMENT_MAIN_LPT: |
796 | { | 817 | { |
797 | /* Log->Phys Translation table (for Main data area) */ | 818 | /* Log->Phys Translation table (for Main data area) */ |
798 | read_lpt_block(bank, phys_segment); | 819 | read_lpt_block(bank, phys_segment); |
799 | break; | 820 | break; |
800 | } | 821 | } |
801 | #else | 822 | #else |
802 | case 0x17: | 823 | case SEGMENT_MAIN_DATA2: |
803 | { | 824 | { |
804 | /* Main data area segment */ | 825 | /* Main data area segment */ |
805 | unsigned short segment = (spare_buf[6] << 8) | spare_buf[7]; | 826 | unsigned short log_segment |
827 | = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) | | ||
828 | spare_buf[OFF_LOG_SEG_LOBYTE]; | ||
806 | 829 | ||
807 | if (segment < MAX_SEGMENTS) | 830 | if (log_segment < MAX_SEGMENTS) |
808 | { | 831 | { |
809 | lpt_lookup[segment].bank = bank; | 832 | lpt_lookup[log_segment].bank = bank; |
810 | lpt_lookup[segment].phys_segment = phys_segment; | 833 | lpt_lookup[log_segment].phys_segment = phys_segment; |
811 | } | 834 | } |
812 | break; | 835 | break; |
813 | } | 836 | } |
814 | #endif | 837 | #endif |
815 | 838 | ||
816 | case 0x15: | 839 | case SEGMENT_MAIN_CACHE: |
817 | { | 840 | { |
818 | /* Recently-written page data (for Main data area) */ | 841 | /* Recently-written page data (for Main data area) */ |
819 | read_write_cache_segment(bank, phys_segment); | 842 | read_write_cache_segment(bank, phys_segment); |
@@ -836,16 +859,18 @@ int ata_init(void) | |||
836 | 859 | ||
837 | switch (spare_buf[4]) /* block type */ | 860 | switch (spare_buf[4]) /* block type */ |
838 | { | 861 | { |
839 | case 0x13: | 862 | case SEGMENT_MAIN_DATA1: |
840 | { | 863 | { |
841 | /* Main data area segment */ | 864 | /* Main data area segment */ |
842 | unsigned short segment = (spare_buf[6] << 8) | spare_buf[7]; | 865 | unsigned short log_segment |
866 | = (spare_buf[OFF_LOG_SEG_HIBYTE] << 8) | | ||
867 | spare_buf[OFF_LOG_SEG_LOBYTE]; | ||
843 | 868 | ||
844 | if (segment < MAX_SEGMENTS) | 869 | if (log_segment < MAX_SEGMENTS) |
845 | { | 870 | { |
846 | /* 0x17 seems to override 0x13, so store in our LPT */ | 871 | /* 0x13 seems to override 0x17, so store in our LPT */ |
847 | lpt_lookup[segment].bank = bank; | 872 | lpt_lookup[log_segment].bank = bank; |
848 | lpt_lookup[segment].phys_segment = phys_segment; | 873 | lpt_lookup[log_segment].phys_segment = phys_segment; |
849 | } | 874 | } |
850 | break; | 875 | break; |
851 | } | 876 | } |
diff --git a/firmware/target/arm/tcc77x/ata-target.h b/firmware/target/arm/tcc77x/ata-nand-target.h index 0243d36f47..93139a16d5 100644 --- a/firmware/target/arm/tcc77x/ata-target.h +++ b/firmware/target/arm/tcc77x/ata-nand-target.h | |||
@@ -21,4 +21,13 @@ | |||
21 | #ifndef ATA_TARGET_H | 21 | #ifndef ATA_TARGET_H |
22 | #define ATA_TARGET_H | 22 | #define ATA_TARGET_H |
23 | 23 | ||
24 | /* GPIOs */ | ||
25 | |||
26 | #define NAND_GPIO_SET(n) GPIOC |= n | ||
27 | #define NAND_GPIO_CLEAR(n) GPIOC &= (~n) | ||
28 | #define NAND_GPIO_OUT_EN(n) GPIOC_DIR |= n | ||
29 | |||
30 | #define CS_GPIO_BIT (1<<24) /* Chip Select */ | ||
31 | #define WE_GPIO_BIT (1<<25) /* Write Enable */ | ||
32 | |||
24 | #endif | 33 | #endif |
diff --git a/firmware/target/arm/tcc77x/ata-nand-tcc77x.c b/firmware/target/arm/tcc77x/ata-nand-tcc77x.c deleted file mode 100644 index 34c17af8a1..0000000000 --- a/firmware/target/arm/tcc77x/ata-nand-tcc77x.c +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /*************************************************************************** | ||
2 | * __________ __ ___. | ||
3 | * Open \______ \ ____ ____ | | _\_ |__ _______ ___ | ||
4 | * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / | ||
5 | * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < | ||
6 | * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ | ||
7 | * \/ \/ \/ \/ \/ | ||
8 | * $Id$ | ||
9 | * | ||
10 | * Copyright (C) 2007 Dave Chapman | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * as published by the Free Software Foundation; either version 2 | ||
15 | * of the License, or (at your option) any later version. | ||
16 | * | ||
17 | * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY | ||
18 | * KIND, either express or implied. | ||
19 | * | ||
20 | ****************************************************************************/ | ||
21 | #include "ata.h" | ||
22 | #include "ata-target.h" | ||
23 | #include "ata_idle_notify.h" | ||
24 | #include "system.h" | ||
25 | #include <string.h> | ||
26 | #include "thread.h" | ||
27 | #include "led.h" | ||
28 | #include "disk.h" | ||
29 | #include "panic.h" | ||
30 | #include "usb.h" | ||
31 | |||
32 | /* for compatibility */ | ||
33 | int ata_spinup_time = 0; | ||
34 | |||
35 | long last_disk_activity = -1; | ||
36 | |||
37 | /* Used to store (fake?) identify info */ | ||
38 | static unsigned short identify_info[256]; | ||
39 | |||
40 | /** static, private data **/ | ||
41 | static bool initialized = false; | ||
42 | |||
43 | static long next_yield = 0; | ||
44 | #define MIN_YIELD_PERIOD 2000 | ||
45 | |||
46 | /* API Functions */ | ||
47 | |||
48 | void ata_led(bool onoff) | ||
49 | { | ||
50 | led(onoff); | ||
51 | } | ||
52 | |||
53 | int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount, | ||
54 | void* inbuf) | ||
55 | { | ||
56 | |||
57 | } | ||
58 | |||
59 | int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count, | ||
60 | const void* outbuf) | ||
61 | { | ||
62 | } | ||
63 | |||
64 | void ata_spindown(int seconds) | ||
65 | { | ||
66 | (void)seconds; | ||
67 | } | ||
68 | |||
69 | bool ata_disk_is_active(void) | ||
70 | { | ||
71 | return 0; | ||
72 | } | ||
73 | |||
74 | void ata_sleep(void) | ||
75 | { | ||
76 | } | ||
77 | |||
78 | void ata_spin(void) | ||
79 | { | ||
80 | } | ||
81 | |||
82 | /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */ | ||
83 | int ata_hard_reset(void) | ||
84 | { | ||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | int ata_soft_reset(void) | ||
89 | { | ||
90 | return 0; | ||
91 | } | ||
92 | |||
93 | void ata_enable(bool on) | ||
94 | { | ||
95 | } | ||
96 | |||
97 | int ata_init(void) | ||
98 | { | ||
99 | return 0; | ||
100 | } | ||
101 | |||
102 | /* TEMP: This will return junk, it's here for compilation only */ | ||
103 | unsigned short* ata_get_identify(void) | ||
104 | { | ||
105 | return identify_info; | ||
106 | } | ||
diff --git a/firmware/target/arm/tcc780x/ata-target.h b/firmware/target/arm/tcc780x/ata-nand-target.h index 0243d36f47..f95d07886e 100644 --- a/firmware/target/arm/tcc780x/ata-target.h +++ b/firmware/target/arm/tcc780x/ata-nand-target.h | |||
@@ -21,4 +21,13 @@ | |||
21 | #ifndef ATA_TARGET_H | 21 | #ifndef ATA_TARGET_H |
22 | #define ATA_TARGET_H | 22 | #define ATA_TARGET_H |
23 | 23 | ||
24 | /* GPIOs */ | ||
25 | |||
26 | #define NAND_GPIO_SET(n) GPIOB_SET = n | ||
27 | #define NAND_GPIO_CLEAR(n) GPIOB_CLEAR = n | ||
28 | #define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n | ||
29 | |||
30 | #define WE_GPIO_BIT (1<<19) /* Write Enable */ | ||
31 | #define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */ | ||
32 | |||
24 | #endif | 33 | #endif |